TW586197B - Image sensor semiconductor package - Google Patents

Image sensor semiconductor package Download PDF

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Publication number
TW586197B
TW586197B TW91115777A TW91115777A TW586197B TW 586197 B TW586197 B TW 586197B TW 91115777 A TW91115777 A TW 91115777A TW 91115777 A TW91115777 A TW 91115777A TW 586197 B TW586197 B TW 586197B
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Taiwan
Prior art keywords
package
image
semiconductor
sensing
scope
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Application number
TW91115777A
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Chinese (zh)
Inventor
Rong-Huei Wang
James Chen
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Scientek Corp
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Priority claimed from US10/128,363 external-priority patent/US6649991B1/en
Application filed by Scientek Corp filed Critical Scientek Corp
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Publication of TW586197B publication Critical patent/TW586197B/en

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73265Layer and wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/153Connection portion
    • H01L2924/1531Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA

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  • Solid State Image Pick-Up Elements (AREA)

Abstract

A non-ceramic image sensor semiconductor package with improved moisture resistance, lower cost, higher reliability, and lower profile is provided. A semiconductor chip with a vision chip active area is attached to a multi-layer resin mask organic substrate. A plurality of bonding wires are attached between conductive parts of the semiconductor chip and the multi-layer resin mask organic substrate to create selective electrical connections. A transparent window is placed on top of the semiconductor chip and covers the vision chip active area. A wire shielding block is formed on the multi-layer resin mask organic substrate around the semiconductor chip covering and protecting the bonding wires and the semiconductor chip not covered by the transparent window. A liquid encapsulant is formed to protectively seal the device but does not block the vision of the vision chip active area through the transparent window. Since no space is required between the vision chip active area, and the transparent window, the overall height of the device is reduced. This allows the image sensor semiconductor package of the present invention to be more compact.

Description

586197 五、發明說明(1) 本發明係有 關一種影 分包括一影像感應晶片及 物係為 影 機、個 置之尺 及更具 需要一 影 能力, 相當昂 習 陶瓷殼 ,而陶 個晶片 著於陶 體相同 如 體非常 結合力 損壞該 另 導致水 保護 像感 人數 寸縮 有效 個成 像感 以使 前業 貴之 知之 體, 瓷殼 附著 瓷殼 連接 應晶 位助 小, 率。 本更 應半 得該 界對 製造 裝置 並使 體係 於該 體之 半導體晶 片目 理器 必須 此外 低且 導體 影像 於影 成本 基本 用一 由昂 陶瓷 頂部 前被 及網 讓電 ,在 可靠 裝置 可被 像感 Ο 上包 凸出 貴之 殼體 ,該 像感應半導體之封裝,其主要部 一銲線遮蔽物,其中該銲線遮蔽 片及有機基板之銲線。 許多電子裝置所使用,如數位相 際網路之設備,要使這些電子裝 子裝置使用之半導體設計更密集 高競爭性的工業及經濟環境下, 性更高之元件。 ,其具有以電性感應擷取影像之 處理及檢視。 應晶片發展之不利因素,在於其 含有複數層的陶瓷材料以形成一 之電導線經過該陶瓷殼體之側邊 陶瓷材料以複數層所製成,當一 之内部時,用一玻璃蓋體將之黏 玻璃蓋體之大小尺寸與該陶瓷殼 Φ 習知裝置,具有一些缺點,例如:玻璃蓋 瓷殼體上分離,原因是玻璃與陶瓷之間的 果導致分離,使該晶片暴露於外界環境且 上所述之 容易自陶 不佳,結 裝置。 一個缺點是為濕氣會進入該多孔性的陶瓷殼體,以 氣凝結於玻璃蓋體之内部,降低該影像感應晶片捕586197 V. Description of the invention (1) The present invention relates to an image sensor including an image sensor chip and a camera as a camera, a ruler that requires a shadow, and a ceramic case, which is quite expensive. It is the same as the pottery body. If the body is very strong, it will damage the water protection image and reduce the number of images. This makes the body more expensive. The porcelain shell attached to the porcelain shell should be connected to the crystal to help reduce the rate. It should be half as necessary for the industry to manufacture the device and make the semiconductor chip of the system must be low in cost and the cost of the conductor image is basically used by a Ang ceramic top quilt and a net to allow electricity to be used in a reliable device. The image sensor 0 has an expensive casing protruding from the top, and the image sensor semiconductor package has a bonding wire shield in the main part, wherein the bonding wire shielding sheet and the bonding wire of the organic substrate. Many electronic devices, such as digital Internet devices, are designed to make semiconductor designs used in these electronic devices more dense, and have higher performance components in highly competitive industrial and economic environments. , Which has the processing and viewing to capture images by electrical induction. The disadvantage of the development of the wafer is that it contains a plurality of layers of ceramic material to form an electrical lead. The ceramic material is made of a plurality of layers through the side of the ceramic shell. When the inside of the one is covered with a glass cover, The size of the sticky glass cover and the ceramic shell Φ The conventional device has some disadvantages, such as the separation of the glass cover and the porcelain shell, because the separation between the glass and the ceramic causes the wafer to be exposed to the external environment. And the above-mentioned easy to self-poor, knot the device. One disadvantage is that moisture will enter the porous ceramic shell, and the gas will condense inside the glass cover to reduce the capture of the image sensor chip.

586197 五、發明說明(2) 捉影像之能力及晶片之品質。 另外,現今之裝置使用之陶瓷材料相當昂貴,使用昂 貴的陶瓷材料製成複數層之陶瓷蓋體造成裝置單價太高, 且其製程特殊。 再者,現今之陶瓷裝置之結構並未提供一較小之設計 或更密集之封裝。 因此,如何針對上述問題提出一種新穎的影像感應半 導體之封裝,不僅可改善傳統濕氣滲透之缺點,又可兼具 低成本、高穩定度及更密集設計之裝置,長久以來一直是 使用者殷切盼望及本發明人念茲在茲者,而本發明人基於 多年從事於半導體相關產品之研究、開發及銷售實務經驗 ,以個人之專業知識,經多方研究設計、專題探討,終於 研究出一種影像感應半導體之封裝改良,可解決上述之問 題。 本發明之影像感應半導體,其主要部分包括一複數層 樹S旨光罩之有機基板、一半導體晶片.、一影像感應晶片之 感應區域、複數條導線、一銲線遮蔽物、一透明窗及一封 裝體。 該複數層樹酯光罩之有機基板係為一基板,其主要部 分包含有:一樹酯光罩及與光罩相同材質之有機基板,使 用相同之材質可使該基板絕對的平坦,電路是經由樹酯光 f所形成,其在基板上也是平坦的,因此提供了一個非常 平的基板表面,所以對於該半導體裝置具有較佳之配置及 對於半導體晶片及基板具有較好之黏著力。586197 V. Description of the invention (2) Capability of capturing images and quality of wafers. In addition, the ceramic materials used in today's devices are quite expensive. The use of expensive ceramic materials to make a plurality of layers of ceramic lids causes the unit price of the device to be too high, and its manufacturing process is special. Furthermore, the structure of today's ceramic devices does not provide a smaller design or a denser package. Therefore, how to propose a novel image-sensing semiconductor package to address the above problems can not only improve the shortcomings of traditional moisture penetration, but also have low-cost, high stability, and more densely designed devices, which have been eager for users for a long time. I hope that the inventor is here, and based on his many years of experience in research, development, and sales of semiconductor-related products, the inventor finally developed an image based on his personal expertise through multiple research and design and special discussions. Improved packaging of inductive semiconductors can solve the above problems. The image-sensing semiconductor of the present invention mainly includes an organic substrate of a plurality of layers of trees, a semiconductor wafer, a sensing region of an image-sensing chip, a plurality of wires, a wire shield, a transparent window, and A package. The organic substrate of the multiple-layer resin mask is a substrate, and its main part includes: a resin mask and an organic substrate of the same material as the mask. Using the same material can make the substrate absolutely flat. The resin light f is formed on the substrate and is flat, so it provides a very flat substrate surface, so it has a better configuration for the semiconductor device and a better adhesion to the semiconductor wafer and the substrate.

第6頁 586197 五、發明說明(3) 半導體晶片係 有機基板上,該半 應區域’該影像感 部分或為獨立之晶 屬半導體(CMOS) 複數個傳導裝 層樹酯光罩之有機 使用於半導體晶片 生電性連接。 一透明窗,係 晶片之感應區域’ 質或為一透鏡。 一鲜線遮蔽物 上且於半導體晶片 之需求來製造,目 於銲線時,銲線所 曲,可以確保該銲 片不會受到損壞。 置以防止封裝前或 一膠狀封裝體 光罩之有機基板、 係可完全遮蔽銲線 小部分透過封裝體 或絕大部分,不會 透過一黏著劑連接於複數層樹酯光罩之 導體晶片係包含有一影像感應晶片之感 應晶片之感應區域可為半導體晶片之一 片,該影像感應晶片係為互補性氧化金 或為電荷耦合(CCD)之影像感應晶片。 置,連接在半導體晶片之導電端及複數 基板之間,該傳導裝置係包含一金線, 及複數層樹酯光罩之有機基板之間以產 配置於半導體晶片上方以覆蓋影像感應 該透明窗係為一硼矽玻璃或其他透明材 ,其係 之周圍 的在保 受之壓 線不會 此外, 封裝時 ,所覆 銲線遮 遮蔽物 來遮蔽 妨礙影 位於複數 ,該銲線 護傳導裝 力極小, 碰撞到晶 該銲線遮 受到外界 蓋之區域 蔽物及透 。然而, ,該封裝 像感應晶 層樹酯 遮蔽物 置,當 因此, 片邊緣 蔽物可 或意外 包括局 明窗之 需注意 體沒有 片感應 光罩之 之尺寸 形成銲 銲線不 ,所以 以保護 碰撞損 部之複 邊緣, 該透明 遮蔽透 區域之 有機基板 可依不同 線遮蔽物 會受到扭 半導體晶 該傳導裝 壞。 數層樹酯 該封裝體 窗只有一 明窗整體 功能,影Page 6 586197 V. Description of the invention (3) The semi-response area of the semiconductor wafer is an organic substrate. The image sensing part may be an independent crystalline semiconductor (CMOS). A plurality of conductive coating resin masks are used organically. The semiconductor wafer is electrically connected. A transparent window, which is the sensing area of the chip, may be a lens. It is manufactured on a fresh wire shield and is required for semiconductor wafers. When the wire is warped, the wire can be warped to ensure that the wire is not damaged. It is placed to prevent the organic substrate of the mask before the packaging or a gel-like package body, which can completely shield the small part of the bonding wire from passing through the package body or most of the conductor chips without being connected to a plurality of layers of the resin mask through an adhesive. The sensing area of the sensing chip including an image sensing chip may be one of the semiconductor chips. The image sensing chip is a complementary gold oxide or a charge coupled (CCD) image sensing chip. And is connected between the conductive end of the semiconductor wafer and the plurality of substrates, and the conductive device includes a gold wire and an organic substrate of a plurality of layers of resin masks to be disposed above the semiconductor wafer to cover the image sensing transparent window It is a borosilicate glass or other transparent material, and the pressure lines around it will not be damaged. In addition, when the package is covered, the covered wire is covered by a shield to block the shadow. The wire protects the conductive force. Extremely small, if it hits the crystal, the bonding wire shields the area covered by the external cover and penetrates. However, the package is placed like an inductive crystalline layer resin shield. Therefore, the edge of the sheet may or may accidentally include a local window. It should be noted that the size of the sheet does not form a welding wire, so it protects against collisions. For the complex edge of the damaged part, the organic substrate of the transparent shielding area can be twisted by different lines, and the semiconductor crystal can be damaged by the conductive device. Several layers of resin. The package window has only one bright window as a whole.

586197 五、發明說明(4) 界之視訊可以透 不會阻隔該透明 樹醋光罩之有機 後在基板與半導 封裝前或封裝後 預留輸入或輸出 中另會述及各式 球閘陣列(BGA) 方形扁平無引腳 點’如基 之材質與 晶片裝置 蔽物也確 不會被損 常會彎曲 用之銲線 賢比本發 成本之效 體晶片、 的空間, 導體之封 許多優 有相同 像感應 銲線遮 體晶片 銲線時 發明使 陶究材 有降低 在半導 有多餘 感應半 像感應區域必須具有一乾淨之視窗使得外 過透明窗進入該感應區域,而封裝體必須 之影像感應晶片之感應區域。再者,因為 基板具有非常平的特性,使用黏著劑黏著 體之間必然具有良好的黏著特性。 該影像感應半導體之封裝可依需要於 增加其他製程,例如:依據封裝之形式, 半導體之電子信號之接觸區域。於本發明 各樣的封裝形式,例如:最終封裝形式有 、無引腳(LCC)、方形爲平腳(QFP)、 (QFN)及其他封裝形式。 本發明之影像感應半導體之封裝具有 板之平坦對於晶片具有較佳之黏著力;具 特性,可提供較高的穩定度及抗濕氣之影 ;又因該銲線完全經由銲線遮蔽物保護, 認永遠不會接觸到晶片之邊緣,所以半導 壞。於現今之裝置,因其沒有受到保護之 或扭曲,因此於封裝時增加了退貨率,本 遮蔽物可提升良率;另外,於現今使用之 明所使用之有機基板昂貴,所以本發明具 益;再者,本發明提供一比較小之外形, 影像感應晶片之感應區域及透明窗之間沒 使得整體之高度降低,所以本發明之影像 裝更具密集性,增加了該裝置之價值。 ill ill II III ill 第8頁 586197 五、發明說明(5) 本發明之另一目的係提供一讓熟知該項技藝者可以經 閱讀本發明之專利說明書即可據以實施之方法。 茲為使 貴審查委員對本發明之結構特徵及所達成之 功效有更進一步之瞭解與認識,謹佐以較佳之實施例及配 合詳細之說明,敘述如後: 如前所述,現今使用之陶瓷影像感應裝置具有許多缺 點,例如:陶瓷材料使用在生產上非常昂貴;濕氣會滲透 進入該裝置導致凝結於部分元件之内側,因此降低了該影 像感應裝置之運作能力;再者,當其只有以黏膠固定在陶 瓷封裝時,玻璃蓋體非常容易自陶瓷封裝分離,使得該晶 片暴露於外,結果造成晶片被破壞。 然而,本發明所提供之影像感應半導體之封裝,可以 改進其抗濕性、降低成本、提高穩定度及具有更高之密 度。 請參閱第1圖,其係為本發明之一較佳實施例之截面 圖。如圖所示,本發明之影像感應半導體1 00包含了一複 數層樹酯光罩之有機基板11 0、黏著劑1 2 0、一半導體晶片 1 3 0、一影像感應晶片之感應區域1 4 0、銲線1 5 0、一銲線 遮蔽物1 6 0、一透明窗1 7 0、一封裝體1 8 0及錫球1 9 0。 該複數層樹酯光罩之有機基板11 0係為一基板,該基 板包括一樹酯光罩及一有機基板,兩者具有相同材質,使 用相同之材質可以使基板呈現絕對平坦,而電路係經由樹 酯光罩形成在平坦之基板上,因此提供一非常平的基板表 面’如此安排可使得該半導體晶片1 3 0與基板1 1 0之間具有586197 V. Description of the invention (4) The video of the world can not pass through the organic mask of the transparent tree vinegar mask. It can be reserved for input or output before the substrate and the semiconductor package or after the package. Various ball brake arrays will be mentioned in the description. (BGA) Square flat lead-free dots, such as the base material and the chip device shield, will not be damaged. The wire used for bending will often be more cost effective than the cost of the effective chip and space. The invention of the same image induction welding wire shield chip welding wire has reduced the ceramic material. In the semiconducting area, there is excess induction. The half image induction area must have a clean window so that the transparent window enters the induction area, and the package must have an image. The sensing area of the sensor chip. Furthermore, because the substrate has very flat characteristics, it is necessary to have good adhesion characteristics between the adherends using an adhesive. The packaging of the image-sensing semiconductor can be supplemented with other processes as needed, for example, according to the form of the package, the contact area of the electronic signals of the semiconductor. Various packaging forms of the present invention, for example, the final packaging forms are, leadless (LCC), square flat (QFP), (QFN) and other packaging forms. The package of the image-sensing semiconductor of the present invention has the flatness of the board and has better adhesion to the wafer; it has characteristics that can provide higher stability and resistance to moisture; and because the bonding wire is completely protected by the shielding of the bonding wire, It is believed that it will never touch the edge of the wafer, so the semiconductor is bad. In today's devices, because they are not protected or distorted, the return rate is increased during packaging, and this shield can improve the yield. In addition, the organic substrates used in today's Ming are expensive, so the present invention is beneficial. Furthermore, the present invention provides a relatively small profile, and the overall height is not reduced between the sensing area of the image sensing chip and the transparent window, so the imaging equipment of the present invention is more dense and increases the value of the device. ill ill II III ill page 8 586197 V. Description of the invention (5) Another object of the present invention is to provide a method which can be implemented by those skilled in the art by reading the patent specification of the present invention. In order to make your reviewing members have a better understanding and understanding of the structural features and achieved effects of the present invention, I would like to provide better examples and detailed descriptions with detailed descriptions as follows: As mentioned above, the ceramics used today The image sensing device has many disadvantages, such as: ceramic materials are very expensive to use in production; moisture will penetrate into the device and cause it to condense inside some components, thus reducing the operating capability of the image sensing device; further, when it has only When the adhesive is fixed on the ceramic package, the glass cover is easily separated from the ceramic package, so that the wafer is exposed to the outside, and the wafer is damaged as a result. However, the image-sensing semiconductor package provided by the present invention can improve its moisture resistance, reduce cost, improve stability, and have higher density. Please refer to FIG. 1, which is a cross-sectional view of a preferred embodiment of the present invention. As shown in the figure, the image sensing semiconductor 100 of the present invention includes a plurality of layers of an organic substrate 11 0 of a resin mask, an adhesive 1 2 0, a semiconductor wafer 1 3 0, and a sensing region 1 4 of an image sensing wafer. 0, wire 1 50, a wire shield 16 0, a transparent window 170, a package 1 800, and a solder ball 190. The organic substrate 110 of the multiple-layer resin mask is a substrate. The substrate includes a resin mask and an organic substrate, both of which have the same material. The same material can be used to make the substrate appear absolutely flat. The resin mask is formed on a flat substrate, so a very flat substrate surface is provided. 'This arrangement allows the semiconductor wafer 1 30 to have

第9頁 586197 五、發明說明(6) 較佳之黏著力。 反之,其他形式之基板則設計得較差,其電路於基板 上會升高些微的高度,使得基板的表面呈現凹凸不平,因 此,積體電路使用於其他形式之基板上時,會使得物理及 機械性質變差,例如半導體晶片與基板之黏著力減低,以 及基板易於吸收了太多的濕氣後,造成該裝置產生不穩定 的問題。 半導體晶片1 3 0其係與複數層樹酯光罩之有機基板1 1 0 經由一黏著劑1 2 0互相連接,需清楚的明瞭本實施例只有 一個半導體晶片連接,然而於其他之實施例中,亦可將複 數個半導體晶片使用於相同之半導體封裝上。 該半導體晶片1 3 0係包含一影像感應晶片之感應區域 1 4 0,該影像感應晶片之感應區域係可為半導體晶片1 3 0之 一部分或獨立之晶片,該影像感應晶片140其可為一 CMOS 或CCD兩者其中之一。 一複數個傳導裝置1 5 0,其係連接在半導體晶片1 3 0側 邊之導電端與複數層樹酯光罩之有機基板1 1 0之間,該傳 導裝置1 5 0可為一金線。 一透明窗1 7 0係配置於半導體晶片1 3 0之上部,而遮蓋 於影像感應晶片之感應區域1 4 0,該透明窗1 7 0可為一硼矽 玻璃或其他透明材質或為一透鏡。 一銲線遮蔽物160,其係形成在複數層樹酯光罩之有 機基板上,在半導體晶片1 3 0之周圍,銲線遮蔽物1 6 0之大 小可以依需要製作適當之尺寸以將銲線包覆。Page 9 586197 V. Description of the invention (6) Better adhesion. Conversely, other types of substrates are poorly designed, and their circuits will rise slightly on the substrate, making the surface of the substrate appear uneven. Therefore, the use of integrated circuits on other types of substrates will make physical and mechanical Poor properties, such as reduced adhesion between the semiconductor wafer and the substrate, and the substrate tends to absorb too much moisture, causing the device to have problems of instability. The semiconductor wafer 130 is connected to the organic substrate 1 1 of the plurality of resin masks through an adhesive 1 2 0. It should be clearly understood that only one semiconductor wafer is connected in this embodiment, but in other embodiments It is also possible to use a plurality of semiconductor wafers on the same semiconductor package. The semiconductor wafer 130 includes a sensing region 140 of an image sensing chip. The sensing region of the image sensing chip may be a part of the semiconductor wafer 130 or a separate chip. The image sensing chip 140 may be a Either CMOS or CCD. A plurality of conductive devices 150 are connected between the conductive end of the semiconductor wafer 130 and the organic substrate 1 1 0 of the resin mask. The conductive device 150 may be a gold wire. . A transparent window 170 is disposed above the semiconductor chip 130 and covers the sensing area 140 of the image sensor chip. The transparent window 170 may be a borosilicate glass or other transparent material or a lens. . A wire shield 160 is formed on an organic substrate of a plurality of layers of resin masks. Around the semiconductor wafer 130, the wire shield 160 can be made in an appropriate size as needed to bond the wires. Line wrap.

第10頁 586197 五、發明說明(7) ' 銲線遮蔽物其係保護傳導裝置,當形成銲線遮蔽物於 銲線時,銲線所受之壓力極小,因此,銲線不會受到扭曲 ,可以確保銲線不會碰撞到晶片邊緣,所以半導體晶片不 會受到損壞。此外,銲線遮蔽物可以保護傳導裝置以防止 封裝前或封裝時受到外界或意外碰撞損壞。 於本發明之實施例中,該透明窗係配置於半導體晶片 上面,且與銲線遮蔽物形成時之製造程序相同,如此可以 縮短生產時間,減少生產流程,降低製造成本。在此步驟 < 中,銲線遮蔽物有助於固定透明窗的位置,於封裝前為一 特殊之製程。 銲線遮蔽物1 6 0,其係用與樹酯基板相同之材質或彈 性橡膠所製成,本發明之特點是銲線遮蔽物1 6 0所使用的 材質與有機基板1 1 0相同或類似,由於兩者之物理性質相 同或相似,可以使得有機基板1 1 0與銲線遮蔽物1 6 0之間具 有較強之黏著力,增加該裝置之穩定度。 一膠態封裝體1 8 0,覆蓋在需要之區域,如複數層樹 酯光罩之有機基板1 1 〇之局部區域、銲線遮蔽物1 6 0及透明 窗1 7 0之邊緣,該封裝體1 8 0會完全覆蓋該銲線遮蔽物1 6 0 ,然而必須注意的是,封裝體1 8 0只覆蓋透明窗1 7 0之少部 分區域,不會覆蓋全體之透明窗1 7 0或影像感應晶片之感 應區域1 4 0,所以不會影響影像感應晶片之感應區域1 4 0之 、 功能,影像感應晶片之感應區域1 4 0必須具有一乾淨之視 窗以使外界之視訊可以透過透明窗1 7 0被捕捉。 封裝體1 8 0,係經由印刷(P r i n t i n g )或其他塗布方式 、Page 10 586197 V. Description of the invention (7) The welding wire shield is a protective conductive device. When the welding wire shield is formed on the welding wire, the pressure on the welding wire is extremely small, so the welding wire will not be distorted. It is ensured that the bonding wire does not hit the edge of the wafer, so the semiconductor wafer is not damaged. In addition, wire shields protect the conductive devices from external or accidental damage before or during packaging. In the embodiment of the present invention, the transparent window is arranged on the semiconductor wafer and has the same manufacturing process as the formation of the wire shield, so that the production time can be shortened, the production process can be reduced, and the manufacturing cost can be reduced. In this step <, the wire shield helps to fix the position of the transparent window, and it is a special process before packaging. The bonding wire cover 160 is made of the same material or elastic rubber as the resin substrate. The feature of the present invention is that the bonding wire cover 160 is made of the same or similar material as the organic substrate 1 110 Because the physical properties of the two are the same or similar, the organic substrate 110 and the bonding wire shield 160 can have a strong adhesive force, which increases the stability of the device. A colloidal package 1 80, covering the required area, such as a partial area of the organic substrate 1 1 0 of a plurality of layers of the resin mask, the edge of the wire shield 16 and the transparent window 1 70, the package The body 180 will completely cover the wire shield 160, but it must be noted that the package 180 covers only a small part of the transparent window 170, and does not cover the entire transparent window 170 or The sensing area of the image sensing chip is 1 40, so it will not affect the function of the sensing area of the image sensing chip. The sensing area of the image sensing chip 1 40 must have a clean window so that the external video can be transparent. Window 170 is captured. The package body 1 80 is printed (P r i n t i n g) or other coating methods,

第11頁 586197 五、發明說明(8) (C〇a t i n g、in〇1 d i n g )所形成,該封裝體1 8 0係黏結固定並 保護該影像感應半導體之銲腳以遮蔽該半導體晶片1 3 0及 影像感應晶片之感應區域1 4 0,使之與外界之環境隔離。 此外,因為該基板11 0係為一樹酯光罩有機基板且非常平 坦,所以基板1 1 0及封裝體1 8 0之間具有一非常強之黏著力 〇 影像感應半導體之封裝可依需要於封裝前或封裝後增 加別的製程,例如:依據封裝之形式,預留輸入或輸出半 導體之電子信號之接觸區域。於本發明中所使用的封裝形 式,例如:利用錫球1 9 0接觸該複數層樹酯光罩之有機基 板11 0之底部以形成該B G A之半導體封裝(請參閱第1圖 )° 一複數個錫球1 9 0,其係以電性連接至該傳導電路與 部分之複數層樹酯光罩之有機基板1 1 0,該錫球1 9 0之材質 可為Pb、Sη或其他導電材料,可作為半導體裝置100之電 極及半導體晶片13 0與印刷電路板之間的電性連接。 雖然本發明於上揭露了一特殊形式之封裝,對於本發 明於其他實例中亦可以使用如:BGA、LCC、QFP、QFN或其 他之封裝形式。 影像感應半導體之封裝最需注意的地方為抗濕氣,濕 氣會滲透進入該裝置並凝結於玻璃窗、半導體晶片或影像 感應晶片之感應區域,此為現今裝置普遍都具有之問題, 然而,在本發明中平坦之基板、相同或類似的材質,具有 較佳之黏著力,可以提供一高穩定度及抗濕氣之影像感應 111 III 1 II S1 第12頁 586197 銲線係完 銲線時, ,可以確 會受到損 造成彎曲 利用一銲 今裝置係 機基板昂 成償格昂 之優點也 發明具有 感應區域 度已經降 實為一具 國專利法 利申請, 全經 銲線 保銲 壞。 或扭 線遮 採用 貴, 貴之 在於降低 一較小之 及透明窗 低,更可 有新穎性 所規定之 祈 鈞局 由銲 所受 線不 於現 曲, 蔽物 陶瓷 現今 裝置 線遮蔽物保 之壓力極小 會碰撞到晶 今之裝置, 因此於封裝 以增力σ良率 材質,比本 裝置需要用 ,且需額外 生產成本。 外型,於半 之間沒有額 增加本發明 、進步性及 專利申請要 早曰賜准專 五、發明說明(9) 裝置。 另外,該 線遮蔽物於該 不會受到扭曲 半導體晶片不 保護,時常會 貨率,本發明 此外,現 應半導體之有 陶瓷材質以製 因此,本發明 再者,本 像感應晶片之 整體裝置之高 故本發明 者,應符合我 法提出發明專 護,當形成銲 ,因此,銲線 片邊緣,所以 銲線沒有受到 時會增加其退 〇 發明之影像感 複數層昂貴之 之生產流程, 導體晶片、影 外之空間,其 之價值。 可供產業利用 件無疑,爰依 利’至感為禱 惟以上所述者,僅為本發明之一較佳實施例而已,並 非用來限定本發明實施之範圍,舉凡依本發明申請專利範 圍所述之形狀、構造、特徵及精神所為之均等變化與修飾 ,均應包括於本發明之申請專利範圍内。 圖號簡單說明: 1 0 0影像感應半導體Page 11 586197 V. Description of the invention (8) (Coating, in〇1 ding), the package body 180 is adhesively fixed and protects the solder feet of the image sensing semiconductor to cover the semiconductor wafer 130 And the sensing area of the image sensor chip 140, to isolate it from the outside environment. In addition, because the substrate 110 is a resin mask organic substrate and is very flat, there is a very strong adhesion between the substrate 1 10 and the package body 180. The packaging of the image-sensing semiconductor can be packaged as needed. Add another process before or after packaging, for example: reserve the contact area of the electronic signal of the input or output semiconductor according to the package form. The package form used in the present invention, for example, uses a solder ball 190 to contact the bottom of the organic substrate 110 of the plurality of layers of the resin mask to form the semiconductor package of the BGA (see FIG. 1). Each solder ball 190 is an organic substrate 1 1 0 which is electrically connected to the conductive circuit and a part of a plurality of layers of the resin mask. The material of the solder ball 190 may be Pb, Sη or other conductive materials. It can be used as the electrical connection between the electrode of the semiconductor device 100 and the semiconductor wafer 130 and the printed circuit board. Although the present invention discloses a special form of packaging, the present invention can also be used in other examples such as: BGA, LCC, QFP, QFN, or other packaging forms. The most important thing to note in the packaging of image-sensing semiconductors is that they are resistant to moisture. Moisture can penetrate into the device and condense in the sensing area of glass windows, semiconductor wafers, or image-sensing wafers. This is a problem commonly encountered by today's devices. However, In the present invention, the flat substrate, the same or similar material, has better adhesion, and can provide a high stability and moisture-resistant image sensing. 111 III 1 II S1 Page 12 586197 When the bonding wire is completed, It can indeed be damaged and caused to bend. The advantage of using a welding device to machine the substrate of the device is to compensate the Ang. It is also found that the induction area has been reduced to a national patent law application, and all the welded wires are protected from welding. Or the twisted wire cover is expensive. The cost is to reduce a smaller and lower transparent window, and it can also have the novelty of the Qijun Bureau. The wire received by the welding is not in line with the current song. Extremely small pressure will collide with Jingjin's device. Therefore, the encapsulation is made of σ yield rate material, which is more than the device, and requires additional production costs. Appearance, there is no amount between half and half. To increase the invention, progress and patent application should be given as early as possible. V. Invention Description (9) Device. In addition, the wire shield is not protected by twisted semiconductor wafers, and often has a rate of shipment. In addition, the present invention should now be made of ceramic materials for semiconductors. Therefore, the present invention furthermore provides an integrated device like an inductive wafer. The inventor of the invention should comply with our method and propose special protection. When welding is formed, therefore, the edge of the welding wire sheet, so that the welding wire is not received, will increase its retreat. The invention's image-sensing multiple layers of expensive production process, conductor The value of the chip and the space outside the shadow. There is no doubt that the industry can use it, but Yi Yi's sense of prayer is the only one of the preferred embodiments of the present invention, and is not intended to limit the scope of the present invention. The equal changes and modifications of the shapes, structures, features, and spirits mentioned above should all be included in the scope of patent application of the present invention. Brief description of drawing number: 1 0 0 image sensor semiconductor

1 111 ! _ II 第13頁 586197 五、發明說明(ίο) 1 1 0複數層樹酯光罩之有機基板 1 2 0黏著劑 1 3 0半導體晶片 1 4 0影像感應晶片之感應區域 1 5 0銲線 1 6 0鮮線遮蔽物 1 7 0透明窗 1 8 0封裝體 1 9 0錫球 5861971 111! _ II Page 13 586197 V. Description of the invention (1) 0 1 1 Multiple organic substrates of resin mask 1 2 0 Adhesive 1 3 0 Semiconductor wafer 1 4 0 Sensing area of image sensor wafer 1 5 0 Welding wire 1 6 0 Fresh wire cover 1 7 0 Transparent window 1 8 0 Package 1 9 0 Solder ball 586197

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Claims (1)

586197 六、申請專利範圍 1 · 一種影像感應半導體之封裝,其主要至少係包括: 一樹醋光罩之有機基板,其係包含有一複數條導線; 一半導體晶片,其係包含有一影像感應晶片之感應區 域’該半導體晶片係連接於該樹s旨光罩之有機基板 一複數個傳導裝置,其以電性連接至半導體晶片之導 電端與樹酯光罩之有機基板以形成傳導電路; 一透明窗,其位於半導體晶片及影像感應晶片之感應 ^ 區域上方; 一銲線遮蔽物,其係形成在該樹酯光罩之有機基板及 半導體晶片之周圍,其中該銲線遮蔽物係覆蓋複數 個傳導裝置,但是未覆蓋該透明窗; 一封裝體,其係覆蓋於樹酯光罩之有機基板之局部區 域、銲線遮蔽物及透明窗之邊緣,其中該封裝體並 未覆蓋在透明窗上。 2 ·如申請專利範圍第1項所述之影像感應半導體之封裝 ,其中該複數個傳導裝置係為銲線。 3 ·如申請專利範圍第1項所述之影像感應半導體之封裝 ,其中該樹酯光罩之有機基板係為一複數層樹酯光罩 之有機基板。 ® 4 ·如申請專利範圍第1項所述之影像感應半導體之封裝 _ ,其中該銲線遮蔽物及樹酯光罩之有機基板係為同一 材料。 5 ·如申請專利範圍第1項所述之影像感應半導體之封裝586197 VI. Application Patent Scope 1. An image sensing semiconductor package, which mainly includes at least: an organic substrate of a tree vinegar mask, which includes a plurality of wires; a semiconductor wafer, which includes the sensing of an image sensor chip Area 'The semiconductor wafer is a plurality of conductive devices connected to the organic substrate of the tree mask, and is electrically connected to the conductive end of the semiconductor wafer and the organic substrate of the resin mask to form a conductive circuit; a transparent window , Which is located above the sensing region of the semiconductor wafer and the image sensing wafer; a wire shield is formed around the organic substrate of the resin mask and the semiconductor wafer, wherein the wire shield covers a plurality of conductions Device, but does not cover the transparent window; a package body, which covers a local area of the organic substrate of the resin mask, a wire shield, and the edges of the transparent window, wherein the package body is not covered on the transparent window. 2 · The image-sensing semiconductor package described in item 1 of the scope of the patent application, wherein the plurality of conductive devices are bonding wires. 3. The packaging of the image-sensing semiconductor according to item 1 of the scope of the patent application, wherein the organic substrate of the resin mask is an organic substrate of a plurality of layers of the resin mask. ® 4 · The packaging of image-sensing semiconductors as described in item 1 of the scope of patent application, wherein the wire shield and the organic substrate of the resin mask are made of the same material. 5 · Packaging of image-sensing semiconductors as described in item 1 of the scope of patent applications 第16頁 586197 六、申請專利範圍 ,其中該透明窗係為一玻璃。 6 ·如申請專利範圍第1項所述之影像感應半導體之封裝 ,其中該透明窗係為一透鏡。 7 ·如申請專利範圍第1項所述之影像感應半導體之封裝 ,其中該半導體晶片係為一互補性氧化金屬半導體( CMOS)之影像感應晶片。 8 ·如申請專利範圍第1項所述之影像感應半導體之封裝 ,其中該半導體晶片係為一電荷耦合(CCD)之影像感 。 應晶片。 9 ·如申請專利範圍第1項所述之影像感應半導體之封裝 ¥ ,其中該封裝之形式係為一方形扁平無引腳(QFN)封 裝形式。 1 〇 ·如申請專利範圍第1項所述之影像感應半導體之封裝 ,其中該封裝形式係為一無引腳(LCC)封裝形式。 1 1 ·如申請專利範圍第1項所述之影像感應半導體之封裝 ,其中該封裝之形式係為一球閘陣列(BG A)封裝形式 〇 1 2 ·如申請專利範圍第1項所述之影像感應半導體之封裝 ,其中該半導體封裝係包含了複數個半導體晶片。 1 3 · —種影像感應半導體之封裝,其主要部分包括: _ 一複數層樹酯光罩之有機基板,其中複數條導線以電 性連接於該樹酯光罩之有機基板上以形成電路; 一半導體晶片,黏接於複數層樹酯光罩之有機基板上 ,該半導體晶片包含有一影像感應晶片之感應區域Page 16 586197 6. Scope of patent application, where the transparent window is a glass. 6. The package of an image-sensing semiconductor as described in item 1 of the scope of patent application, wherein the transparent window is a lens. 7 · The image sensing semiconductor package described in item 1 of the scope of patent application, wherein the semiconductor wafer is a complementary metal oxide semiconductor (CMOS) image sensing wafer. 8 · The package of an image-sensing semiconductor as described in item 1 of the scope of the patent application, wherein the semiconductor wafer is a charge-coupled (CCD) image sensor.应 chip. 9 · The image-sensing semiconductor package ¥ described in item 1 of the scope of the patent application, wherein the package is a square flat no-lead (QFN) package. 1 〇 The image-sensing semiconductor package described in item 1 of the scope of patent application, wherein the package is a leadless (LCC) package. 1 1 · The package of the image-sensing semiconductor as described in item 1 of the scope of the patent application, wherein the package is in the form of a ball-gate array (BG A) package 0 1 2 · As described in the scope of the patent application The package of an image sensing semiconductor, wherein the semiconductor package includes a plurality of semiconductor wafers. 1 3 · — An image sensing semiconductor package, the main parts of which include: _ an organic substrate of a plurality of layers of a resin mask, wherein a plurality of wires are electrically connected to the organic substrate of the resin mask to form a circuit; A semiconductor wafer adhered to an organic substrate of a plurality of layers of resin mask, the semiconductor wafer including a sensing area of an image sensing chip 第17頁 586197 六、申請專利範圍 一複數條銲線,分別連接至半導體晶片之導電端及複 數層樹酯光罩之有機基板上形成電路; 一透明窗,其係覆蓋在影像感應晶片之感應區域上方 一銲線遮蔽物,其係形成在複數層樹酯光罩之有機基 板上及半導體晶片之周圍,其中該銲線遮蔽物係覆 蓋複數個傳導裝置,但是未覆蓋透明窗; 一封裝體,其係覆蓋於複數層樹酯光罩之有機基板之 局部區域、銲線遮蔽物及透明窗之邊緣,其中該封 裝體並未覆蓋透明窗,故不會破壞該影像感應晶片 之感應區域之功能,而封裝體係保護該影像感應半 導體之接腳。 1 4 ·如申請專利範圍第1 3項所述之影像感應半導體之封裝 ,其中該銲線遮蔽物及樹酯光罩之有機基板係為同一 材質。 1 5 ·如申請專利範圍第1 3項所述之影像感應半導體之封裝 ,其中該透明窗係為一玻璃。 1 6 ·如申請專利範圍第1 3項所述之影像感應半導體之封裝 ,其中該透明窗係為一透鏡。 1 7 ·如申請專利範圍第1 3項所述之影像感應半導體之封裝 ,其中該半導體晶片係採用互補性氧化金屬半導體( CMOS)之影像感應晶片。 1 8 ·如申請專利範圍第1 3項所述之影像感應半導體之封裝Page 17 586197 6. Application scope: A plurality of bonding wires are respectively connected to the conductive end of the semiconductor wafer and the organic substrate of a plurality of layers of the resin mask to form a circuit; a transparent window covering the sensing of the image sensor chip Above the area, a wire cover is formed on the organic substrate of a plurality of layers of resin mask and around the semiconductor wafer, wherein the wire cover covers a plurality of conductive devices, but does not cover a transparent window; a package body It covers the local area of the organic substrate of the multiple-layer resin mask, the wire shield and the edge of the transparent window. The package does not cover the transparent window, so it will not damage the sensing area of the image sensor chip. Function, and the package system protects the pins of the image sensing semiconductor. 14 · The package of the image-sensing semiconductor as described in item 13 of the scope of the patent application, wherein the bonding wire shield and the organic substrate of the resin mask are made of the same material. 15 · The package of an image-sensing semiconductor as described in item 13 of the scope of patent application, wherein the transparent window is a glass. 16 · The package of an image-sensing semiconductor as described in item 13 of the scope of patent application, wherein the transparent window is a lens. 17 · The package of an image-sensing semiconductor as described in item 13 of the scope of patent application, wherein the semiconductor wafer is an image-sensing wafer using complementary metal oxide semiconductor (CMOS). 1 8 · Packaging of image sensing semiconductor as described in item 13 of the scope of patent application 第18頁 586197 六、申請專利範圍 ,其中該半導體晶片係採用電荷耦合(CCD)之影像感 應晶片。 1 9 ·如申請專利範圍第1 3項所述之影像感應半導體之封裝 ,其中該封裝係採用一方形扁平無引腳(QFN)封裝形 式。 2 0 ·如申請專利範圍第1 3項所述之影像感應半導體之封裝 ,其中該封裝係採用無引腳(LCC)封裝形式。 2 1 ·如申請專利範圍第1 3項所述之影像感應半導體之封裝 ,其中該封裝係採用球閘陣列(BG A)封裝形式。 2 2 ·如申請專利範圍第1 3項所述之影像感應半導體之封裝 ,其中該半導體封裝係包含了複數個半導體晶片。Page 18 586197 6. Scope of patent application, in which the semiconductor wafer is an image sensing wafer using charge coupled (CCD). 19 · The image-sensing semiconductor package described in item 13 of the scope of patent application, wherein the package is a square flat no-lead (QFN) package. 20 · The image sensing semiconductor package as described in item 13 of the scope of patent application, wherein the package is in a leadless (LCC) package. 2 1 · The image sensing semiconductor package as described in item 13 of the scope of patent application, wherein the package is a ball gate array (BG A) package. 2 2 · The package of an image-sensing semiconductor as described in item 13 of the scope of patent application, wherein the semiconductor package includes a plurality of semiconductor wafers. 第19頁Page 19
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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107742630A (en) * 2013-07-08 2018-02-27 胜丽国际股份有限公司 Image sensor packaging structure

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107742630A (en) * 2013-07-08 2018-02-27 胜丽国际股份有限公司 Image sensor packaging structure

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