TW578264B - Structure for improving voiding in metal interconnects - Google Patents
Structure for improving voiding in metal interconnects Download PDFInfo
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- TW578264B TW578264B TW92102805A TW92102805A TW578264B TW 578264 B TW578264 B TW 578264B TW 92102805 A TW92102805 A TW 92102805A TW 92102805 A TW92102805 A TW 92102805A TW 578264 B TW578264 B TW 578264B
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578264 五、發明說明(1) 發明所屬之技術領域: 本發明係有關於積體電路製程,特別是有關於改善金屬連 線產生孔隙之結構。 ° 先前技術: 半導體晶片係使用在廣泛的區域中,例如手提電腦元件、 無線通訊元件、桌上型電腦以及數位相機等。這些半導體 晶片可包含許多邏輯元件與記憶體元件。半導體元件的製 作’係利用内連線(Interconnect)製程來形成多層的電路 結構。一 4又内連線製程係利用金屬沉積步驟以及微影步驟 來元成。第1圖所繪示為一般積體電路元件中多重内連線的 側剖面示意圖。 請參照第1圖,首先利用化學氣相沉積(Chemical Vap〇r Deposition)步驟在基材ι〇上形成介電層14,並利用微影步 驟在介電層14上定義金屬連線的位置,並去除這些位置的 部分介電層,在隨後也利用沉積方式形成圖案化的金屬層 1 2 ’而構成第一層的金屬連線。接著,利用同樣的沉積與 定義方式’形成金屬插塞(Plug )16以及金屬層2〇,其中金 屬插塞1 6係作為連接兩層金屬連線之用,而金屬層2 〇即為 另一層金屬連線。另外,作為隔離之用的介電層14、介電 層18與介電層22可稱之為内金屬介電層(inter-Metal Dielectrics)或内層介電層(inter-layer Dielectrics)。578264 V. Description of the invention (1) Technical field to which the invention belongs: The present invention relates to integrated circuit manufacturing processes, and in particular, to improving the structure of pores generated by metal wiring. ° Previous technology: Semiconductor chips are used in a wide range of areas, such as laptop computer components, wireless communication components, desktop computers, and digital cameras. These semiconductor chips can contain many logic and memory elements. The fabrication of a semiconductor device 'uses an interconnect process to form a multilayer circuit structure. A four-line interconnection process uses a metal deposition step and a lithography step to form the element. FIG. 1 is a schematic side sectional view of multiple interconnects in a general integrated circuit component. Please refer to FIG. 1. First, a dielectric layer 14 is formed on a substrate ι by a chemical vapor deposition (CVD) step, and a position of a metal wiring is defined on the dielectric layer 14 by a lithography step. Then, a part of the dielectric layer at these positions is removed, and then a patterned metal layer 1 2 ′ is also formed by a deposition method to form a first-layer metal connection. Next, the same deposition and definition method is used to form a metal plug (Plug) 16 and a metal layer 20, where the metal plug 16 is used to connect two metal wires, and the metal layer 20 is another layer. Metal wiring. In addition, the dielectric layer 14, the dielectric layer 18, and the dielectric layer 22 used for isolation can be referred to as inter-metal dielectrics (inter-metal dielectrics) or inter-layer dielectrics (inter-layer dielectrics).
第5頁 五、發明說明(2) 重複上述步驟,即可形成更多層的多重内連線結構。 由於現今積體電路朝向縮小連線寬度與特徵圖案尺寸以及 增加連線密度的方向發展,而如何積體電路元件中元件運 算速度的提升-直是各家必爭的要點,這同時也是購買牛: 選擇時的重要訴求。因此發展出使用銅金屬材料作為 連線結構,以達到改善元件操作速度的目的。 但是利用銅金屬作為多重内連線材料的製程,卻發現 重内連線中會出現因壓力導致的孔隙(Stress_lnducedPage 5 5. Description of the invention (2) Repeat the above steps to form multiple layers of interconnect structures. Nowadays, integrated circuits are developing toward reducing connection widths, feature pattern sizes, and increasing connection densities, and how to increase the speed of component operation in integrated circuit components is always a must-have point for everyone. : Important requirements when choosing. Therefore, the use of copper metal materials as the connection structure has been developed to achieve the purpose of improving the speed of component operation. However, the process of using copper metal as a multiple interconnect material has found that pressure-induced pores (Stress_lnduced
Voiding ;SIV)現象。因壓力而導致的孔隙現象與内連 料和基材以及介電層間的熱膨脹係數不同有很大的 由於金屬材料的熱膨脹係數比矽材料和介電材料大了數 倍,因此在加熱與冷卻循環製程中,由於金 與收縮係數大於四周的矽材料與介電材料,使得金屬)= 下,當金屬材料在某些方向受到應力產=:向:= 的方向移動以釋放應力。但是,受?:朝勹未又應力 包圍的金屬連線卻無法移動而釋放應=彳基材與介電材料 形成孔隙(Vo i d i ng )。這些孔隙會因為而在金屬材料間Voiding; SIV) phenomenon. The porosity caused by pressure is very different from the thermal expansion coefficient between the interconnect and the substrate and the dielectric layer. The thermal expansion coefficient of metal materials is several times larger than that of silicon materials and dielectric materials. Therefore, the heating and cooling cycles In the manufacturing process, due to the shrinkage coefficient of gold and silicon materials and dielectric materials larger than the surrounding, the metal) = down, when the metal material is stressed in some directions =: move in the direction of = to release the stress. But suffer? : The Hajj is not stressed. The metal wire surrounded by it cannot move and is released. The hafnium substrate and the dielectric material form a void (Vo i d i ng). These pores will
Electro-migration)的關係,進行移、洞電子遷移(Void 這些在内連線結,構中出現的孔隙,在^聚集。 小的情況下,對電路導電的影響並不:線寬沒有那麼窄 寬的降低,孔隙的遷移與聚集卻造,但現在隨著線 題。 電路失效的嚴重問 五、發明說明(3) 發明内容 鑒於上述之止此 ^ 小的電路元# 3術中,金屬連線中產生孔隙會對線寬趨 係為提供= 因此,本發明的目的之- 該第二金屬ίΐϊί 降低由該第-金屬區域往 拍# 屬區域移動之一孔隙數量。 Χ 以上述目的,本發明改盖今属 一,係針對文σ金屬連線產生孔隙的結構之 修飾,使庫力ίΐΐ ί:區連線的連接處轉角做-削角 括:-第-金屬區域鱼今=的速率’此結構包 域係與第二金屬區域連才妾 ;:第-金屬區 第一金屬f砝々眘危· 直且第一金屬區域之寬度小於 屬區域二^ 又,^及,一第三金屬區域位於第二金 ^ 一側,且此第三金屬區域係與 第二金屬區域相連接。 矛金屬&域以及 本發明所揭露一另一結構,孫名士 相接的# s , x #係在大£域連線與小區域連線 相接的位置别’加入一道由非金屬材料所構 (S 1 〇 t )區域,改變應力場使金層材 ' 低,此結構包括:―第巧=率: 第二金屬區域連接,t且第二金屬區 二之寬度小於第-金屬區域之寬度;卩及,位於第一 區域中的狹縫@其中上述之狹縫係位於該第—金屬區^ :? 一第二金屬區域相接之一端’且由一絕緣材料所構’、 利用本發明之虚擬結構’可改變金屬材料的應力場而使金Electro-migration), the migration, hole electron migration (Void these interconnected junctions, the pores appearing in the structure, gathered in ^. In a small case, the impact on circuit conduction is not: the line width is not so narrow The reduction of the width has caused the migration and aggregation of pores, but now with the line problem. Serious problems of circuit failure V. Description of the invention (3) Summary of the invention In view of the above, the small circuit element # 3 In the operation, metal wiring The generation of pores in the line width tends to provide = Therefore, the purpose of the present invention is to reduce the number of pores in the second metal region from the first metal region to the second region. Χ With the above purpose, the present invention This is a modification to the structure of the pores generated by the metal σ metal connection, so that the corner of the junction of the Ku Li ί: area connection is made-chamfered:---the rate of metal in the metal area The structure domain is connected to the second metal region; the first metal f of the first-metal region is cautious. Straight and the width of the first metal region is smaller than that of the second region, and a third metal. The area is on the side of the second gold ^ and this The three metal region is connected to the second metal region. The spear metal & field and another structure disclosed in the present invention, the #s, x # connected by Sun Mingshi are connected to the large region and the small region. The position of the connection is not to add a region made of non-metallic materials (S 1 0t), change the stress field to make the gold layer material low, this structure includes:-the first metal = rate: the second metal area is connected, t and the The width of the second metal region is less than the width of the first metal region; and, the slit located in the first region @ wherein the above-mentioned slit is located in the first metal region ^ :? A second metal region is connected to one end 'Constructed by an insulating material' and utilizing the virtual structure of the present invention 'can change the stress field of a metal material to make gold
第7頁 578264 五、發明說明(4) $ =料中的孔隙移動速率降低,藉以改善孔隙聚集程度而 ^長電路元件的熱循環壽命。 貫施方式: 第2圖所繪示為一般金屬層結構的上方示意圖。請參照第2 ® 般金屬層12為一凸字形區域,其凸出端即為金屬插 J16:連接位置。㈣明背景中提到,金屬層以可能因為 冷熱循環製程,而在金屬層12中產生孔洞與縫隙。並且, ,==金屬本身為粒狀(Grain)結構,因此在沉積過程中多 Πΐίίί洞與縫係存在金屬層12中。這些孔洞與縫 孔隙2曰4。^ i力的關係進行移動並聚集,而產生如第1圖之 夷16連接&二孔隙24多發生在金屬層12之凸起端與金屬插 如此,而造成電路失效的問題。因此, 本發明之敘述更力連線產生孔隙的結構,為了使 圖至第6 Κ之圖示盡與元備’可參照Τ列描述並配合第3 首先,請參昭楚Q S3 _ 0 上方示意圖發明Λ:所繪示為本發明金屬 線區域100以及_ a結構中,可分為較大的金屬連 域100中的應力二、:屬連線區域102。由於金屬連線區 示)合由金屬ί Γ 因此一般金屬材料中的孔隙(未繪 而累θ積在金屬連連線區域金屬連線區域1。2的方向移動, 介面上。因:Ϊ: 端與金屬插塞(未繪示)連接的 因此,本發明在金屬連線區域1〇〇與金屬連Page 7 578264 V. Description of the invention (4) $ = The rate of pore movement in the material is reduced to improve the degree of pore aggregation and increase the thermal cycle life of circuit components. Implementation method: FIG. 2 shows a schematic diagram of a general metal layer structure. Please refer to Section 2 ® The metal layer 12 is a convex area, and its protruding end is the metal plug J16: connection position. It is mentioned in the background of the Ming that the metal layer 12 may have holes and gaps in the metal layer 12 due to the hot and cold cycling process. And, == metal itself is a granular structure, so many holes and seams exist in the metal layer 12 during the deposition process. These holes and slits are 2 to 4. ^ The relationship of the force is moved and aggregated, and the connection 16 and the two pores 24 as shown in Fig. 1 occur mostly at the convex end of the metal layer 12 and the metal insertion, which causes the problem of circuit failure. Therefore, the description of the present invention is more strongly connected with the structure that generates pores. In order to make the diagrams in Figures 6 to 6K as complete as possible, you can refer to the T column to describe and cooperate with the third one. Schematic invention Λ: In the structure of the metal line area 100 and _a of the present invention, it can be divided into the stress in the larger metal connection area 100. It belongs to the connection area 102. Because the metal connection area is shown by the metal Γ, the pores (not shown and accumulated θ) in the general metal material are accumulated in the metal connection area and the metal connection area 1.2 moves in the direction of the interface. Because: Ϊ: The end is connected to a metal plug (not shown). Therefore, the present invention is connected to the metal in the metal connection area 100.
第8頁 578264 五、發明說明(5) 102連接的轉角處加入金屬連線區域1〇4,此金屬連線區域 的相鄰兩邊並分別與金屬連線區域丨〇〇以及金屬連線區域 1 0 2相接。 本發明此一結構的特點在於加入金屬連線區域1 0 4,使得金 屬連線區域1〇〇到金屬連線區域102之間的應力梯度減緩, 所以可達到減低孔隙移動速率的目的。 ,本發明一較佳實施例中,金屬連線區域丨〇 4的形狀為等邊 二角,,如第3圖所示。但是,上述形狀為具有45度斜邊之 等邊三角形的金屬連線區域丨〇4僅為舉例,具有例 6〇度等其他斜邊角度之三角形的金屬連線區4:,』= 他例如方幵7形狀的金屬連線區域1 〇 4皆可應用在本發明中, 本發明不限於此。 =了上述結構外,本發明更揭露另一種結構,也可具有改 二,屬連線產生孔隙的效果。請參照第4圖,第4圖所繪示 二發月金屬層結構的上方示意圖。本發明此一金屬層結 連線二同02樣分而為較大的金屬連線區域200以及較小的金屬 2=202,而孔隙(未繪示)係由金屬連線區域2〇〇往金 屬連線區域202的方而孩m 9nn . 4 + A 、白移動。因此,本發明在金屬連線區域 寸 、’、、連線區域20〇連接金屬連線區域202的位置 2屬材^,、而f 區域204。此狹縫區域2〇4的材質並非 丄可:二疋, ZU4可與包圍金屬連繞周囹 、 以乂制你入思旺策門圍;1電層沉積製程中同時製造, 以及在製作金屬層預宗阊安* ^ # 1 X 病A Μ預圖案時即保留狹縫區域204的位置, 使其不被後續金屬材料所填滿。 置Page 8 578264 V. Description of the invention (5) 102 The metal connection area 10 is added to the corner of the 102 connection, and adjacent sides of the metal connection area and the metal connection area 丨 〇〇 and the metal connection area 1 0 2 connected. The feature of this structure of the present invention is that the metal connection region 104 is added to reduce the stress gradient between the metal connection region 100 and the metal connection region 102, so that the purpose of reducing the pore movement rate can be achieved. In a preferred embodiment of the present invention, the shape of the metal connecting region 4 is an equilateral corner, as shown in FIG. 3. However, the above-mentioned shape of the metal connection area of the equilateral triangle with a 45-degree hypotenuse is only an example, and the metal connection area of a triangle with other hypotenuse angles such as Example 60 degrees 4 :, "= for example Any of the metal wiring regions 104 of the square 7 shape can be applied in the present invention, and the present invention is not limited thereto. In addition to the above-mentioned structure, the present invention further discloses another structure, which may also have the effect of improving the pores caused by the connection. Please refer to FIG. 4, which is a schematic diagram of the upper layer of the Erfayue metal layer structure. According to the present invention, the two metal layer junctions are divided into two parts like 02 to form a larger metal connection area 200 and a smaller metal 2 = 202, and the pores (not shown) pass from the metal connection area 200 to The square of the metal connection area 202 is 9 m. 4 + A and moves in white. Therefore, in the present invention, the position 2 where the metal connection region 202 is connected to the metal connection region 202, and the f region 204. The material of this slit area 204 is not acceptable: two, ZU4 can be connected with the surrounding metal to make you enter the Siwangze gate; 1 is manufactured simultaneously in the process of electric layer deposition, and it is also used to make metal The layer pre-construction 阊 安 * ^ # 1 X disease A Μ pre-patterning, the position of the slit region 204 is retained so that it is not filled with subsequent metal materials. Set
$ 9頁 578264$ 9 pages 578264
f本發明車又佳κ施例中,由於製程關係,狹縫2⑽之深度 係與金屬連線區域20 0的深度相同,但此僅為舉例,本發明 =限於此。值得注意的是,第4圖之金屬連線區域2 〇 〇中且 有一道狹縫僅為舉例,可視製程與實際需要,在金屬連線 二區域200中形成其他數量的狹縫,本發明不限於此。舉例來 說^本發明在另一實施例中,在金屬連線區域中形成兩 道較第4圖更為狹窄之狹縫2〇4,如第5圖所示。 、 並且,狹縫204之形狀除了如第4圖與第5圖所示之較為細長· 住金屬連線區域2 02之接口外,也可為如第6圖所示之 、乍升y且不遮住金屬連線區域2〇2之接口。當狹縫2〇4形狀 為士第4 ϋ與第5圖所示之細長形時,因為狹縫2 〇 *播住孔隙修 往金屬連線區域202的移動路徑,所以孔隙會繞過狹縫2〇4 向金屬連線區域202移動。由於孔隙移動路徑增長的關係, 因此可改善孔隙在金屬連線區域2〇2尾端與金屬插塞接觸介 面的聚集現象,並使元件壽命增長。另外,當狹縫2〇4之形 f為如第6圖之寬窄形時,因為兩道狹縫“彳可分別隔離金 連線區域200上方與下方的孔隙,僅有位於兩道狹縫2〇4 之間的孔隙較易移動到金屬連線區域2〇2中,因此較習知整 個金屬連線區域2〇2的孔隙皆容易移動到金屬連線區域2〇2 中的情況為緩和,0此也達到改善電路因孔隙而失效的問鲁 題0 本么月之、、、°構中’當狹縫204位置位於金屬連線區域200 ^ ,在金屬連線區域2〇〇接近金屬連線區域2〇2的一端, 皆應可具有相同的功效,因此,本發明不限至於狹縫2〇4的f In the preferred embodiment of the car of the present invention, due to the manufacturing process, the depth of the slit 2⑽ is the same as the depth of the metal connection area 200, but this is only an example, and the present invention is limited to this. It is worth noting that there is a slit in the metal connection area 2000 of FIG. 4 as an example. Depending on the process and actual needs, other numbers of slits are formed in the metal connection area 200. The present invention does not Limited to this. For example, in another embodiment of the present invention, two narrow slits 204 that are narrower than those in FIG. 4 are formed in the metal connection region, as shown in FIG. 5. In addition, the shape of the slit 204 may be, as shown in FIG. 4 and FIG. 5, the interface that is relatively long and slender, and the metal connection area 202 may also be as shown in FIG. Cover the interface of metal wiring area 202. When the shape of the slit 204 is slender as shown in Figures 4 and 5, since the slit 20 * broadcasts the movement path of the pore repairing to the metal connection area 202, the pore will bypass the slit. 204 moves toward the metal wiring region 202. Due to the growth of the pore movement path, the accumulation of pores at the end of the metal connection area 202 and the contact surface of the metal plug can be improved, and the life of the device can be increased. In addition, when the shape f of the slit 204 is as wide and narrow as shown in FIG. 6, because the two slits "彳 can separate the pores above and below the gold connection area 200, only the two slits 2 The pores between 〇4 are easier to move into the metal wiring area 202, so it is easier to mitigate the fact that the pores of the entire metal wiring area 202 are easily moved into the metal wiring area 002. 0 This also achieves the problem of improving the failure of the circuit due to the pores. 0, the structure of this month, when the position of the slit 204 is located in the metal connection area 200 ^, and the metal connection area 200 is close to the metal connection. One end of the line area 202 should have the same effect. Therefore, the present invention is not limited to the
第10頁 五、發明說明(7) =狀、長度、尺寸與面積等等,可視實際需要而加以設 另外,上述一較大的金屬連線區域連接一 區域僅為舉例,在實際製程與產品中, 接數個小金屬連線區域…,本 金屬連線區域的數量。因此,可分別針對各較大金 = 連線區域之間’增加上述本發明之-金屬削 狹縫的虛擬結•’而達到改善金屬連線中產生孔 4在圖本、發第明5:=例中,在電路元件中形成如上述第3圖、第 • 圖或第6圖之銅金屬内連線結構,皆可使電路a #· ==5:下約5〇0小時的供烤測試二二二“件 件中金屬連線產生孔隙現象的效果。並由 明不僅、Γ i:改善’而提昇電路元件的品質。但是,本發 問顔日^二金屬連線材料,其他金屬連線材料產生孔隙 二。寺’亦可利用本發明之結構加以改善’本發明不限於 2悉此技術之人員所瞭解的,以上所述僅為本發明之較 =鉍例而已,並非用以限定本發明之申請專利範圍;凡 二匕未脫離本發明所揭示之精神下所完成之等效改變 飾,均應包含在下述之申請專利範圍内。 578264 圖式簡單說明 本發明的較佳實施例將於輔以下列圖形做更詳細的闡述, 其中: 第1圖所繪示為一般積體電路元件中多重内連線的側剖面示 意圖, 第2圖所繪示為一般金屬層結構的上方示意圖; 第3圖所繪示為本發明金屬層結構之第一實施例的上方示意 圖; 第4圖所繪示為本發明金屬層結構之第二實施例的上方示意 , 圖; 第5圖所繪示為本發明金屬層結構之第三實施例的上方示意 圖;以及 第6圖所繪示為本發明金屬層結構之第四實施例的上方示意 圖0 圖號對照說明: 10 基 材 12 金 屬 層 14 介 電 層 16 金 屬 插 塞 18 介 電 層 20 金 屬 層 22 介 電 層 24 孔 隙 100 金 屬 連 線 區 域 102 金 屬 連 線區 域 104 金 屬 連 線 Ιά 域 200 金 屬 連 線區 域 202 金 屬 連 線 區 域 204 狹 縫 區 域Page 10 V. Description of the invention (7) = shape, length, size, area, etc., can be set according to actual needs. In addition, the connection of a large metal connection area to an area is just an example. In the actual process and product Medium, connected to several small metal connection areas ..., the number of this metal connection area. Therefore, it is possible to improve the production of holes in the metal wiring by increasing the virtual junction of the above-mentioned metal cutting slits of the present invention between each of the large gold = connection areas 4: In the example, the copper metal interconnect structure as shown in Figure 3, Figure • or Figure 6 above can be formed in the circuit element, which can make the circuit a # · == 5: about 50,000 hours of baking Test the effect of pores caused by metal wiring in parts. The quality of circuit components is improved by not only Ming, Γ i: improvement. However, this question asks about the metal wiring materials, other metal wiring The wire material generates pores 2. The temple can also be improved by using the structure of the present invention. The present invention is not limited to those skilled in the art. The above description is only a comparison of the present invention, and is not an example of bismuth. The scope of patent application of the present invention; any equivalent alterations made without departing from the spirit disclosed by the present invention shall be included in the scope of patent application described below. 578264 The diagram briefly illustrates the preferred embodiment of the present invention A more detailed explanation will be supplemented by the following graphics Among them: FIG. 1 shows a schematic side sectional view of multiple interconnects in a general integrated circuit element, and FIG. 2 shows an upper schematic view of a general metal layer structure; FIG. 3 shows a metal of the present invention. The upper schematic view of the first embodiment of the layer structure; FIG. 4 illustrates the upper schematic view of the second embodiment of the metal layer structure of the present invention; FIG. 5 illustrates the third implementation of the metal layer structure of the present invention The upper schematic view of the example; and FIG. 6 is the upper schematic view of the fourth embodiment of the metal layer structure of the present invention. 0 Drawing number comparison description: 10 substrate 12 metal layer 14 dielectric layer 16 metal plug 18 dielectric layer 20 Metal layer 22 Dielectric layer 24 Aperture 100 Metal connection area 102 Metal connection area 104 Metal connection area 200 Metal connection area 202 Metal connection area 204 Slit area
第12頁Page 12
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CN108847411A (en) * | 2018-06-22 | 2018-11-20 | 武汉新芯集成电路制造有限公司 | A kind of interconnecting construction enhancing stress migration reliability |
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CN108847411A (en) * | 2018-06-22 | 2018-11-20 | 武汉新芯集成电路制造有限公司 | A kind of interconnecting construction enhancing stress migration reliability |
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