TW577119B - Semiconductor wafer dicing method - Google Patents

Semiconductor wafer dicing method Download PDF

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Publication number
TW577119B
TW577119B TW91133274A TW91133274A TW577119B TW 577119 B TW577119 B TW 577119B TW 91133274 A TW91133274 A TW 91133274A TW 91133274 A TW91133274 A TW 91133274A TW 577119 B TW577119 B TW 577119B
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Taiwan
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wafer
photoresist layer
semiconductor wafer
active surface
layer
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TW91133274A
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Chinese (zh)
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TW200407996A (en
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Wei-Chun Kung
Liang-Cheng Chang
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Advanced Semiconductor Eng
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Publication of TW200407996A publication Critical patent/TW200407996A/en

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Abstract

A semiconductor wafer dicing method is utilized by forming photo-resist layers and adhesive layers on the wafer active surface and inactive surface respectively in order to etch the scribe line away to complete dicing without using cutting blades. In such manner, the semiconductor wafer will be prevented from chipping and cracking in the steps of dicing.

Description

五、發明說明(1) (一)、【發明所屬之技術領域】 本發明係關於一種晶圓分割方法,尤關於一種以敍刻 方式分割以避免晶圓於分割過程中之崩裂破壞之半導體1 圓分割方法。 Ba (二)、【先前技術】 半導體晶片封裝係由晶圓分割成複數個半導體晶片單 元後,再提供一基板並將分割後之半導體晶片單元以B打線 方式電性連接該基板,之後,藉由封膠材質包覆該半導體 晶片單元以形成。或者,以覆晶封裝方式電性連接該基 板。傳統之分割步驟係將晶圓固定於一剛性板(r i g i d Plate)或加勁板(reinf0rcing plate)上,藉由切割刀切 割晶圓主動表面之切割道以分割晶圓為複數個晶片°。由於 晶圓之主要組成材料係為矽,而矽材質本身為一脆性材 料,故在晶圓進行切割步驟時,常會造成晶圓表面之崩 損壞,進而使切割後之半導體晶片邊緣不平整,導致電^ =為於切割薄晶圓(thi一)時,晶圓之崩裂破 後之:ΐ體晶圓分割時之崩裂損· ’以保持分割 晶片封裝構造之良好實為一重要的課題。冑乂達成+導體 (三)、【發明内容】 鑑於上述課題,本發明之目的係在於提供一種避免晶 577119 五 發明說明(2) ___ 分1方^ ^刀造成晶圓表面之崩裂損壞的半導體晶圓 法,i $ 3二:驟本t明係提供-種半導體晶圓分割方 表面及背n Γ動表=:半導體晶圓,其具有-主動 別設置光阻層於晶圓= = 數條切割道於其上;分 切割道;蝕刻晶圓動表面上並暴露出該複數條 背面之光阻芦· # #動表面之切割道以暴露出形成於晶圓 移除該曰si 黏著層於晶圓主動表面之光阻層上; 秒呀…豕日日回背面之光 移除晶圓主動表面之数展接者形成一黏者層於晶圓背面; 驟。 黏者層及光阻層以完成晶圓之分割步 本發明係利用設w於θ同古 黏著層,以蝕刻之太ί ΐ 面之光阻層及光阻層上之 之方法,以僻1Β式取代傳統以切割刀分離半導體晶圓 W避免晶圓切割時,晶圓表面之崩裂損壞。 (四)、【實施方式】 導體晶圓分割:t關圖《’以說明本發明較佳實施例之半 圖1至圖7後招 - 法時之狀態示意圖Γ利用本發明較佳實施例之晶圓分割方 半導體Γ圓:Γ,:曰發圓:之且半:體晶圓分割方法係提供- "2;該晶圓主動及, 請參照圖2,將夯阻#1泠有複數條刀割道11 3。 夺先阻劑塗佈於該晶圓主動表面111及背 577119 五、發明說明(3) Γ、12顯νΛ中,光阻劑塗佈於主動表面111後,藉由曝 -烘烤::、以暴露出該複數條切割道113。之後,進行 光阻層广2及^分!1於晶圓主動表面111及背面112形成第- 成於:η 2 Γ 層13,惟該第一光阻層12係不連續形 面111上°此外’亦可設置-感光性乾膜 声u毹晶圓,以分別形成第一光阻層12及第二光阻 層13於该主動表面111及背面112。 之切H;、: 3 ’利用蝕刻技術,蝕刻該晶圓主動表面111 個分:U/露出該第二光阻層13,藉此形成複數 列之ΐ體晶片14黏著於第:光阻層13上。其中餘 ;in 式蝕刻及乾式蝕刻。由於乾式蝕刻為- 性UniSotropic)餘刻,尤其是往下(垂直方向)之 橫方向上之㈣能力強’因此㈣之&,餘刻處 ^輪廓將十分的平直,角度將接近9 :割後之截面將較為平[故乾式㈣為最佳之成 式。 請參照圖4,形成一第一黏著層15(adhesive Uye ^第-光阻層12之表面上’丨中該第—黏著層15可為一膝 帶。接著,移除分割後之半導體晶片背面142之第二光阻 fl3,並藉由該第一黏著層15將分割後之複數個晶片_ 定之。 請參照圖5至圖7,完成上述步驟後,再形成一第二黏 著層16於該分割後之半導體晶片背面142 (如圖5所示) 接著,移除該等半導體晶片主動表面141(該晶圓主動表面V. Description of the invention (1) (1), [Technical field to which the invention belongs] The present invention relates to a method for slicing a wafer, and more particularly to a semiconductor that is singulated to avoid chipping and destruction of the wafer during the singulation process. Circle segmentation method. Ba (II) [Previous technology] The semiconductor wafer package is divided into a plurality of semiconductor wafer units by a wafer, and then a substrate is provided and the divided semiconductor wafer units are electrically connected to the substrate by a B-bonding method. The semiconductor wafer unit is covered with a sealant material to form. Alternatively, the substrate is electrically connected in a flip-chip package. The conventional singulation step is to fix the wafer on a rigid plate or a rigid plate, and then cut the dicing path of the active surface of the wafer with a dicing blade to divide the wafer into a plurality of wafers. Since the main component material of the wafer is silicon, and the silicon material itself is a brittle material, when the wafer is subjected to the dicing step, it often causes the wafer surface to collapse and damage, which in turn makes the edge of the semiconductor wafer after the dicing uneven. Electrical ^ = is for cutting thin wafers (thi-1), after the wafers are broken and broken: the chipped wafers are broken during slicing · 'It is an important issue to maintain the good quality of the divided wafer package structure.胄 乂 Achieve + Conductor (3), [Summary of the Invention] In view of the above problems, the object of the present invention is to provide a semiconductor that avoids crystal 577119. 5 Description of the invention (2) ___ Divide 1 square ^ ^ knife to cause chipped and damaged semiconductor surface Wafer method, i $ 32: The book t provides a kind of semiconductor wafer split surface and back n Γ moving table =: semiconductor wafer, which has-actively set a photoresist layer on the wafer = = number A plurality of dicing lines are formed thereon; the dicing lines are etched; the photoresist on the moving surface of the wafer is exposed to expose the plurality of photoresistors on the back surface. # #The dicing lines on the moving surface are exposed to form the wafer and the adhesive layer is removed. On the photoresist layer on the active surface of the wafer; Seconds ... The next day's back light removes the active surface of the wafer to form a sticky layer on the back of the wafer; The adhesive layer and the photoresist layer are used to complete the dividing step of the wafer. The present invention uses a method in which the photoresist layer and the photoresist layer on the surface of the ί are etched on the θ same ancient adhesion layer. This method replaces the conventional method of separating semiconductor wafers with a dicing knife to avoid chipping damage on the wafer surface during wafer dicing. (IV) [Embodiment] Conductor wafer segmentation: t diagram "" to illustrate the half of the preferred embodiment of the present invention, Figure 1 to Figure 7-after the method-a schematic diagram of the state Γ using the preferred embodiment of the present invention Wafer Dividing Square Semiconductor ΓCircle: Γ, Said Roundness: And Half: Volume Wafer Dividing Method is provided-"2; the wafer is active and, please refer to Fig. 2, will ram resistance # 1 Ling has plural Knife cut road 11 3. Preemptive resist is coated on the active surface 111 and back of the wafer 577119 V. Description of the invention (3) Γ, 12 shows νΛ, after the photoresist is coated on the active surface 111, it is exposed-baking :: ,, To expose the plurality of cutting lanes 113. After that, perform photoresist layer 2 and 2 minutes! 1 Form the first-formed on the active surface 111 and the back surface 112 of the wafer: η 2 Γ layer 13, but the first photoresist layer 12 is on the discontinuous surface 111 ° In addition, 'can also be set-photosensitive dry film sound u The wafer is stacked to form a first photoresist layer 12 and a second photoresist layer 13 on the active surface 111 and the back surface 112, respectively. Cut H;,: 3 'Use etching technology to etch 111 active surfaces of the wafer: U / expose the second photoresist layer 13, thereby forming a plurality of rows of carcass wafers 14 adhered to the first: photoresist layer 13 on. The rest; in-etching and dry etching. Because dry etching is a unisotropic one, especially the downward direction (vertical direction), the horizontal direction is strong. Therefore, the contour will be very straight and the angle will be close to 9: The cut section will be flatter [therefore the dry type is the best one. Referring to FIG. 4, a first adhesive layer 15 is formed on the surface of the first photoresist layer 12. The first adhesive layer 15 may be a knee strap. Then, the back of the divided semiconductor wafer is removed. The second photoresist fl3 of 142, and the divided plurality of wafers are determined by the first adhesive layer 15. Please refer to FIG. 5 to FIG. 7, after completing the above steps, a second adhesive layer 16 is formed on the Back surface 142 of the divided semiconductor wafers (as shown in FIG. 5) Then, the active surfaces 141 of the semiconductor wafers are removed (the active surfaces of the wafers)

577119 五、發明說明(4) 111 )上之第一黏著 晶片主動表面 除,以完成晶圓分 可猎由晶片抓取裝 於封裝載具上,以 於本實施例之 了易於說明本發明 制於該實施例,因 專利範圍之情況, 層15(如圖^ 过曰m 所示)。最後將該等半導體 驟主動表面U1)之第一光阻層12移 二广二一再者,分割後之複數個晶片1 4 置t未標示於圖例),將其分別抓取設置 進行後續之晶片封裝步驟。 詳細說明中所提出之具體的實施例僅為 :技:内$,而並非將本發明狹義地限 ,在不超出本發明之精神及以 可作種種變化實施。 T明577119 V. Description of the invention (4) 111) The first adhesive wafer active surface is removed to complete wafer sub-hunting. The wafer is grabbed and mounted on a packaging carrier. This example is easy to explain. In this embodiment, because of the scope of the patent, layer 15 (shown as m in Figure ^). Finally, the first photoresist layer 12 of the semiconductor active surface U1) is shifted to two, two, and one again, and the plurality of wafers 14 after the division are set to t (not shown in the legend), and they are respectively grasped and set for subsequent operations. Chip packaging steps. The specific embodiments provided in the detailed description are only: technology: internal $, rather than narrowly limiting the present invention, and can be implemented without departing from the spirit of the present invention and with various changes. T Ming

577119 圖式簡單說明 (五) [ 圖 式 簡 單 說 明 ] 圖 1至圖7 為 —一 示 意 圖 5 其 顯 示 本發明較佳實施例之晶 圓分 割 狀 態 〇 圖 8為- -流程圖 ,顯示本發明較佳實施例之晶圓分割 的流 程 0 元件 符 號 說 明 I 11 半 導 體 晶 圓 111 半 導 體 晶 圓 主 動 表 面 112 半 導 體 晶 圓 背 面 113 切 割 道 12 第 光 阻 層 13 第 二 光 阻 層 14 分 割 後 之 半 導 體 晶 片 141 半 導 體 晶 片 主 動 表 面 142 半 導 體 晶 片 背 面 15 第 —一 黏 著 層 16 第 二 黏 著 層 81 提 供 _ — 晶 圓 82 形 成 光 阻 層 於 晶 圓 主 動 表 面 及 背面並暴露出切割道 83 1 虫 刻 切 割 道 以 分 割 晶 圓 為 複 數 個晶片 84 形 成 第 一 黏 著 層 於 第 一 光 阻 層 上 85 移 除 第 二 光 阻 層 86 形 成 第 二 黏 著 層 於 晶 片 背 面577119 Brief description of the drawings (five) [Simplified description of the drawings] Figures 1 to 7 are-a schematic diagram 5 which shows the wafer division state of the preferred embodiment of the present invention. Figure 8 is a flowchart showing The process of wafer division of the preferred embodiment 0 Description of component symbols I 11 Semiconductor wafer 111 Active surface of semiconductor wafer 112 Back side of semiconductor wafer 113 Cutting track 12 First photoresist layer 13 Second photoresist layer 14 Divided semiconductor wafer 141 Active surface of semiconductor wafer 142 Back of semiconductor wafer 15 First-adhesive layer 16 Second-adhesive layer 81 Provides _ — Wafer 82 Forms a photoresist layer on the active surface and back of the wafer and exposes the dicing path 83 1 Insect dicing path for division The wafer is a plurality of wafers 84 to form a first adhesive layer on the first photoresist layer 85 to remove the second light The resist layer 86 forms a second adhesive layer on the back of the wafer.

第8頁Page 8

577119 圖式簡單說明 8 7 移除第一光阻層 88 完成晶圓分割 II·!577119 Schematic description 8 7 Remove the first photoresist layer 88 Finish the wafer division II!

Claims (1)

577119 六、申請專利範圍 1. 一種半導體晶圓分割方法,包含: 提供一晶圓,該晶圓具有一主動表面及相對於該主動表面 之一背面,該主動表面上具有複數條切割道; 形成一第一光阻層於該晶圓主動表面並暴露出該等切割 道; 形成一第二光阻層於該晶圓背面; 蝕刻該等切割道以暴露出該第二光阻層; 形成一第一黏著層於該第一光阻層上; 自該晶圓背面移除該第二光阻層; 形成一第二黏著層於該晶圓背面; 移除該第一黏著層以暴露出該第一光阻層;及 移除該第一光阻層。 2. 如申請專利範圍第1項之半導體晶圓分割方法,其中在 提供晶圓之步驟之前,更包括一研磨晶圓背面之步驟。 3. 如申請專利範圍第1項之半導體晶圓分割方法,其中該 第一黏著層係為一膠帶。 4. 如申請專利範圍第1項之半導體晶圓分割方法,其中該 第二黏著層係為一膠帶。577119 6. Application Patent Scope 1. A method for dividing a semiconductor wafer, comprising: providing a wafer having an active surface and a back surface opposite to the active surface, the active surface having a plurality of scribe lines; forming A first photoresist layer on the active surface of the wafer and exposing the scribe lines; forming a second photoresist layer on the back of the wafer; etching the scribe lines to expose the second photoresist layer; forming a A first adhesive layer on the first photoresist layer; removing the second photoresist layer from the back of the wafer; forming a second adhesive layer on the back of the wafer; removing the first adhesive layer to expose the A first photoresist layer; and removing the first photoresist layer. 2. The method for dividing a semiconductor wafer according to item 1 of the patent application scope, which further includes a step of polishing the back of the wafer before the step of providing the wafer. 3. The method for dividing a semiconductor wafer according to item 1 of the patent application, wherein the first adhesive layer is an adhesive tape. 4. The method for dividing a semiconductor wafer according to item 1 of the patent application, wherein the second adhesive layer is an adhesive tape. 第10頁Page 10
TW91133274A 2002-11-13 2002-11-13 Semiconductor wafer dicing method TW577119B (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7361532B2 (en) 2004-12-24 2008-04-22 Seiko Epson Corporation Method of manufacturing semiconductor device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7361532B2 (en) 2004-12-24 2008-04-22 Seiko Epson Corporation Method of manufacturing semiconductor device

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