TW569659B - Multi-layered circuit board with high heat dissipation - Google Patents

Multi-layered circuit board with high heat dissipation Download PDF

Info

Publication number
TW569659B
TW569659B TW92109134A TW92109134A TW569659B TW 569659 B TW569659 B TW 569659B TW 92109134 A TW92109134 A TW 92109134A TW 92109134 A TW92109134 A TW 92109134A TW 569659 B TW569659 B TW 569659B
Authority
TW
Taiwan
Prior art keywords
layer
circuit board
patent application
item
scope
Prior art date
Application number
TW92109134A
Other languages
Chinese (zh)
Other versions
TW200423844A (en
Inventor
Ming-Hsiung Liu
Ming-Hsiang Yang
Yuan-Fa Chu
Kuo-Hua Fan
Original Assignee
Giga Byte Tech Co Ltd
Neo Led Technology Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Giga Byte Tech Co Ltd, Neo Led Technology Co Ltd filed Critical Giga Byte Tech Co Ltd
Priority to TW92109134A priority Critical patent/TW569659B/en
Application granted granted Critical
Publication of TW569659B publication Critical patent/TW569659B/en
Publication of TW200423844A publication Critical patent/TW200423844A/en

Links

Landscapes

  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Structure Of Printed Boards (AREA)

Abstract

A multi-layered circuit board with high heat dissipation is disclosed, wherein a metal plate is used as the substrate of the multi-layered circuit board, plural insulation layers and circuit layers are stacked to form the multi-layered circuit board structure. The whole metal substrate can transmit the heat generated by the device on the multi-layered circuit board, so as to increase the heat dissipation surface area. The insulation layer in the multi-layered circuit board structure has micro-pores on its surface, which can increase the adherence force to reduce the usage of adhesive agent. Also, the metal coating layer can effectively isolate the electromagnetic interference phenomenon.

Description

569659 案號 92109134 五、發明說明(1) 【發明所屬之技術領域】 本發明是關於'種多層 熱之多層電路板。 【先前技術】 在電子系統產品中,一 刷電路板(Printed Circui 璃纖維布或軟性基材所組成 上導電層。或是在基板上形 程,將複數個電路層和絕緣 完成多層印刷電路板的製作 小」之設計概念,印刷電路 層數、細線路發展,其中, 度的良好解決方案。 然而破璃纖維布或軟性 印刷電路板上的元件需以空 傳導方式散熱,無法將元件 而使得元件的效能降低,甚 多層印刷電路板更為嚴重。 此外,目前多層電路板 =金屬層或鋼羯等高導埶性 二印刷電路板的熱傳導性質 :有函素的難燃劑,而難以 u I的規疋,將限569659 Case No. 92109134 V. Description of the invention (1) [Technical field to which the invention belongs] The present invention relates to a 'multi-layer thermal multilayer circuit board'. [Previous technology] In electronic system products, a brushed circuit board (Printed Circui glass fiber cloth or flexible substrate composed of a conductive layer. Or on the substrate, a plurality of circuit layers and insulation to complete a multilayer printed circuit board The design concept of "small production", the number of printed circuit layers and fine lines development, among which, a good solution. However, the components of broken glass fiber cloth or flexible printed circuit boards need to be conducted in a conductive way to dissipate heat. The efficiency of the components is reduced, and even multi-layer printed circuit boards are more serious. In addition, the current multi-layer circuit boards = metal layers or high-conductivity high-conductivity printed circuit boards such as steel reeds. I's regulations will be limited

加離子料π + J 于性不純物’使基板的 電路板,特別是關於一種高散 般習知 t Boar 之平面 成電路 層加以 。隨著 板也朝 多層印 基材的 氣為熱 所累積 至減少 常利用 質的材 。但是 符合歐 未來發 介電及 用以承載電子元件之印 d,PCB),通常使用玻 狀基板,再於基底印刷 之後,藉由一膠合製 積層化,經加工處理, 電子產品走向「輕薄短 向小孔徑、高密度、多 刷電路板為提高線路密 ‘熱性質不佳,所以在 傳導介質。然而以空氣 的熱迅速有效的散失, 元件的哥命,此情形在 接著劑與熱壓方式,貼 料’以作為電路層或改 接著劑的配方中需加入 盟20 04年電子產品全面 展。且接著劑中往往添 系巴緣特性變差,以及在Adding ion material π + J to the impurities is used to make the circuit board of the substrate, especially the plane known as t Boar, a circuit layer. As the board is also moving towards the multilayer printed substrate, the heat accumulated by the heat is reduced to a reduced quality. However, in line with the future European dielectrics and printed boards (PCBs) used to carry electronic components, glassy substrates are usually used. After the substrate is printed, they are laminated by a glue system and processed. In order to improve the circuit density of small-aperture, high-density, multi-brush circuit boards, the thermal properties are not good, so it is in a conductive medium. However, the heat of the air is quickly and efficiently dissipated, and the component's life is in this case in the adhesive and hot pressing method. , The paste is used as the circuit layer or the formulation of the adhesive needs to be added to the comprehensive exhibition of electronic products in 2004. And the adhesive often adds the poor edge characteristics, and in the

第6頁 569659 __案號 92109134 ^ η B_修正 五、發明說明(2) 尚溫下容易造成基板扭曲變形,這些都會降低基板的可靠 度。同時,接著劑會因為化學品的侵蝕,使得印刷電路板 之金屬接著介面強度下降。所以如何在電路板中減少甚至 避免接著劑的使用,成為多層電路板的發展趨勢。 此外’由於現今之電子產品朝向高頻、高速與輕薄短小的 發展趨勢’因而在雜訊防止設計方面要求也相對提高,以 降低電子產品本身的雜訊干擾所造成的影響。所以在設計 上亦需增加許多裝置抑制電磁干擾現象(electr〇 EM I ),如電感器和鐵心濾波器 、重量和製作成本。因此印刷電 良,以提供可抑制雜訊干擾與提 magnetic interference 等,如此將增加許多空間 路板也需要作相對應之改 昇元件整合度之電路板。 【發明内容】 為 層電路 擇,有 減少甚 本 層電路 緣層之 加對電 性連接 來隔絕 於其上 改進習 板。其 效提昇 至避免 發明之 板的基 組合。 路層之 之用, 電磁干 方設置 目的係 其散熱 接著劑 高散熱 材,於 其絕緣 附著力 亦可於 擾。或 電路層 藉由多 性質並 的使用 之多層 金屬板 層具有 ’電路 最頂端 是對絕 ,以增 ’本發明揭露一種高散熱之多 層電路板結 隔绝電磁干 構設計和基材的選 電袼板,係 材表面堆疊 含有微孔洞 層係作為元 之絕緣層表 緣層進行適 進絕緣層和 擾現象,更進一步 以金屬板材作為多 複數個電路層和絕 之緩衝表面,以增 件的表面黏著與電 面增加金屬披覆層 當的表面處理,再 電路層之附著力。Page 6 569659 __Case No. 92109134 ^ η B_ Amendment V. Description of the invention (2) It is easy to cause distortion and deformation of the substrate at high temperature, which will reduce the reliability of the substrate. At the same time, due to the erosion of the adhesive, the strength of the metal bonding interface of the printed circuit board is reduced. Therefore, how to reduce or even avoid the use of adhesives in circuit boards has become the development trend of multilayer circuit boards. In addition, “the current trend of electronic products toward high frequency, high speed, thinness, and shortness” has led to relatively high requirements for noise prevention design to reduce the impact of noise interference on electronic products. Therefore, many devices need to be added to the design to suppress electromagnetic interference (electr0 EM I), such as inductors and core filters, weight and manufacturing costs. Therefore, the printed circuit board is good to provide a circuit board that can suppress noise interference and improve magnetic interference, which will increase many space circuit boards and also need to improve the component integration. [Summary of the Invention] For layer circuit selection, there is a need to reduce the edge layer of the current layer circuit and add electrical connections to isolate it and improve the board. The effect is improved to avoid the basic combination of the invention board. For the purpose of road layer, the setting of the electromagnetic stem is to dissipate the heat and then the high heat dissipating material, which can also interfere with its insulation adhesion. Or the circuit layer uses a multi-layered multi-layer metal plate layer to have 'the top end of the circuit is opposite to increase'. The present invention discloses a high-heat-dissipation multilayer circuit board junction insulation electromagnetic dry structure design and substrate selection. The surface layer of the board and the system material contains a micro-hole layer as the element's insulation layer. The surface edge layer is suitable for the insulation layer and the interference phenomenon. Furthermore, the metal plate is used as a plurality of circuit layers and the insulation surface. The surface adhesion and electrical surface increase the surface treatment of the metal coating layer, and then the adhesion of the circuit layer.

i用金屬材料的高執傳 板之元件所產生的熱量傳m質丄ί將設置於多層電路 之表面積增加。絕緣個金屬基材,使熱量散逸 力,從而省本妓一^ θ綾衝表面能增加電路層的附著 絕緣層或是於π:::使用,其緩衝表面可藉由表面處理 成。=二上具有微孔洞結構之薄層形 電磁干擾現象。、,,°構中增加金屬坡覆層能更有效隔絕 為使對本發明的目的、 了解,茲配合圖示詳細說明 【實施方式】. 構造特徵及其功能有進一步的 如下: 本^明所揭露的高散熱之多層電路板;係透過基板的 …構設計使多層電路板的降溫速度變快,並隔絕電磁干擾 現象,以及避免接著劑的使用。 其多層電路板結構係以金屬板材作為基材。配合基板 結構的設計,於基板表面堆疊複數個絕緣層和電路層之組 合’利用具有微孔洞的緩衝表面來增加絕緣層的附著力, 並且於結構中加入金屬彼覆層。其特色在於:整個金屬基 材皆可用以傳輪多層電路板之元件所產生的熱量,使熱量 散逸之表面積增加。而絕緣層之緩衝表面能增加電路層的 附著力,以省去接著劑的使用。另外,在多層電路板結構 中增加金屬披覆層能更有效隔絕電磁干擾現象。呈其士 構設計之實施例係揭露如下。 /、基板、、、口 請參考第1圖’其為本發明第一實施例之四層電路板结構 的剖面示意圖。主要由主要由鋁金屬板材1 0、氧化铭絕緣The heat transfer capacity generated by the components of the high-performance board made of metal material will increase the surface area of the multilayer circuit. Insulate a metal substrate to dissipate the heat, thereby saving the burden on the surface to increase the adhesion of the circuit layer. The insulating layer is also used at π :::, and its buffer surface can be made by surface treatment. = Thin layered electromagnetic interference phenomenon with micro-hole structure on the top. In order to understand the purpose and understanding of the present invention, a detailed description of the [embodiment] is given in conjunction with the illustration. The structural features and functions are further as follows: Disclosed by this ^ 明High-heat-dissipation multilayer circuit board; the structure design of the substrate through the substrate makes the temperature reduction of the multilayer circuit board faster, and isolates electromagnetic interference, and avoids the use of adhesives. The multilayer circuit board structure is based on a metal plate. According to the design of the substrate structure, a combination of a plurality of insulating layers and circuit layers is stacked on the substrate surface. The buffer surface with micro holes is used to increase the adhesion of the insulating layer, and a metal-to-metal coating is added to the structure. Its characteristic is that the entire metal substrate can be used to transfer the heat generated by the components of the multilayer circuit board, increasing the surface area for heat dissipation. The buffer surface of the insulating layer can increase the adhesion of the circuit layer to eliminate the use of an adhesive. In addition, adding a metal coating to the multilayer circuit board structure can more effectively isolate electromagnetic interference. An example of a structured design is disclosed below. /, Substrate, ... Please refer to FIG. 1 ', which is a schematic cross-sectional view of a four-layer circuit board structure according to the first embodiment of the present invention. Mainly insulated by aluminum sheet metal 10, oxide

第8頁Page 8

569659 ---------案號 92109134_年月日__修正__ 五、發明說明(4) 層11、四層電路層20/絕緣層21之組合以及金屬披覆層3〇 所組成。氧化鋁絕緣層1 1係為將金屬板材丨〇之表層施以陽 極處理开> 成之金屬氧化物層’再者,氧化鋁絕緣層11具有 =緩衝表面1 2,其緩衝表面之微孔洞可增加電路層2〇的附 著力。為避免與電路層20之間產生短路,電路層2〇之表層 需施以適當之氧化處理以形成絕緣層,以此方式形成四^ =路層20/絕緣層21之組合,並於最頂端覆以金屬披覆声曰 ’作為避免雜訊干擾的保護層。 其中,於鋁金屬基材1〇表層進行陽極處理 T㈣緣層u,並使氧化銘絕緣層以層形成= :=二衝表面i 2。由於鋁金屬經陽理躲 = : = ”產生管胞狀之微孔洞,此-般以 陽極處理之;的表®,而本發明實施例則利用: 表面。 、 吏虱化鋁絕緣層產生具有微孔洞之緩衝 多層基板::ί:::的電路連接為其良率的關鍵,傳I 的玻璃纖維布;械鑽孔,再填入金屬膏,由於其t 良,本發明& :、、歲、、隹狀,因此在孔徑縮小時易使孔徑不 電錢阻劑,再進行= 在不需電路的區域上# 本發明亦Ϊ二:”來完成。 路,如第2圖所干^^五屬基材的上下表面製作多層電 圖,係為一雙芦雔而受為本發明第二實施例之結構示意 別進行陽極處。板。係、金屬基材1G之上下表^ 形成均勻之氧化鋁絕緣層! i,並使氧巧569659 --------- Case No. 92109134_Year_Month_Revision__ V. Description of the invention (4) Combination of layer 11, four circuit layer 20 / insulation layer 21, and metal coating 3 Composed of. The alumina insulating layer 11 is a metal oxide layer formed by anodizing the surface layer of a metal sheet. Furthermore, the alumina insulating layer 11 has a buffer surface 12 and a micropore on the buffer surface. The hole can increase the adhesion of the circuit layer 20. In order to avoid a short circuit with the circuit layer 20, the surface layer of the circuit layer 20 needs to be subjected to an appropriate oxidation treatment to form an insulating layer. In this way, a combination of 4 ^ = the road layer 20 / the insulating layer 21 is formed at the top. Covered with a metal covering, it says' as a protective layer to prevent noise interference. Among them, anodizing the T edge layer u on the surface layer of the aluminum metal substrate 10, and forming the oxide insulating layer in layers === two punched surfaces i 2. Because the aluminum metal is hidden by the solar cell =: = ", tracheid-like micro-holes are generated, which are generally treated with an anode; the embodiment of the present invention utilizes: the surface. Buffered multilayer substrate with micro-holes :: ί ::: The circuit connection is the key to its yield, glass fiber cloth passed I; mechanical drilling, and then filled with metal paste, due to its good t, the present invention & : ,, age, 隹, so it is easy to make the aperture non-electrical resistance when the aperture is reduced, and then proceed = on the area where no circuit is needed # This invention is also two: "to complete. As shown in Figure 2, a multilayer electric diagram is made on the upper and lower surfaces of the five-general substrate, which is a pair of reeds and is shown in the structure of the second embodiment of the present invention. The anode is not used. board. System, metal substrate 1G above and below ^ Form a uniform alumina insulation layer! i and make oxygen

569659 案號 92109134 五、發明說明(5) I呂絕緣層11表層形成具有微孔洞之緩衝声 2。之表層施以適當之氧化處理,於電路層2〇表面 層,以分別於上下表面形成兩層電路層20和絕/=、、、巴緣 合’形成雙層雙面電路板。再分別於上下 覆層3 0。 匕復至屬披 其中,絕緣層之緩衝表面可藉由絕緣層之 成微孔洞,··在絕緣層之表層進行表形 砂處理,則可得到具有微孔洞之緩衝表面。4處理或贺 或是於絕緣層表面製作具有微孔洞結構之 械工業、電子工業或半導體工業領域,為了對所;用 料賦與某種特性,常在材料表面上以各種方斤,用的材 殊性質的被覆薄膜。進行薄膜沈積處理時,:有特 子的層次控制材料粒子使其形成薄膜,因此,^〜,分 熱平衡狀悲無法得到的具有特殊構造及功能的 := 接在其絕緣層表面製作具有微孔洞結構之薄層:’可' 覆成型法、化學氣相沈積法、氣相凝結法、曰贺 。無:鐘法、化學液相合成法和溶液一凝勝法=曰:569659 Case number 92109134 V. Description of the invention (5) I Lu insulation layer 11 The surface layer forms a buffer sound with micro holes 2. The surface layer is subjected to an appropriate oxidation treatment, and the circuit layer 20 is a surface layer, so that two layers of circuit layers 20 and insulation / = ,, and edge are formed on the upper and lower surfaces, respectively, to form a double-sided double-sided circuit board. Then cladding 30 on top and bottom respectively. Among them, the buffer surface of the insulating layer can be formed with micro holes in the insulating layer, and the surface layer of the insulating layer can be subjected to surface sand treatment to obtain a buffer surface with micro holes. 4 processing or congratulations or making microporous structures on the surface of the insulation layer in the mechanical industry, electronics industry or semiconductor industry. In order to apply the material to the material, it is often used on the surface of the material in various squares. Covering film with special properties. During the thin film deposition process, there are special layers of material to control the material particles to form a thin film. Therefore, ^ ~, which has a special structure and function that cannot be obtained in a thermal equilibrium state: = is made on the surface of its insulating layer with micropores Thin layer of the hole structure: 'may' overmolding method, chemical vapor deposition method, vapor condensation method, Yuehe. None: Bell method, chemical liquid phase synthesis method and solution-coagulation method =

Gel SyntheSls )等技術來完成。 本發明之電路層和金屬披覆層 :料’並應用化學氣相沈積法、物理氣相沉=銀2電 式亦可透過膠合以產生離子辛^^接合方 面處理,再於=是對絕緣層進行適當的表 ”上方δ又置%路層,以增進絕緣層和電路層 第10頁 569659Gel SyntheSls). The circuit layer and the metal coating layer of the present invention: the material and the chemical vapor deposition method, the physical vapor deposition = silver 2 electrical type can also be processed by gluing to produce ionic symptom ^^ bonding, and then = to the insulation Layer to carry out the appropriate table "δ is placed on top of the% road layer to enhance the insulation and circuit layers. Page 10 569659

之附著 化物等 緣層的 極處理 表面活 ά化或 度,即 力。舉 可利用 力。絕 絕緣物 方式很 等。絕 化的步 敏化處 增加電 例來說 離子I巴 使纪吸附在表面形成活化位置,以利於後續的析锻反應。 、 雖然本發明之較佳實施例揭露如上所述,然其並非用 乂限疋本發明,任何熟習相關技蓺,在不脫離本發明 、卜士 、丄 μ $狎和範圍内,當可作些許之更動與潤飾,因此本發明之 利保護範圍須視本說明書所附之申請專利範圍所界定者 為準 之化合物,如氧化物或氮 ^ ^ f或南分子等絕緣材料。形成絕 多’可包含熱氧化法、、炎_ ^ l ^ ^ 緣声夺面;^六旦 θ > 、氣相沉積、 緣9表面不谷易附著其他物質,所以可經過 驟,活化基材表面或使鈍性表面敏感化。經 理之後,所發揮的主要功能為增加附著強 路層(塗佈、析鍍、沉積)與絕緣層間的附著 ’ 一般在絕緣層上進行化學鍍金屬層之前, 化合物溶液或膠體鈀活化劑進行敏化處理, 569659 案號 92109134 年月曰 修正 圖式簡單說明 第1圖為本發明實施例之多層電路板結構的剖面示意 圖,及 第2圖為本發明第二實施例之結構示意圖。 【圖式符號說明】 10 金屬板材 11 氧化鋁絕緣層 12 緩衝表面 20 電路層 21 絕緣層 30 金屬彼覆層The extreme treatment of the adhering compounds and other peripheral layers, surface activation or degree, that is, force. Lift can use force. Insulation is very waiting. The step of sensitization increases the sensitization. For example, the ion Ibar makes the adsorption on the surface to form an activated site, which is conducive to the subsequent forging reaction. Although the preferred embodiment of the present invention is disclosed as described above, it is not intended to limit the present invention. Any familiarity with related technologies can be made without departing from the scope of the present invention, Minor changes and retouching, so the scope of protection of the present invention must be based on compounds defined in the scope of the patent application attached to this specification, such as oxides or nitrogen ^ ^ f or insulating materials such as molecules. The formation of “much” can include thermal oxidation, inflammation, ^ _ ^ ^ ^ edge sound; ^ six den θ >, vapor deposition, edge 9 surface is not easy to adhere to other substances, so you can go through the process to activate the radical Wood surface or sensitized blunt surface. After the manager, the main function played was to increase the adhesion between the strong adhesion layer (coating, deposition, deposition) and the insulation layer. Generally, the compound solution or colloidal palladium activator is sensitive before the metal layer is chemically plated on the insulation layer. Modified processing, 569659 Case No. 92109134 Modified drawing Brief description The first figure is a schematic cross-sectional view of a multilayer circuit board structure according to an embodiment of the present invention, and the second figure is a structural schematic diagram of a second embodiment of the present invention. [Illustration of Symbols] 10 Metal sheet 11 Alumina insulation layer 12 Buffer surface 20 Circuit layer 21 Insulation layer 30 Metal coating

第12頁Page 12

Claims (1)

569659 年 月 曰 案號 9210Q1:U 六、申請專利範圍 丄· 一種高散熱之多層電路板,其包含有: 一金屬板材; :有-緩衝表面之一絕緣層’係形成於該金屬基材 之表面’該緩衝表面具有微孔洞;及 複數個電路層和絕緣層之組合,係覆蓋於該具有缓 衝表面之絕緣層,其包含有: 一電路層,該電路層係用以提供元件的表面黏著與 電性連接; 一絕緣層,該絕緣層係設於該電路層上方。 2·如申請專利範圍第1項所述之高散熱之多層電路板,其 中該絕緣層係該金屬板材之化合物。 3 ·如申請專利範圍第1項所述之高散熱之多層電路板,其 中该絕緣層係該金屬板材之氧化物。 4·如申請專利範圍第1項所述之高散熱之多層電路板,其 中邊纟巴緣層係該金屬板材之氮化物。 5 ·如申請專利範圍第1項所述之高散熱之多層電路板,其 中該絕緣層係係選自陶瓷材料和高分子材料所組成的族 群其中之一。 6 ·如申請專利範圍第1項所述之高散熱之多層電路板,其 中該絕緣層與該緩衝表面係經一陽極處理所形成。 7.如申請專利範圍第1項所述之高散熱之多層電路板,其 中該絕緣層之該緩衝表面係由該絕緣層之表層經一表面 處理所形成。 8 ·如申請專利範圍第7項所述之高散熱之多層電路板,其569659 Case No. 9210Q1: U VI. Patent application scope 丄 A high-heat-dissipation multilayer circuit board, which includes: a metal plate;:-an insulation layer with a buffer surface is formed on the metal substrate Surface 'The buffer surface has micro-holes; and a combination of a plurality of circuit layers and an insulation layer covers the insulation layer with the buffer surface, and includes: a circuit layer, which is used to provide components The surface is adhered and electrically connected; an insulating layer is provided above the circuit layer. 2. The high-heat-dissipation multilayer circuit board according to item 1 of the scope of the patent application, wherein the insulating layer is a compound of the metal plate. 3. The high heat dissipation multilayer circuit board as described in item 1 of the scope of the patent application, wherein the insulating layer is an oxide of the metal plate. 4. The multi-layer circuit board with high heat dissipation as described in item 1 of the scope of patent application, wherein the edge layer is a nitride of the metal plate. 5. The high heat dissipation multi-layer circuit board according to item 1 of the scope of patent application, wherein the insulating layer is selected from one of the group consisting of ceramic materials and polymer materials. 6. The high-heat-dissipation multilayer circuit board according to item 1 of the scope of patent application, wherein the insulating layer and the buffer surface are formed by an anodizing treatment. 7. The high-heat-dissipation multilayer circuit board according to item 1 of the scope of the patent application, wherein the buffer surface of the insulating layer is formed by a surface treatment of the surface layer of the insulating layer. 8 · High heat dissipation multilayer circuit board as described in item 7 of the scope of patent application, which 569659 案號 92109134 年月曰 修正 六、申請專利範圍 中該表面處理係選自表面研磨處理和喷砂處理其中之 9.如申請專利範圍第1項所述之高散熱之多層電路板,其 中該絕緣層之該緩衝表面係於絕緣層表面製作一具有微 孔洞結構之薄層所形成。 1 0.如申請專利範圍第9項所述之高散熱之多層電路板,其 中該具有微孔洞結構之薄層係由喷覆成型法、化學氣 相沈積法、氣相凝結法、分子束磊晶法、無電鍍法、 化學液相合成法及溶液一凝膠法其中之一方法所形 成。 圍第1項所述之高散熱之多層電路板,其 料係選自銅、金和銀所組成的族群其中 11.如申請專利範 中該電路層材 -— 〇 圍第1項所述之高散熱之多層電路板,其 中更包含一金屬坡覆層,係設於最頂端之該絕緣層表 1 2.如申請專利範 面0 1 3.如申請專利範 其中該金屬披 群其中之一。 1 4. 一種高散熱之 一金屬板 一絕緣層 複數個電 板材,其包含有: 圍第12項所述之高散熱之多層電路板, 覆層材料係選自銅、金和銀所組成的族 多層電路板,其包含有: 材; ,係形成於該金屬基材之表面;及 路層和絕緣層之組合,係覆蓋於該金屬569659 Case No. 92109134 Amendment VI. The surface treatment in the scope of the patent application is selected from surface grinding treatment and sand blasting treatment. 9. The high heat dissipation multi-layer circuit board as described in item 1 of the patent application scope, wherein The buffer surface of the insulating layer is formed by forming a thin layer with a micro-hole structure on the surface of the insulating layer. 10. The high heat dissipation multi-layer circuit board according to item 9 of the scope of the patent application, wherein the thin layer having a micro-hole structure is formed by spray coating method, chemical vapor deposition method, vapor condensation method, molecular beam It is formed by one of epitaxy method, electroless plating method, chemical liquid phase synthesis method and solution-gel method. The high heat dissipation multi-layer circuit board described in item 1 is selected from the group consisting of copper, gold and silver, among which 11. The circuit layer material in the patent application--0 described in item 1 High-heat-dissipation multi-layer circuit board, which further includes a metal slope coating, which is provided at the top of the insulating layer. Table 1 2. If the patent application is 0 0 3. If the patent application is one of the metal coatings . 1 4. A high-heat-dissipating metal plate-insulating layer of a plurality of electrical plates, comprising: the high-heat-dissipating multilayer circuit board described in item 12, and the covering material is selected from the group consisting of copper, gold and silver Family of multi-layer circuit boards, comprising: a material; formed on the surface of the metal substrate; and a combination of a road layer and an insulating layer covered with the metal II 第14頁 569659Page 14 569659 ,該電路層係用以提供元件的表面 係結合於該電路層上方。 1 5 ·如申請專利範圍第1 4項所述之焉散熱之多層電路板, 其中該絕緣層和該電路層係以膠合方式產生離子元素 來接著。 1 6 ·如申請專利範圍第1 4項所述之兩散熱之多層電路板, 其中該電路層玎透過膠合以產生離子元素進行元件黏 著。 1 7·如申請專利範圍第1 4項所述之高散熱之多層電路板, 其中該絕緣層表面係經〆活化處理以增加電路層與絕 緣層間的附著力。 1 8 ·如申請專利範圍第1 4項所述之高散熱之多層電路板, 其中該絕緣層係該金屬板材之化合物。 1 9 ·如申請專利範圍第丨4項所述之高散熱之多層電路板, 其中該絕緣層係該金屬板材之氧化物。 2 0.如申請專利範圍第1 4項所述之鬲散熱之多層電路板, 其中該絕緣層係該金屬板材之氮化物。 2 1.如申請專利範圍第丨4項所述之高散熱之多層電路板, 其中該絕緣層係係選自陶瓷材料和高分子材料所組成 的族群其中之一。 2 2 ·如申請專利範圍第1 4項所述之咼散熱之多層電路板, 其中該電路層材料係選自銅、金和銀所組成的族群其 中之一。 569659 _案號92109134_年月日 修正_ 六、申請專利範圍 2 3 ·如申請專利範圍第1 4項所述之高散熱之多層電路板, 其中更包含一金屬披覆層,設於最頂端之該絕緣層上 方。 2 4 ·如申請專利範圍第2 3項所述之高散熱之多層電路板, 其中該金屬披覆層材料係選自銅、金和銀所組成的族 群其中之一。The circuit layer is used to provide a surface of the component that is bonded to the circuit layer. 15 · The heat-dissipating multilayer circuit board according to item 14 of the scope of patent application, wherein the insulating layer and the circuit layer are bonded by generating ionic elements. 16 · The two heat-dissipating multilayer circuit boards as described in item 14 of the scope of patent application, wherein the circuit layer 玎 is bonded to generate ionic elements for component adhesion. 17. The high heat dissipation multi-layer circuit board as described in item 14 of the scope of the patent application, wherein the surface of the insulating layer is treated with rhenium activation to increase the adhesion between the circuit layer and the insulating layer. 18 · The multi-layer circuit board with high heat dissipation as described in item 14 of the scope of patent application, wherein the insulating layer is a compound of the metal plate. 19 · The multilayer board with high heat dissipation as described in item 4 of the patent application scope, wherein the insulating layer is an oxide of the metal plate. 20. The heat-dissipating multilayer circuit board as described in item 14 of the scope of patent application, wherein the insulating layer is a nitride of the metal plate. 2 1. The multi-layer circuit board with high heat dissipation as described in item 4 of the patent application scope, wherein the insulating layer is one selected from the group consisting of ceramic materials and polymer materials. 2 2 The heat-dissipating multilayer circuit board as described in item 14 of the scope of patent application, wherein the material of the circuit layer is one selected from the group consisting of copper, gold and silver. 569659 _Case No. 92109134_ Amendment Date__Applicable Patent Scope 2 3 · The high heat dissipation multi-layer circuit board as described in Item 14 of the Patent Application Scope, which further includes a metal coating layer at the top Above the insulating layer. 24. The multi-layer circuit board with high heat dissipation as described in item 23 of the scope of patent application, wherein the metal coating material is selected from one of the group consisting of copper, gold and silver. 第16頁Page 16
TW92109134A 2003-04-18 2003-04-18 Multi-layered circuit board with high heat dissipation TW569659B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
TW92109134A TW569659B (en) 2003-04-18 2003-04-18 Multi-layered circuit board with high heat dissipation

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
TW92109134A TW569659B (en) 2003-04-18 2003-04-18 Multi-layered circuit board with high heat dissipation

Publications (2)

Publication Number Publication Date
TW569659B true TW569659B (en) 2004-01-01
TW200423844A TW200423844A (en) 2004-11-01

Family

ID=32591162

Family Applications (1)

Application Number Title Priority Date Filing Date
TW92109134A TW569659B (en) 2003-04-18 2003-04-18 Multi-layered circuit board with high heat dissipation

Country Status (1)

Country Link
TW (1) TW569659B (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106102303B (en) * 2016-06-28 2019-09-13 Oppo广东移动通信有限公司 Pcb board and mobile terminal with it

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106102303B (en) * 2016-06-28 2019-09-13 Oppo广东移动通信有限公司 Pcb board and mobile terminal with it

Also Published As

Publication number Publication date
TW200423844A (en) 2004-11-01

Similar Documents

Publication Publication Date Title
JP2002043752A (en) Wiring board, multilayer wiring board, and their manufacturing method
JPS60170287A (en) Copper-lined laminated board
JPH11340367A (en) Multilayer wiring board and its manufacture
JPS59198790A (en) Printed circuit board
TW569659B (en) Multi-layered circuit board with high heat dissipation
JPH11163525A (en) Manufacture of multilayer wiring board
JP2007266416A (en) Metal foil for printed-wiring board and laminate sheet using it
JP4850275B2 (en) Manufacturing method of ceramic wiring board
JP2002176246A (en) Wiring board and its producing method
JP2007165814A (en) Member for capacitor embedded in substrate, and substrate with embedded capacitor using it and manufacturing method of the substrate
JP4845274B2 (en) Wiring board and manufacturing method thereof
KR100917028B1 (en) Anodized metal board its preparation manufacturing method
JPH0653684A (en) Thin film multilayer wiring board and module using the same
JPH03209792A (en) Both-side metal-cladded flexible printed circuit board and manufacture thereof
JP2708821B2 (en) Electric laminate
JP2005064110A (en) Member for electronic component and electronic component using the same
JPH0283995A (en) Ceramic multilayer circuit board and its applications
JPS63219562A (en) Manufacture of ceramic coat laminated sheet
JP4492071B2 (en) Wiring board manufacturing method
JP2006303387A (en) Printed wiring board
JPS6229192A (en) Enamelled substrate for electronic circuit
TW592017B (en) Manufacturing method of multi-layer circuit board
TW200423836A (en) Manufacturing method of circuit board
JPH04276686A (en) Multilayer metal base substrate
JPH1187401A (en) Semiconductor device

Legal Events

Date Code Title Description
GD4A Issue of patent certificate for granted invention patent
MM4A Annulment or lapse of patent due to non-payment of fees