TW556264B - A radio frequency (RF) device and its method of manufacture - Google Patents

A radio frequency (RF) device and its method of manufacture Download PDF

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TW556264B
TW556264B TW091106762A TW91106762A TW556264B TW 556264 B TW556264 B TW 556264B TW 091106762 A TW091106762 A TW 091106762A TW 91106762 A TW91106762 A TW 91106762A TW 556264 B TW556264 B TW 556264B
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conductive
layer
ground plane
patent application
dielectric
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Peter Wennekers
Thomas Eugene Zirkle
Rainer Thoma
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Motorola Inc
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    • H01L24/02—Bonding areas ; Manufacturing methods related thereto
    • H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
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Abstract

A radio frequency (RF) device (10) comprises a substrate (20), a conducting ground plane (30) formed thereon, a layered stack (33-39) formed on the conducting ground plane (30) wherein the stack (33-39) is composed of a plurality of conducting layers (34, 36, 38) and a plurality of dielectric layers (33, 35, 37, 39) arranged alternately, and a conducting RF pad (11) wherein, in a periphal region of the device (10), the conducting ground plane (30) and conducting layers (34, 36, 38) are interconnected by conducting vias (40) thereby to form an enclosed, central region, and wherein the conducting RF pad (11) is located with the central region and formed on at least one of the dielectric layers (37). An advantage of the device is that it does not suffer from deleterious effects such as stray or parasitic capacitance.

Description

556264 A7 ____ B7 五、發明説明（1 ) 發明領域 本發明係關於一種含有導電性RF襯塾之射頻裝置及其製 造方法。 發明背景 RF襯墊可用於與應用於微波及無線設備之主動式裝置連 接。有些RF襯墊可設置成導波管架構。 在RF頻率時，會產生造成效能減低而令人不希望發生的 雜散及寄生電容。 已做過許多用於移除或減少這些效應的嘗試。美國專利 案第5,401，912號說明一種微波表面安裝封裝，其具有一圍 繞著鉛（lead)導孔之U型導孔藉以改良絕緣。556264 A7 ____ B7 V. Description of the Invention (1) Field of the Invention The present invention relates to a radio frequency device containing a conductive RF liner and a manufacturing method thereof. BACKGROUND OF THE INVENTION RF gaskets can be used to interface with active devices used in microwave and wireless devices. Some RF pads can be configured as waveguide structures. At RF frequencies, unwanted stray and parasitic capacitances can be produced that can reduce performance. Many attempts have been made to remove or reduce these effects. U.S. Patent No. 5,401,912 describes a microwave surface mount package having a U-shaped via hole surrounding a lead via to improve insulation.

然而，仍需要提供一種能夠遍及廣泛頻率範圍運作的RF 裝置’尤其是一種不受不想要之電容效應所干擾的裝置。 發明概沭 在本發明之第一觀點中，提供一種射頻（RF)裝置，其包 έ 基底、一形成於该基底上的導電接地面、一形成於該 導電接地面上由複數個導電層（與介電層呈交替配置所組成 之層接式堆疊）、以及一導電性RfT襯塾，其中於一裝置之週 邊區域内，導電接地面和導電層係藉由導電性導孔予以互 連並藉以形成一封閉、中央之區域，且其中導電性襯墊 係置於中央區域内並形成於至少一介電層上。 在一具體實施例中，RF襯墊包含複數個藉由導電性導孔 予以互連且彼此藉由介電層隔開的導電層。此種架構類型 形成與裝置之接地面分離的電容性安定器，以便在比裝置 -4 556264 A7 B7 五、發明説明（2 ) " "一 -一- 正常運作頻率還低的頻率時提供一電容量。 已表示此較佳配置用以在頻率低於裝置正常運作範圍時 改良裝置之頻率響應。一般而言，此電容性安定器的效應 在於將電場形狀塑造成預定圖樣以便產生一電容量。 電容性安定器的數量可超過一個。此安定器，或每一 個安定器，的大小及配置皆使橫向電場比先前實例衰減 得更快。部份原因是因為該等安定器靠近接地面。該等 不利的電容效應係導電率、頻率及電容性安定器相對面 積的函數。 已知尺寸之導電層最好彼此疊置。此效應在於一區域有 效屏障另一區域且這在較低頻率時已形成有利效應。 此裝置可進一步包含一導電基層及至少一使該基層與接 地面互連的導電路徑構件。 此裝置最好在堆疊中含有一狹縫用以連接至RF襯墊。 另一具體實施例於形成堆疊之最高導電層之表面上置有 導電性襯墊。 本發明一第二觀點提供一種製造射頻（RF)裝置的方法， 其包含步驟為； 於一介電基底上形成一導電性接地面’於接地面上部形 成一由導電層與介電層呈交替配置所組成之層接式堆疊， 接地面與導電層藉由導電性導孔於一裝置之周邊區域中互 連藉以形成一封閉、中央之區域’以及於中央區和至少一 介電層上形成一導電性RF襯墊。 3 五、發明説明（ 現在將僅藉由實施例並引用 實施例，其中： 圖不說明本發明之較佳具體 圖1係一 圖2係一 圖3係一 面圖。 根據本發明射頻裝置具體實施例之平整圖 沿著圖1剖線2-2之剖面圖；以及 置具體實施例之部份剖 根據本發明替代性射頻裝 詳細發明說明 參照圖示，圖1係一RF裝置⑺之平整圖，其包含—導電 性架構13所圍繞之射頻襯塾或RF概塾u。rf概整⑴系緣製 成安裝於—半導體基底12之表面上。架構U圍繞RF襯墊U 並含有一由金屬導體所形成之封閉路徑’該金屬導體如銘 或銅。導電性架構13於下面係視為一杯狀體门。將鑑知杯 狀體13可呈圓形對稱並具有一圓形或均勻楕圓形之剖面。 重點在於該路徑係_封閉路徑。杯狀體⑴掃襯墊u實質 包圍於其t心位置。RF襯整！ ！可呈圓形或確實呈任何形狀 ’但最好為正方形或正多邊形。一窄裂縫或開口 16係形成 在一杯狀體13壁面之一側中，該窄裂縫或開口 16自襯墊ι夏 對一主動式裝置作出一連接體17，該主動式裝置如形成於 基底12内之電晶體（未示）。 RF襯墊11之建構與杯狀體丨3之導電性壁面之建構類似且 將詳述如下。 裝置10之不同層係表示於圖。 在圖2中，一矽晶圓2〇界定一基底。一層24係於基底2〇上 藉由如硕之受體之離子佈值法予以產生。基底2〇之受體離 556264However, there is still a need to provide an RF device ' capable of operating over a wide frequency range, especially a device that is not disturbed by unwanted capacitive effects. SUMMARY OF THE INVENTION In a first aspect of the present invention, a radio frequency (RF) device is provided, which includes a substrate, a conductive ground plane formed on the substrate, and a conductive ground plane formed by a plurality of conductive layers ( A layered stack consisting of an alternating arrangement with a dielectric layer), and a conductive RfT liner, in which a conductive ground plane and a conductive layer are interconnected by conductive vias in a peripheral area of a device and Thereby, a closed, central region is formed, and the conductive pad is placed in the central region and formed on at least one dielectric layer. In a specific embodiment, the RF pad includes a plurality of conductive layers interconnected by conductive vias and separated from each other by a dielectric layer. This type of architecture forms a capacitive ballast that is separate from the ground plane of the device, so as to provide it at a frequency lower than the normal operating frequency of the device-4 556264 A7 B7 V. Description of the Invention (2) " " One electric capacity. This preferred configuration has been shown to improve the frequency response of the device when the frequency is below the normal operating range of the device. In general, the effect of this capacitive ballast is to shape the electric field shape into a predetermined pattern so as to generate a capacitance. The number of capacitive ballasts can exceed one. The size and configuration of this ballast, or each ballast, causes the transverse electric field to decay faster than in the previous example. This is partly because these ballasts are close to the ground plane. These adverse capacitive effects are a function of conductivity, frequency and relative area of the capacitive ballast. The conductive layers of known size are preferably stacked on top of each other. This effect lies in the effective barrier of one area to another and this has formed a beneficial effect at lower frequencies. The device may further include a conductive base layer and at least one conductive path member interconnecting the base layer and the ground. The device preferably includes a slot in the stack for attachment to the RF pad. In another embodiment, a conductive pad is placed on the surface of the highest conductive layer forming the stack. A second aspect of the present invention provides a method for manufacturing a radio frequency (RF) device, comprising the steps of: forming a conductive ground plane on a dielectric substrate, and forming an alternating conductive layer and a dielectric layer on the ground plane; A layer-by-layer stack consisting of a configuration, the ground plane and the conductive layer are interconnected in a peripheral region of a device through conductive vias to form a closed, central region 'and formed on the central region and at least one dielectric layer A conductive RF pad. 3 V. Description of the Invention (The examples will now only be used and cited, in which: the drawings do not illustrate the preferred embodiment of the present invention. Figure 1 is a figure, Figure 2 is a figure, and Figure 3 is a side view. Specific implementation of a radio frequency device according to the present invention The flat view of the example is a cross-sectional view taken along the line 2-2 of FIG. 1; and a partial cross-section of a specific embodiment according to the present invention is described with reference to the alternative RF device. It includes—a radio frequency liner or an RF profile surrounded by a conductive structure 13. The rf profile is made and mounted on the surface of a semiconductor substrate 12. The structure U surrounds the RF gasket U and contains a metal The closed path formed by the conductor 'the metal conductor is such as an inscription or copper. The conductive structure 13 is regarded as a cup-shaped door below. The cup-shaped body 13 may be circularly symmetrical and have a circular or uniform round shape. Shaped section. The important point is that the path is a closed path. The cup-shaped sweeping pad u substantially surrounds its t-center position. RF lining! It can be round or indeed any shape ', but it is preferably a square or Regular polygon. A narrow crack or opening 16 series In one side of the wall surface of the cup-shaped body 13, the narrow crack or opening 16 makes a connection body 17 from a pad to an active device such as a transistor (not shown) formed in the substrate 12. The construction of the RF pad 11 is similar to the construction of the conductive wall surface of the cup 3 and will be described in detail below. The different layers of the device 10 are shown in the figure. In Figure 2, a silicon wafer 20 defines a substrate A layer of 24 is generated on the substrate 20 by ionic distribution method of Rushuo's receptor. The receptor of substrate 20 is 556264.

子摻雜係於跨越石夕晶 定位置中予以執行。 底20上磊晶生長摻雜受體之矽。 圓20之表面或跨越整個晶圓表面之預 一用於形成層24之替代性方法係於基 層24係呈高度導電性且其載體濃度超過1〇，咖3。層以之 厚度至少為0.5微米。 一第三矽層26係接著在層24之上部使用摻雜受體之矽之 磊晶生長法予以生長。第三層為低濃度摻雜纹而亦具低導 電性。第三層26之厚度至少為〇 5微米。應注意在完成磊晶 生長層26之後以一薄天然二氧化矽層場氧化物予以覆蓋。 為了間化並未緣出場氧化物層。 在層26的表面上形成一藉由化學氣相沉積法（cvd)或濺 鍍法所產生如二氧化矽28之介電材料保護層。層28之厚度 一般係介於0.5至2.0微米之間。 為了在金屬層之後建構一介電質序列，每一個介電層之 平整度皆疋非常重要的。因此，每一個介電層皆藉由化學 機械蝕刻及研磨法CMP予以平整化以便得到粗糙度最小的 表面。 一第一金屬層30係於一第一介電層28上形成。較佳的方 法為錢艘一銘合金或銅之CVD/電艘法。在將金屬沉積至介 電質表面之前’需要用一非常薄的中介層被覆該介電質以 增進至屬對”電貝之黏著度。若金屬係使用铭，則賤錢之 氮化鈦之薄被覆層係被覆在介電質上。薄被覆層之厚度僅 為數十奈米，為了間潔性並未於此處示出被覆層。 金屬層30的圖樣係以光微影法予以作成。一架構好的光 本紙張尺度適用中國國家標準(CNS) A4規格(210 X 297公釐） 556264 五、發明説明（5 ) 阻（未示）保護那些金屬3〇於接下來 ^ ,tJ ]蝕刻製裎中不予以蝕刻 之&域。蝕刻製程可為濕化學鍍浴 ^ , —匕干離子電漿中未受 保邊之至屬之移除。可使用兩步 危八 /哪之組合。金屬層30的厚 度一般係介於0.1至1.0微米之間。 其次，金屬層30係以一薄TlN黏著層予以被覆且一第二介 電層33係接著以CVD法予以塗敷。桩 双接者執行一 CMP製程步 驟以達成第二介電層33之平整化。一笼_ 弟—金屬層34係接著 於離散位置附加諸第二介電層33。 予 導電性互連係藉由小開口於第_與第二金屬層川和W之 間形成，小型開口係視為形成於第二介電層3.3〒的導孔扣 並接著予以填滿金屬。該等導孔扣的位置係以光微影法 以界定。導孔40係於第二介電層33未以光阻保護之曝露 域中藉由一離子電漿束（未示）予以蝕刻。 導孔40之垂直壁面係以濺鍍之TlN予以被覆，用以增進對 填滿金屬之導孔之黏著度。填充之金屬_般為藉由CVD法 引入導孔40的鎢。此被覆物未示於圖示中。 表 形 由於導孔填充製程因鎢丘形成而產生粗糙之第二介電層 之表面’故#用一弟一 CMP步驟達成一平楚之介電片， 米 於 面。導孔金屬與接著形成之金屬層之間的接觸係經由—V 成於介電層上之黏著層序列達成。黏著層序列（未示）包含缺 (Ti)和氮化鈦（TiN)之薄濺鍍層。這些層的厚度僅數十齐 。一第二金屬層係藉由電鍍銅與鋁之CVD或錢錄法形成 黏著層上。 第二金屬層係以類似於第一層的方式予以形成。藉由重 -8 本纸張尺度適用中國國家標準(CNS) A4規格(210 X 297公釐） 556264 A7 ---^------ —_B7 五、發明説明（6 ) ^ ---- 设上述步驟，產生-由介電質與金屬層交替組成的堆叠。 圖2表示四個金屬層30, 34, 36, 38以三個介電質層^，”，37 予以隔開的實施例。最上面的金屬層38係以一上部介電層 39予以保護以避免侵蝕。開口係蝕刻至介電層39内而能i 電至RF襯墊11和接地襯墊15。 圖1具有導電性壁面之杯狀體13因^系藉由適當架構每一 個金屬層予以形成，並以密集配置的導孔使這些層互連。 玉’、角形配置的導孔係較佳的，因為此圖樣提供最密集的 配置架構。杯狀物的底部係由第一金屬層3〇予以形成。 重點在於要注意摻雜濃度高的矽層24對第一金屬層3 〇沒 有直流電（DC)連接。為了增進杯狀物底部對摻雜濃度高之 石夕層之屏障，需要此層對第一金屬層有良好之電容性搞接 。因此於層24與30之間產生一大重疊區1〇〇。此重疊區必需 實質大於形成RF襯墊U之金屬堆疊之重疊區2〇〇。灯襯墊 Η包含一由絕緣介電層所隔開之金屬層堆疊。一上部金屬 板係RF襯墊區，其提供對“晶片外，，電子電路（未示）之通 道。此區之尺寸有較小的限制，一般為5〇微米乘5〇微米， 視晶片組裝廠之封裝法則而定。為了使”襯墊重疊區2〇〇不 爻封裝法則控制，rF襯墊區u下方金屬層之垂直堆疊連接 至第二金屬層34上之較低區。可調整此區之尺寸以得到所 希望之重疊區200之電容量。因為層34與杯狀體底部（即第 一金屬層）之間的距離比RF襯墊堆疊與圍繞之杯狀體壁面之 間的橫向間隔小很多，故RF襯墊π與金屬堆疊迫使電場至 一般垂直方向（亦即橫切基底所界定的表面）。 -9- 7 五、發明説明（ 為了更進一步增進對摻雜濃度高之矽層24之屏蔽，可增 加i屬層j〇及一或多條介於此矽層與杯狀體底部之間的導 電性路徑。 /在此一替代性具體實施例中，矽磊晶層24中有許多區域 '南又t $隹之义體並為對蟲晶石夕層表面之連接層。圖3表示 、儿體佈植4 1與一源極/汲極佈植合併，該源極/汲極佈植 “為衣xe PMOS裝置時之處理層。一由石夕化鈦或石夕化始所構 成之區人姆性金屬接觸體43藉由—金屬導孔使卜摻雜區連 接至第一金屬層30。歧置的優點為不需要圖2所示與重疊 區100有關的幾何設計考量。 RF化號係於杯狀體外側藉由導體17傳送至一形成於 石夕基底20t的主㈣裝置（未示）。建議使導體或17為微帶 線之一部份，該微帶線如圖示將第一金屬層3〇當作接地 面。微帶線中的電磁場於導線與接地面之間主要呈直線 且垂直。 有效電氣屏蔽之架構。亦可配置-置於RF襯墊t i上之類似 金屬襯墊46以接觸PCB上之合適金屬路線。 在另-具體實施例中’ RF裝置10在最上部金屬層(圖2之 ⑺之表面上具有金屬襯㈣。裝置1G接著可藉由接觸印刷 電路板（PCB)表面上方金屬線路（可接地）之金屬腳^予以安 裝於-PCB上’從而使裝置10具有一導電蓋。@此提供一The sub-doping is performed across the fixed position of Shi Xijing. Receptor-doped silicon is epitaxially grown on the bottom 20. A pre-alternative method for forming the layer 24 on the surface of the circle 20 or across the entire wafer surface is that the base layer 24 is highly conductive and its carrier concentration exceeds 10 ° C. The layer has a thickness of at least 0.5 m. A third silicon layer 26 is then grown on top of the layer 24 using epitaxial growth of doped silicon. The third layer is a low-concentration doped pattern and also has low conductivity. The thickness of the third layer 26 is at least 0.5 micron. It should be noted that after the epitaxial growth layer 26 is completed, it is covered with a thin layer of natural silicon dioxide field oxide. The oxide layer is not exposed for the purpose of interfacialization. A protective layer of a dielectric material such as silicon dioxide 28 is formed on the surface of the layer 26 by a chemical vapor deposition (cvd) method or a sputtering method. The thickness of layer 28 is generally between 0.5 and 2.0 microns. In order to construct a dielectric sequence behind the metal layer, the flatness of each dielectric layer is very important. Therefore, each dielectric layer is planarized by chemical mechanical etching and polishing CMP to obtain a surface with the smallest roughness. A first metal layer 30 is formed on a first dielectric layer 28. A preferred method is the CVD / Electric Vessel method using a copper alloy or copper alloy. Before the metal is deposited on the surface of the dielectric, 'the dielectric needs to be covered with a very thin interposer to increase the adhesion to the electric shell. If the metal is used, then the cheap titanium nitride The thin coating layer is coated on the dielectric. The thickness of the thin coating layer is only tens of nanometers, and the coating layer is not shown here for the sake of cleanliness. The pattern of the metal layer 30 is made by photolithography. A well-structured optical paper size is applicable to Chinese National Standard (CNS) A4 specifications (210 X 297 mm) 556264 V. Description of the invention (5) Resistance (not shown) to protect those metals 30, ^, tJ] The & domain that is not to be etched in the etching process. The etching process can be a wet electroless plating bath ^, the removal of the unprotected edge in the ion plasma. The two-step combination can be used. The thickness of the metal layer 30 is generally between 0.1 and 1.0 microns. Second, the metal layer 30 is covered with a thin TlN adhesive layer and a second dielectric layer 33 is then applied by CVD. The receiver performs a CMP process step to achieve the planarization of the second dielectric layer 33. One cage _ brother The metal layer 34 is then attached with second dielectric layers 33 at discrete locations. The pre-conductive interconnect is formed between the first and second metal layers and W through small openings, and the small openings are considered to be formed in the second The via holes of the dielectric layer 3.3〒 are then filled with metal. The positions of these via holes are defined by photolithography. The via holes 40 are exposed on the second dielectric layer 33 which is not protected by photoresist. In the domain, an ion plasma beam (not shown) is used for etching. The vertical wall surface of the via 40 is covered with sputtered TlN to improve the adhesion to the via filled with metal. The tungsten is introduced by the CVD method in the via hole 40. This coating is not shown in the figure. The surface of the second dielectric layer is rough because of the formation of the tungsten mound due to the via filling process. Therefore # 用 一 弟A CMP step achieves a plain dielectric sheet. The contact between the via metal and the subsequently formed metal layer is achieved through an adhesive layer sequence formed on the dielectric layer. The adhesive layer sequence (not shown) ) Contains thin sputtered (Ti) and titanium nitride (TiN) coatings. The thickness of these layers is only a few Qi. A second metal layer is formed on the adhesive layer by CVD or money recording of electroplated copper and aluminum. The second metal layer is formed in a similar manner to the first layer. Applicable to China National Standard (CNS) A4 specification (210 X 297 mm) 556264 A7 --- ^ ------ --_ B7 V. Description of the invention (6) ^ ---- Suppose the above steps are generated-by introduction A stack of alternating electrical and metal layers. FIG. 2 shows an embodiment in which four metal layers 30, 34, 36, 38 are separated by three dielectric layers ^, ", 37. The uppermost metal layer 38 is protected by an upper dielectric layer 39 to prevent erosion. The opening is etched into the dielectric layer 39 so as to be electrically accessible to the RF pad 11 and the ground pad 15. The cup-shaped body 13 having a conductive wall surface in FIG. 1 is formed by appropriately structuring each metal layer, and interconnects these layers with densely arranged via holes. The jade 'and angularly configured vias are better because this pattern provides the most dense configuration. The bottom of the cup is formed by the first metal layer 30. It is important to note that the silicon layer 24 having a high doping concentration has no direct current (DC) connection to the first metal layer 30. In order to improve the barrier of the bottom of the cup to the high-doped Shi Xi layer, this layer needs to have a good capacitive connection to the first metal layer. As a result, a large overlap area 100 is created between layers 24 and 30. This overlapping area must be substantially larger than the overlapping area of the metal stack forming the RF pad U by 200. The lamp pad Η includes a metal layer stack separated by an insulating dielectric layer. An upper metal plate is an RF pad area, which provides access to "outside the chip, electronic circuits (not shown). The size of this area is less restricted, generally 50 microns by 50 microns, depending on the chip assembly The packaging law of the factory is determined. In order to control the "overlapping area 2000", the vertical stack of the metal layer under the rF pad area u is connected to the lower area on the second metal layer 34. The size of this area can be adjusted to obtain the desired capacitance of the overlapping area 200. Because the distance between layer 34 and the bottom of the cup (that is, the first metal layer) is much smaller than the lateral distance between the RF pad stack and the surrounding cup wall, the RF pad π and the metal stack force the electric field to Generally vertical (that is, across the surface defined by the substrate). -9- 7 V. Description of the invention (In order to further improve the shielding of the silicon layer 24 with a high doping concentration, an i-layer j0 and one or more layers between the silicon layer and the bottom of the cup body can be added. Conductive path. / In this alternative embodiment, there are many regions in the silicon epitaxial layer 24, and the connection layer is on the surface of the worm crystal layer. Figure 3 shows, Child body implantation 41 is combined with a source / drain implantation. The source / drain implantation "is a processing layer in a clothing xe PMOS device. One is composed of Shixihua titanium or Shixihua The area-specific metal contact body 43 connects the doped region to the first metal layer 30 through a metal via. The advantage of the divergence is that the geometric design considerations related to the overlap region 100 shown in FIG. 2 are not required. RFization The number is transmitted from the outside of the cup through the conductor 17 to a main cymbal device (not shown) formed on the base of the stone eve 20t. It is recommended that the conductor or 17 be a part of a microstrip line, which is shown in the figure Take the first metal layer 30 as the ground plane. The electromagnetic field in the microstrip line is mainly straight and perpendicular between the conductor and the ground plane. Effective electrical shielding The structure can also be configured-a similar metal pad 46 placed on the RF pad ti to contact a suitable metal route on the PCB. In another embodiment, the RF device 10 is on the uppermost metal layer (Figure 2) There is a metal liner on the surface. The device 1G can then be mounted on -PCB 'by contacting the metal feet of the metal circuit (groundable) above the surface of the printed circuit board (PCB) so that the device 10 has a conductive cover. This provides one

本紙張&度適用中國國家標準(CMS) A4規格(210 X 297公釐)This paper & degree applies the Chinese National Standard (CMS) A4 specification (210 X 297 mm)

Claims (1)

556264556264 申請專利範圍 A B c D 1 一種射頻（RF)裝置（丨〇)，其包含一其戍,、 暴底（《 0)、一形成；兮 基底（20)上的導電接地面（3〇 一 、^ ) 形成於該導電接地面 ㈣上由複數個導電層（34, 36, 38)與介電層（33,坆37 39)呈交替配置所組成之層接式堆疊（33_39)、以及’一導 電性RF襯塾⑴），其中於_裝置⑽之週邊區域内，導 電接地面（30)和導電層（34, 36, 38)係藉由導電性導孔州 予以互連並藉以形成一封閉、中央之區域，且盆中導電 性RF襯整（11)係置於十央區内並形成於至少;;介電層 (37)上。 S 2. 如申請專利範圍第i項之RF裝置（1〇)，其中該RF襯墊（ιι) 包含複數個由導電性導孔（4〇)予以互連並由介電層（3 5, 3 7)予以彼此隔開的導電層（34,36,38)。 3. 如申請專利範圍第1項之RF裝置（1〇),其中該裝置（丨〇)進 一步包含一導電性基層（24)及至少一使該基層（24)與接地 面（3 0)互連的導電路徑構件（41，43, 44)。 4 如申請專利範圍第}項之RF裝置（1〇)，其中瓌装置於堆疊 (33-39)中含有一狹縫（17)用以連接至RF襯墊（丨丨）。 如申請專利範圍第1項之RF裝置（1 0)，進一步包含置 於形成堆疊（3 3-3 9)之最上方導電層（3 8)之表面上的襯 墊（45)。 6. 一種製造射頻（RF)裝置（1 〇)的方法，其包含下列步驟； 於一介電基底（28)上形成一導電性接地面（30)， 於接地面（30)上部形成一由導電層（34, 36，38)與介 電層（33, 35，37，39)呈交替配置所組成之層接式堆疊 -11 - 本紙張尺度適用中國國家標準(CNS&gt; A4規格(21〇x 297公釐） 、申請專利範園 (33-39)， 接地面（30)與導電層（34, 於一裝置（10)之周邊區域中 之區域， 36，38)藉由導電性導孔（4〇) 互連藉以形成一封閉、中央 以及於中央區内和至少一 RF襯墊（11)。 力電層（37)上形成一導電性 如申請專利範圍第6之方法，其中該介電基底（28)係藉由 在一矽層上形成一二氧化矽層予以製造。 女申蜎專利圍第7項之方法，纟中該介電基底(28)及每 個&quot;電層（3 3, 35, 3 7, 3 9)係藉由化學機械蝕刻及研磨法 予以平整化。 如申靖專利範圍第8項之方法，其中該等導電層（34，36, 38)係形成於介電層（33，35，37，39)上，其形成方式係以 賤鑛之氮化鈦被覆該等介電層，然後再將鋁合金濺鍍在 被覆物上。 10·如申請專利範圍第6項之方法，其中該等導電性導孔（40) 係藉由離子束電漿蝕刻介電層（33，35，37，39)之曝露區、 以濺鍍之氮化鈦被覆導孔（40)之壁面並接著藉由一化學氣 相沉積法以鎢填充該等導孔而形成。 -12- 本紙張尺度適用中國國家標準(CNS) A4規格(210 X 297公釐）Patent application scope AB c D 1 A radio frequency (RF) device (丨 〇), which includes one, the bottom (<0), one; a conductive ground plane (301, ^) A layered stack (33_39) formed on the conductive ground plane 由 and composed of a plurality of conductive layers (34, 36, 38) and dielectric layers (33, 坆 37 39) alternately arranged, and 'a Conductive RF liner), in which the conductive ground plane (30) and conductive layer (34, 36, 38) are interconnected by conductive via holes in the peripheral area of the device to form a seal The central area, and the conductive RF lining (11) in the basin is placed in the Shiyang area and formed on at least; the dielectric layer (37). S 2. For example, the RF device (10) in the scope of patent application, wherein the RF pad (ιι) comprises a plurality of interconnected conductive vias (4) and a dielectric layer (3 5, 3 7) Conductive layers (34, 36, 38) separated from each other. 3. For example, the RF device (10) in the scope of patent application, wherein the device (丨) further includes a conductive base layer (24) and at least one of the base layer (24) and the ground plane (30). Connected conductive path members (41, 43, 44). 4 For example, the RF device (10) in the scope of the patent application, wherein the tritium device includes a slit (17) in the stack (33-39) for connecting to the RF gasket (丨 丨). For example, the RF device (1) of the first patent application scope further includes a pad (45) placed on the surface of the uppermost conductive layer (3 8) forming the stack (3 3-3 9). 6. A method for manufacturing a radio frequency (RF) device (10), comprising the following steps: forming a conductive ground plane (30) on a dielectric substrate (28), and forming a ground plane on the ground plane (30); Laminated stack consisting of conductive layers (34, 36, 38) and dielectric layers (33, 35, 37, 39) in an alternate configuration-11-This paper size applies to Chinese national standards (CNS &gt; A4 specifications (21〇 x 297 mm), patent application park (33-39), ground plane (30) and conductive layer (34, area in the peripheral area of a device (10), 36, 38) through conductive vias (4) The interconnection is used to form a closed, central, and at least one RF pad (11) in the central area. The electro-conductive layer (37) is formed with a conductivity such as the method in the scope of patent application 6, wherein the intermediary The electric substrate (28) is manufactured by forming a silicon dioxide layer on a silicon layer. The method of female patent No. 7 is applied to the dielectric substrate (28) and each &quot; electric layer ( 3 3, 35, 3 7, 3 9) is flattened by chemical mechanical etching and grinding methods. For example, the method in the eighth patent scope of Shen Jing, where The iso-conductive layer (34, 36, 38) is formed on the dielectric layer (33, 35, 37, 39), and the formation method is to cover the dielectric layers with base nitride titanium nitride, and then aluminum alloy Sputtered on the coating. 10. The method according to item 6 of the patent application, wherein the conductive vias (40) are etched through the dielectric layer (33, 35, 37, 39) by an ion beam plasma. The exposed area is formed by covering the walls of the vias (40) with sputtered titanium nitride and then filling the vias with tungsten by a chemical vapor deposition method. -12- This paper size is in accordance with the Chinese National Standard (CNS ) A4 size (210 X 297 mm)
TW091106762A 2001-04-06 2002-04-03 A radio frequency (RF) device and its method of manufacture TW556264B (en)

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