TW541601B - Method for producing an simox substrate and an simox substrate - Google Patents

Method for producing an simox substrate and an simox substrate Download PDF

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TW541601B
TW541601B TW091106214A TW91106214A TW541601B TW 541601 B TW541601 B TW 541601B TW 091106214 A TW091106214 A TW 091106214A TW 91106214 A TW91106214 A TW 91106214A TW 541601 B TW541601 B TW 541601B
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Taiwan
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substrate
heat treatment
single crystal
crystal silicon
simox
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TW091106214A
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Chinese (zh)
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Atsuki Matsumura
Tsutomu Sasaki
Koichi Kitahara
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Nippon Steel Corp
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components
    • H01L21/762Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76243Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using silicon implanted buried insulating layers, e.g. oxide layers, i.e. SIMOX techniques
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1203Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body the substrate comprising an insulating body on a semiconductor body, e.g. SOI

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Element Separation (AREA)
  • Crystals, And After-Treatments Of Crystals (AREA)

Abstract

A method for producing an SIMOX substrate comprising implanting oxygen ions into a single crystal silicon substrate followed by high temperature heat treatment to form a buried oxide layer and a surface single crystal silicon layer, characterized in that a substrate having an average resistivity of 100 Omega cm or more is used as said single crystal silicon substrate, and there is provided a step of maintaining the substrate at a temperature of 1250-800 DEG C for a predetermined time period at the latest stage of said high temperature heat treatment. An SIMOX substrate having an average resistivity of 100 Omega cm or more at the substrate portion is obtained.

Description

541601 玖、發明說明 (發明說明應敘明:發明所屬之技術領域、先前技術、内容、實施方式及圖式簡單說明) I:發明戶斤屬之技術領域3 發明領域 本發明係有關於一種於矽基板之表面附近配置埋入氧 5 化層,並於其上形成單晶矽層(以下稱SOI(Silicon-On-Insulator)層)之SOI基板。更詳而言之,即一種以SIMOX (Separation by IMplanted Oxygen)技術製造 SOI 層之方 法。 ίο 發明背景 於如矽氧化物般之絕緣物上形成單晶矽層之SOI基板 ,主要有SIM0X晶圓與貼合晶圓。SIM0X晶圓係藉由氧 離子之離子注入而於單晶矽基板内部注入氧離子,並藉由 後續進行之退火處理而使該等氧離子與矽原子行化學反應 15 後,經由形成埋入氧化層而製得之SOI基板。又,貼合晶 圓係以2片單晶矽晶圓挾氧化層而粘合,並藉由使2片中 之一片晶圓薄膜化而製得之SOI基板。 該等SOI基板中,SIM0X晶圓因可藉氧離子之注入 深度控制SOI層之膜厚,故其膜厚有均勻性特佳之特徵。 20 於SIMOX晶圓中,SOI層可形成低於〇.3μηι之厚度,亦 可有效控制在0.1 μιη左右,甚而更低厚度之SOI層。特別 是,由於厚度低於0·1 μηι之SOI層大多用於形成完全空乏 型動作之M0S-LSI上,且此時SOI層本身之膜厚與 6 541601 玖、發明說明 MOSFET動作之臨界值電壓成比例關係,因此於製作性能 齊備且成品率佳之裝置上,SOI層之膜厚均勻性乃成重要 之品質。由此觀點,貝SOI層膜厚均勻性佳之SIMOX晶 圓將成為最受期待之新一代MOSFET用基板。 5 製於SOI基板上之MOS-LSI,其裝置形成領域係藉 由插入絕緣體之埋入氧化層而與基板本體形成電性絕緣, 故可實現如前項所述之提高耐放射線性或耐閉鎖性,及低 電力消耗量、超高速動作等優異之特性。此外,如日本專 利公開公報特開平9—64320號中所載,由於裝置之形成 10 領域與基板呈電性分離之狀態,因此可減低裝置形成領域 與基板間產生之接合電容之影響,故有利於形成基頻處理 器等高速裝置。 該曰本專利公開公報特開平9—64320號中,提出將 SOI基板之支持基板之電阻值調成50Ωαη以上之高電阻, 15 作為進一步改善形成於SOI基板上之超高頻裝置之特性之 技術。又,該SOI基板係以所謂之貼合方式製造者,即, 於支持基板側使用由浮動區法製造之高電阻單晶矽基板, 並於裝置形成側使用由恰克勞斯基法製造之低電阻單晶矽 基板,再藉由將各表面進行熱氧化而形成希望厚度之氧化 20 膜並加以貼合,其後,將裝置形成側之矽基板研磨削薄至 所需之厚度。 以前述曰本專利公開公報特開平9—64320號提出之 貼合方式製成之SOI基板用之高電阻率支持基板,若如前 7 541601 玖、發明說明 述般以浮動區法雖可容易製造,但因以同方式製成之矽基 板不含氧,因而產生機械強度不足,易於產生滑移位錯, 且難以製造直徑8吋( 200丽)以上之大口徑基板等問題 〇 5 又,由於以貼合方式製造之SOI基板係藉研磨用以構 成裝置形成部分之矽層而形成者,故亦有膜厚均勾性產生 劣化,及矽層厚度無法均勻形成0.1 μιη左右之厚度之問題 〇 於解決前者之問題上,可考慮利用以恰克勞斯基法製 10 成之單晶矽基板。以恰克勞斯機法製成之單晶矽基板因含 有1018 cm—3左右之濃度之氧,故具有優異之機械強度,並 可製造直徑8吋( 200丽)以上之大口徑基板。又,藉由 調整晶體生長時之雜質添加量,亦可製出具有ΙΟΟΩαη以 上之電阻率之單晶矽基板(有關矽基板之電阻率與雜質濃 15 度之關係,舉例言之,可參考S.M.Sze編「Physics of Semiconductor Devices(2nd Edition)」(1981),John Wiley & Sons,Inc·,p-32 所示)o 又,於解決後者之問題上,則可考慮藉SIMOX法製 造SOI基板。SIMOX法係藉由氧離子注入與高溫熱處理 20 而形成SOI構造,而氧之注入深度可藉離子之加速能量而 控制,因此於高溫熱處理後所得之SOI構造具有膜厚均勻 性佳之特徵,並可製造厚度在Ο.ΐμπι左右之矽層且膜厚均 勻性呈良好之狀態。 8 541601 玖、發明說明 然而,以恰克勞斯基法製成之單晶矽基板因含有微量 氧,因此若施以約500°C之較低溫之熱處理,如裝置之製 作程序中所用之A1佈線形成後之燒結處理等,將產生熱 施體(或氧氣施體),且基板之電阻率下降達數ΙΟΩαη左 5 右(關於熱施體,舉例言之,可參考USC半導體基板技 術研究會編「矽之科學」第7章第3說中所解說者)。為 減輕該影響,需降低矽結晶中之氧含量,但由於以恰克勞 斯基法熔融之矽熔液乃由石英坩堝保存,故無法完全避免 石英溶解析出於矽熔液中,且結晶中之氧濃度降低範圍亦 10 自然地產生界限。因此,於使用一般由恰克勞斯基法製成 之矽基板時,縱使基板製造後具有高電阻率,於低溫進行 之熱處理後仍會產生氧氣施體造成電阻率下降,且無法維 持南電阻率之問題。 進而,由於SIMOX法多半以1300°C以上之高溫施以 15 氧化或以氧化為基準之熱處理,因此矽基板中之氧固態溶 解度乃隨處理溫度而上昇。因此,縱使極力降低材料基板 之氧濃度,仍會造成於SIMOX製造後基板中之氧濃度上 昇,且於實施裝置製造程序中之低溫熱處理時,無法避免 因氧氣施體產生而使電阻率降低之問題。 20 本發明係用以解決具有高電阻率矽基板之SOI基板及 其製造方法中之該等問題,並可提供一種更高品質之高電 阻SOI基板。 【發明内容】 9 541601 玖、發明說明 發明概要 於利用具有高電阻率之單晶矽基板並以SIMOX法製 造SOI基板時發現,若於繼氧離子注入後實施之高溫熱處 理之最後階段,進行一以1250°C以下且在800°C以上之溫 5 度保持預定時間以上之程序,則可降低高溫熱處理時增加 之基板内部之氧濃度,且於後續之裝置製造程序中之低溫 熱處理施行後仍可維持高電阻率。即,本發明係有關於一 種可解決上述課題之SOI基板及其製造方法,並述之於下 10 即,本發明係一種製造SIM0X基板之方法,係藉由541601 发明 Description of the invention (The description of the invention should state: the technical field to which the invention belongs, the prior art, the contents, the embodiments, and the drawings are briefly explained) I: the technical field of the inventor 3 The field of the invention The invention relates to a kind of An SOI substrate in which a silicon oxide layer is buried near the surface of the silicon substrate and a single crystal silicon layer (hereinafter referred to as a SOI (Silicon-On-Insulator) layer) is formed thereon. More specifically, it is a method for manufacturing SOI layers using SIMOX (Separation by IMplanted Oxygen) technology. BACKGROUND OF THE INVENTION An SOI substrate that forms a single crystal silicon layer on an insulator such as a silicon oxide, mainly includes SIM0X wafers and bonded wafers. The SIM0X wafer is implanted with oxygen ions inside the monocrystalline silicon substrate by ion implantation of oxygen ions, and the subsequent annealing treatment is performed to chemically react the oxygen ions with silicon atoms for 15 and then form buried oxide. Layered SOI substrate. The bonded wafer is an SOI substrate obtained by bonding two monocrystalline silicon wafers with an oxide layer, and thinning one of the two wafers. Among these SOI substrates, since the SIMOX wafer can control the film thickness of the SOI layer by the depth of oxygen ion implantation, its film thickness has a characteristic of excellent uniformity. 20 In SIMOX wafers, the SOI layer can be formed to a thickness of less than 0.3 μm, and it can also be effectively controlled to about 0.1 μm, even a lower thickness SOI layer. In particular, most SOI layers with a thickness of less than 0.1 μm are used to form completely empty type MOS-LSIs. At this time, the film thickness of the SOI layer itself is 6 541601 发明, the threshold voltage of the MOSFET operation of the invention It is proportional, so the uniformity of the film thickness of the SOI layer becomes an important quality on a device with complete production performance and good yield. From this point of view, the SIMOX wafer with excellent uniformity of the SOI layer thickness will become the most anticipated new-generation MOSFET substrate. 5 The MOS-LSI fabricated on the SOI substrate has a device formation field that is electrically insulated from the substrate body by inserting a buried oxide layer of an insulator, so it can achieve improved radiation resistance or latch-up resistance as described in the previous paragraph. , And excellent characteristics such as low power consumption and ultra-high-speed operation. In addition, as disclosed in Japanese Patent Laid-Open Publication No. 9-64320, since the device formation area 10 is electrically separated from the substrate, the influence of the joint capacitance between the device formation area and the substrate can be reduced, which is advantageous. Used to form high-speed devices such as baseband processors. In this Japanese Patent Laid-Open Publication No. 9-64320, it is proposed to adjust the resistance value of the supporting substrate of the SOI substrate to a high resistance of 50Ωαη or more, 15 as a technology to further improve the characteristics of the ultra-high frequency device formed on the SOI substrate. . The SOI substrate is manufactured by a so-called bonding method, that is, a high-resistance single crystal silicon substrate manufactured by a floating region method is used on a support substrate side, and a silicon substrate manufactured by Chucklaussky method is used on a device formation side. The low-resistance single crystal silicon substrate is thermally oxidized on each surface to form an oxidized 20 film of a desired thickness and then bonded. Thereafter, the silicon substrate on the device formation side is ground and thinned to a desired thickness. The high-resistivity support substrate for SOI substrates made by the bonding method proposed in the aforementioned Japanese Patent Laid-Open Publication No. 9-64320 can be easily manufactured by the floating region method as described in the previous 7 541601 (1) and the description of the invention. However, because the silicon substrate made in the same way does not contain oxygen, it has insufficient mechanical strength, is prone to slip displacement, and is difficult to manufacture large-diameter substrates with a diameter of 8 inches (200 li) or more. The SOI substrate manufactured by the bonding method is formed by polishing the silicon layer used to form the device formation part, so there are problems that the film thickness is uniformly degraded, and the thickness of the silicon layer cannot be uniformly formed to a thickness of about 0.1 μm. To solve the former problem, consider using a single crystal silicon substrate made of 10% by Chalkaski method. The single crystal silicon substrate made by Chuck Claus machine method has excellent mechanical strength because it contains oxygen at a concentration of about 1018 cm-3, and can manufacture large-diameter substrates with a diameter of 8 inches (200 li) or more. In addition, by adjusting the amount of impurities added during crystal growth, a single crystal silicon substrate with a resistivity of 100Ωαη or more can also be prepared (for the relationship between the resistivity of the silicon substrate and the impurity concentration of 15 degrees, for example, refer to SM Edited by Sze, "Physics of Semiconductor Devices (2nd Edition)" (1981), shown by John Wiley & Sons, Inc., p-32). In order to solve the latter problem, you can consider manufacturing SOI substrates by SIMOX method. . The SIMOX method forms an SOI structure by oxygen ion implantation and high temperature heat treatment 20, and the depth of oxygen implantation can be controlled by the acceleration energy of ions. Therefore, the SOI structure obtained after high temperature heat treatment has the characteristics of good film thickness uniformity, and A silicon layer with a thickness of about 0.1 μm is manufactured and the film thickness uniformity is good. 8 541601 发明, description of the invention However, since the single crystal silicon substrate made by Chucklauszki method contains a small amount of oxygen, if a low temperature heat treatment of about 500 ° C is applied, such as A1 used in the manufacturing process of the device The sintering process after the wiring is formed will generate a thermal donor (or oxygen donor), and the resistivity of the substrate will drop by several 10Ωαη about 5 (for thermal donors, for example, refer to the USC Semiconductor Substrate Technology Research Association) (Explained in Chapter 7, Chapter 3 of "The Science of Silicon"). In order to mitigate this effect, the oxygen content in the silicon crystal needs to be reduced, but since the silicon melt melted by the Chucklauszki method is stored in a quartz crucible, it is impossible to completely avoid the dissolution of quartz from the silicon melt and the crystal The range of oxygen concentration reduction also naturally produces a limit. Therefore, when using a silicon substrate generally made by the Chucklauszki method, even if the substrate has a high resistivity after manufacturing, the oxygen donor will still be generated after the heat treatment at a low temperature to cause the resistivity to decrease, and the southern resistance cannot be maintained. The problem of rate. Furthermore, since the SIMOX method is most likely to perform 15 oxidation or heat treatment based on oxidation at a high temperature of 1300 ° C or higher, the solid solubility of oxygen in the silicon substrate increases with the processing temperature. Therefore, even if the oxygen concentration of the material substrate is reduced as much as possible, the oxygen concentration in the substrate will still increase after SIMOX manufacturing, and when the low-temperature heat treatment in the device manufacturing process is performed, it is unavoidable to reduce the resistivity due to the generation of oxygen donors. problem. 20 The present invention is to solve such problems in an SOI substrate having a high-resistivity silicon substrate and a manufacturing method thereof, and to provide a higher-quality high-resistance SOI substrate. [Summary of the invention] 9 541601 发明, description of the invention Summary of invention When using a single crystal silicon substrate with high resistivity and manufacturing SOI substrate by SIMOX method, it is found that if the final stage of high temperature heat treatment after oxygen ion implantation is performed, The process of maintaining the temperature below 1250 ° C and 5 ° C above 800 ° C for a predetermined time can reduce the oxygen concentration inside the substrate increased during high temperature heat treatment, and it will still be used after the low temperature heat treatment in the subsequent device manufacturing process. Can maintain high resistivity. That is, the present invention relates to an SOI substrate and a method for manufacturing the same that can solve the above-mentioned problems, and is described in the following 10. That is, the present invention relates to a method for manufacturing a SIM0X substrate.

於單晶矽基板中注入氧離子,其後並施以高溫熱處理,而 形成一埋入氧化層及一表面單晶石夕層者;該方法中包含有 一程序,即,使該單晶矽基板使用一平均電阻率在100Ω cm以上且在單晶矽之本徵電阻率以下之基板,並於高溫熱 15 處理之最後階段以1250°C以下且在800°C以上之溫度保持 一定時間者。 前述製造SIM0X基板之方法中,高溫熱處理之最後 階段之保持溫度宜在1200°C以下且在800°C以上。 前述製造SIM0X基板之方法中,高溫熱處理之最後 20 階段之保持時間在4小時以上則更為理想。 又,前述製造SIM0X基板之方法中,單晶矽基板係 以恰克勞斯基法製造者。 前述製造SIM0X基板之方法中,單晶矽基板宜使用 10 541601 玖、發明說明 平均電阻率在500Ωαη以上且在單晶矽之本徵電阻率以下 之基板。 此外,本發明並係一種以前述任一方法製造之 SIMOX基板,且該SIMOX基板經低溫熱處理後之基板部 5 分之平均電阻率係在ΙΟΟΩαη以上且在單晶矽之本徵電阻 率以下。Oxygen ions are implanted into a single-crystal silicon substrate, followed by high-temperature heat treatment to form a buried oxide layer and a single-crystal monolayer on the surface; the method includes a procedure for making the single-crystal silicon substrate Use a substrate with an average resistivity above 100Ω cm and below the intrinsic resistivity of single crystal silicon, and hold it at a temperature below 1250 ° C and above 800 ° C for a certain period of time in the final stage of high temperature heat 15 processing . In the aforementioned method for manufacturing a SIM0X substrate, the holding temperature in the final stage of the high-temperature heat treatment is preferably below 1200 ° C and above 800 ° C. In the aforementioned method for manufacturing a SIM0X substrate, it is more preferable that the holding time of the last 20 stages of the high-temperature heat treatment is 4 hours or more. In the aforementioned method for manufacturing a SIMOX substrate, a single crystal silicon substrate was manufactured by the Chucklauszki method. In the foregoing method for manufacturing a SIM0X substrate, a single crystal silicon substrate is preferably 10 541 601 玖, a description of the invention. A substrate having an average resistivity above 500Ωαη and below the intrinsic resistivity of the single crystal silicon. In addition, the present invention is not a SIMOX substrate manufactured by any of the foregoing methods, and the average resistivity of the substrate portion of the SIMOX substrate after low-temperature heat treatment is at least 100 Ωαη and lower than the intrinsic resistivity of the single crystal silicon.

更理想者為,一種以前述任一方法製造之SIMOX基 板,且該SIMOX基板經低溫熱處理後之基板部分之平均 電阻率係在500Ωαη以上且在單晶矽之本徵電阻率以下。 10 圖式簡單說明 第1Α〜1Ε圖係說明由矽晶圓至SIMOX基板之製造 程序及半導體裝置之製造。 第2圖所示者係氫燒結後之基板氧濃度與基板電阻值 之關係圖表。More preferably, a SIMOX substrate manufactured by any of the foregoing methods, and the average resistivity of the substrate portion of the SIMOX substrate after low-temperature heat treatment is above 500Ωαη and below the intrinsic resistivity of the single crystal silicon. 10 Brief Description of Drawings Figures 1A to 1E show the manufacturing process from a silicon wafer to a SIMOX substrate and the manufacturing of a semiconductor device. The graph shown in Figure 2 is a graph of the relationship between the substrate oxygen concentration and the substrate resistance after hydrogen sintering.

15 第3圖所示者係矽晶圓於熱處理溫度中之氧固溶度之 圖表。 【實施方式1 較佳實施例之詳細說明 其次,說明本發明之實施型態。 20 本發明係有關於一種於支持基板上隔著絕緣層形成半 導體層之SOI基板中,使支持基板形成高電阻率之高電阻 SOI基板。其係於材料基板中使用具有高電阻率之單晶矽 基板,並藉由SIMOX法而製造SOI基板。 11 541601 玖、發明說明 · 以SIMOX法製造SOI基板之程序可參照第ία圖〜 第1D圖加以簡單說明。如第1A圖所示之以恰克勞斯基 法製成之單晶石夕基板1,係如第1B圖般,於高電場下由 石夕基板1上方將氧離子2注入矽基板1之内部,並如第 · 5 1C圖於石夕基板1内部形成埋入氧層3。其後對石夕基板丨進 行熱處理,則形成一由矽基板1與被埋入之氧層3及其上 之石夕層4所組成之s〇I基板(第id圖)。該s〇][基板繼 而經半導體製造程序,利用氧層3上之矽層4且於其上形 _ 成佈線層5,而形成電晶體及其他半導體元件或半導體電 10 路(第1Ε圖)。 作為材料之單晶矽基板若得所需之高 電阻率即可,其 極性則可為ρ型或Ν型。導入之雜質種類並無限制,ρ型 雜質以硼為代表,而Ν型雜質則可使用磷、砷、銻等。單 曰曰石夕之製造方法可為恰克勞斯基法或浮動區法,但以基板 15之栈械強度之觀點而言,則以恰克勞斯基法為佳。單晶矽 φ 之製造條件’例如以恰克勞斯基法進行時之拉晶速度或熱 過私等並無特別之限制。於以恰克勞斯基法進行晶體生長 ' 夺亦可於石夕炫液中施加磁場。此外,基板之氧濃度亦無特 .· 別之限制。 . 關於基板之電阻率,為使形成其上之裝置獲得良好之 回頻特性,則宜使其在1〇〇Ωαη以上且在單晶矽之本徵電 "、下而更理想者則在500Ωαη以上且在單晶石夕之本 徵電阻率以下。目士 # # 卜具有该4電阻率之單晶矽即可如前述般, 12 玖、發明說明 藉由調整晶體生長時添加之雜質量而製造。 關於製造SIMQX基板之條件及氧離子注人並無特別 之限制。氧離子之劑量高低皆可,亦可加入其他條件。低 劑量係指於氧注入後進们·。c以上之高溫熱處理後而 形成埋入氧化膜之劑量,而高劑量係指不進行如此之高溫 熱處理而仍可於氧注人後形成埋人氧化膜之劑量。各劑量 範圍係注人能量之函數,且於進行多纽人時仍憑據各注 入溫度或各劑量等,例如於18〇keV $主入時,一般而言低 3.5xl0-i〇ns/cm 4.5x l〇-ions/cm ^ ^ ^ 範圍,而同樣於180keV注入時,高劑量則指約 13〇xl018iGns/em、上。又,亦可將氧離子注人分為數次 進行氧離子庄人時之基板溫度,由維持結晶性之觀點而 言宜加熱至5〇(TC〜60(rc左右,但並非以此為限。此外 ’關於用以實施氧離子注人之裝置,需可於對氧離子施加 電壓而使之加速後,由矽晶圓表面進行注入,而其裝置形 態、離子注入方式等則無特別限制。 繼氧離子注入後進行之高溫熱處理條件,除本發明所 規定之最後階段外並無特別之限制,但以回復氧離子注入 帶給結晶之損傷之觀點而言,則宜以1300°C以上之高溫 進行處理。關於熱處理之環境並無特別之限制,除氬、氮 等惰性氣體外,亦可使用氧、氫、或氬與氧、氮與氧之現 合氣體等。另,亦可藉由於熱處理中使氧分壓上昇而進行 内部氧化處理。 541601 玖、發明說明15 The graph shown in Figure 3 is a graph of the oxygen solid solubility of silicon wafers at the heat treatment temperature. [Embodiment 1 detailed description of the preferred embodiment] Next, an embodiment of the present invention will be described. 20 The present invention relates to a high-resistance high-resistance SOI substrate in an SOI substrate in which a semiconductor layer is formed on a support substrate through an insulating layer. It is based on the use of a single crystal silicon substrate with high resistivity in the material substrate, and the SOI substrate is manufactured by the SIMOX method. 11 541601 发明 、 Explanation of the invention · The procedure for manufacturing SOI substrates by SIMOX method can be briefly explained with reference to Figures 1 to 1D. As shown in FIG. 1A, the monocrystalline stone substrate 1 made by the Chucklawsky method is shown in FIG. 1B, and oxygen ions 2 are implanted into the silicon substrate 1 from above the stone substrate 1 under a high electric field as shown in FIG. 1B. Inside, and as shown in FIG. 51C, a buried oxygen layer 3 is formed inside the Shixi substrate 1. Thereafter, the Shi Xi substrate 丨 is heat-treated to form a SOI substrate composed of the silicon substrate 1 and the buried oxygen layer 3 and the Shi Xi layer 4 thereon (Fig. Id). The s]] [The substrate then goes through the semiconductor manufacturing process, using the silicon layer 4 on the oxygen layer 3 and forming a wiring layer 5 thereon, to form transistors and other semiconductor elements or semiconductor circuits (Figure 1E) . As long as the single crystal silicon substrate used as the material has the required high resistivity, its polarity can be p-type or N-type. There are no restrictions on the types of impurities to be introduced. Ρ-type impurities are represented by boron, and N-type impurities can be phosphorus, arsenic, antimony, etc. The manufacturing method of Shi Xi alone can be the Chucklauski method or the floating zone method, but from the viewpoint of the mechanical strength of the substrate 15, the Chucklauski method is preferred. There are no particular restrictions on the manufacturing conditions of the single crystal silicon φ, such as the pulling speed or heat transfer during the Chucklausz method. Crystal growth using the Chucklawsky method can also apply a magnetic field in Shi Xixuan's solution. In addition, there is no particular limitation on the oxygen concentration of the substrate. Regarding the resistivity of the substrate, in order to obtain good frequency response characteristics of the device formed thereon, it should be made above 100Ωαη and within the intrinsic power of the single crystal silicon. 500Ωαη or more and below the intrinsic resistivity of the single crystal eve.目 士 # # The single crystal silicon with the specific resistance of 4 can be made as described above. 12 玖, description of the invention Manufactured by adjusting the amount of impurities added during crystal growth. There are no particular restrictions on the conditions for manufacturing SIMQX substrates and the injection of oxygen ions. The dosage of oxygen ions can be high or low, and other conditions can also be added. Low-dose means that after oxygen injection. c. The above-mentioned high-temperature heat treatment will form the dosage of the buried oxide film, and the high-dose refers to the dosage that can form the buried oxide film after oxygen injection without such high-temperature heat treatment. Each dose range is a function of human energy injection, and it is still based on the injection temperature or dose when performing the Nuo Niu. For example, when the main input is 18 keV $, generally 3.5xl0-i0ns / cm 4.5 xl0-ions / cm ^ ^ ^ range, and also when injected at 180keV, the high dose refers to about 13xl018iGns / em. In addition, the substrate temperature when the oxygen ion implantation is divided into several times to perform the oxygen ion implantation may be heated to about 50 ° C. to 60 ° C. from the viewpoint of maintaining crystallinity, but it is not limited thereto. In addition, with regard to the device for implanting oxygen ions, it is necessary to apply a voltage to the oxygen ions to accelerate it, and then implant from the surface of the silicon wafer, and there is no particular limitation on the device form and ion implantation method. The high-temperature heat treatment conditions after the oxygen ion implantation are not particularly limited except for the final stage specified in the present invention, but from the viewpoint of restoring the damage caused by oxygen ion implantation to the crystal, it should be at a high temperature above 1300 ° C. There is no special limitation on the environment for heat treatment. In addition to argon, nitrogen and other inert gases, oxygen, hydrogen, or argon and oxygen, nitrogen and oxygen gas, etc. can also be used. In addition, it can also be used for heat treatment. The internal partial oxidation treatment is carried out to increase the oxygen partial pressure. 541601 发明 、 Explanation of the invention

依據本發明,則需於高溫熱處理之最後階段以1250 它以下且在800°C以上之溫度保持一定時間,其理由說明 如下。如前述,矽基板之電阻率係依低溫熱處理時產生之 氧氣施體而變化。本發明人等利用氧濃度6.0〜ΙΟ.ΟχΙΟ17 5 atoms/cm 3 (以曰本電子工業振興協會之氧濃度換算係數 算出)、熱處理前之電阻率約ΙΟΟΟΩαη之單晶矽基板,查 驗該矽基板之氧濃度與將該基板於氫環境下進行450°C且 1小時之處理後之電阻率之關係。由第2圖所示結果可知 ,隨氧濃度之增加前述低溫熱處理之氧氣施體產生量亦增 10 加,並使基板電阻率降低。基於此一結果,為於低溫熱處 理後仍可將基板之電阻率維持在ΙΟΟΩαη以上,則需使基 板中之氧濃度在7.5xl017cm_3以下。According to the present invention, in the final stage of the high-temperature heat treatment, it is necessary to maintain the temperature at a temperature of 1250 or less and 800 ° C or more for a certain period of time. The reason is as follows. As mentioned above, the resistivity of the silicon substrate varies depending on the oxygen donor generated during the low temperature heat treatment. The present inventors inspected the silicon substrate by using a single crystal silicon substrate having an oxygen concentration of 6.0 to ΙΟχΙΟ17 5 atoms / cm 3 (calculated based on the oxygen concentration conversion coefficient of the Japan Electronics Industry Promotion Association) and a resistivity of about 100 Ωαη before heat treatment. The relationship between the oxygen concentration and the resistivity after the substrate was treated at 450 ° C. for 1 hour in a hydrogen environment. It can be seen from the results shown in Fig. 2 that as the oxygen concentration increases, the amount of the oxygen donor generated in the aforementioned low-temperature heat treatment also increases by 10, and the resistivity of the substrate decreases. Based on this result, in order to maintain the resistivity of the substrate above 100 Ωαη after low-temperature heat treatment, it is necessary to make the oxygen concentration in the substrate below 7.5 × 1017 cm_3.

此外,由於SIMOX基板於該製造程序中之高溫熱處 理時使用含大量氧之環境,因此基板中之氧濃度乃隨其處 15 理溫度之固態溶解度而變化。單晶矽之氧固態溶解度與溫 度之關係係顯示於第3圖(J.C.Mikkesen,Jr·,in Oxygen ,Carbon,Hydrogen and Nitrogen in Crystalline Silicon, p.19 〜30,Materials Research Society(1986)),固態溶解 度於溫度上昇時同步上昇,且於用以製造SIMOX基板之 20 高溫熱處理時一般所用之1300°C以上之溫度下亦到達 l.OxlO18 cm—3以上。因此,SIMOX基板之氧濃度無論材料 基板之氧濃度如何,將隨同溫度下之熱處理時間而產生變 化並達接近該溫度之固態溶解度。此外,氧固態溶解度因 14 541601 玖、發明說明 隨溫度降低而降低,因此若含有_於高溫熱處理之最後階 段以較最高處理溫度低之溫度保持_定之程序,則與前述 高溫熱處理時相同,可隨處理時間而使氧濃度下降至接近 - 該保持溫度之固態溶解度。單晶石夕中之氧固態溶解度,由 . 5於形成前述之7.5xl0ncm-3之溫度係約12耽,因此若含 · 有一於尚溫熱處理之最後階段以125(rc以下之溫度保持 一定時間之程序,則可使SIM〇x基板之氧濃度在 7.5x10丨7 cm_3以下。更確切地說,即宜於l2〇〇t以下。又 · ’氧濃度之下降程度’係由保持溫度中之溶氧之擴散長度 1〇與保持時間之積而決定。若將125(TC下之擴張長度考虞 在内,則保持時間宜於4小時以上,但由經濟性之觀點而 言最長處理時間以20小時左右為宜。又,關於保持溫度 * 係越低則氧固態溶解度越低,故有利於降低氧濃度,反之 - ,由於溶氧之擴散長度亦降低,故需延長保持時間。因此 15 ,保持溫度之下限以800°C為宜。 另,設於高溫熱處理之最後階段之前述程序中之環境 ,係與高溫熱處理之其餘程序同樣無特別限制,除氬、氮 _ 等惰性氣體外,亦可使用氧、氫、或氬與氧、氮與氧之混 ' 合氣體等。 -〇 有關用以進行高溫熱處理之裝置,若可於希望之溫度 下實施所需時間之熱處理即無特別之限制。理想之使用裝 置可舉高溫熱處理爐為代表,但若符合處理溫度、處理時 間等性能,亦可以燈型退火爐進行處理。熱處理爐中除處 15 541601 玖、發明說明 理溫度、處理時間外之條件,如插入溢度、昇溫速度、降 溫速度等並無特別限制,此外,昇溫條件、降溫條件亦可 分為數階段。 實施例 5 以下,說明本發明之具體實例。 藉由恰克勞斯基法將單晶石夕製成一為雜質濃度控制在 1χ1014αιΓ3以下,另一則控制在2xl〇13cnr3以下。其後, 將各結晶進行加工,製成直徑8吋(2〇〇麵)之單晶矽基 板。將製成後之矽基板之電阻率由基板裏面以四探針法測 10定時,最初由結晶加工之基板之電阻值為ιοοωοπ,另一 方由結晶加工之基板之電阻值則為5〇〇Qcm。藉由傅立葉 轉換型紅外線分光裝置測定氧濃度時,任一基板皆為 8·5χ 1017 cm一3 〇 其後,將該等矽基板各準備2片,共計4片,並以基 15 板溫度550°C、加速電壓180keV、注入量4χ1017〇ιΓ2進行 氧離子注入。之後,將以不同結晶加工而成之基板作為一 組之2片基板,分別投入高溫熱處理爐中進行熱處理。第 一組之樣本Α、Β於氬中添加有分壓〇·5%之氧之環境下 ,以溫度1350°C進行6小時之熱處理後,以5°C/分之速 20 度使溫度降至800°C,並自爐中取出。第二組之樣本C、 D於同樣之環境下以同樣溫度1350°c進行6小時之熱處理 後,以5°C/分之速度使溫度降至1250°C,並自爐中取出 。將由熱處理爐取出之SIMOX基板,以稀氟酸溶液去除 16 541601 玖、發明說明 形成於表面之氧化膜。其後,藉由光譜橢圓儀評價各層之 厚度時,樣本A及B之表面矽層之厚度為340nm,埋入 氧化層之厚度為85nm,而樣本C及D則各為330nm、 85nm。將該SIMOX基板之電阻率由基板裏面以四探針方 5 式測定時,與材料基板時相同,樣本A及C為ΙΟΟΩαη, 而樣本Β及D為500Ωαη。 繼之,將該等SIMOX基板全部再投入熱處理爐中, 並於氮中添加有4%之微量氫之環境下,施以1小時450 °C之熱處理。藉由四探針方式測定由熱處理爐取出之基板 10 各自之裏面後可確定,樣本A及B之電阻率係降至50Ω cm,而樣本C則維持在ΙΟΟΩαη,樣本D則維持在500Ω cm之高電阻。 該等結果經彙整後載於表1。 表1 樣本 以四探針測定之電阻率(Ωαη ) 備考 氫燒結前 氫燒結後 A 100 50 比較例1 B 500 50 比較例2 C 100 100 實施例1 D 500 500 實施例2 產業上之可利用性 如以上說明,本發明藉由利用一具有高電阻率之單晶 矽基板並規定製造SIMOX基板時之高溫熱處理條件,則 可提供一種適用於裝置程序等且於低溫熱處理後仍可維持 17 541601 玖、發明說明 基板之高電阻率之品質良好之高電阻SOI基板。 【圖式簡單說明】 第1A〜1E圖係說明由矽晶圓至SIM0X基板之製造 程序及半導體裝置之製造。 5 第2圖所示者係氫燒結後之基板氧濃度與基板電阻值 之關係圖表。 第3圖所示者係矽晶圓於熱處理溫度中之氧固溶度之 圖表。 【圖式之主要元件代表符號表】 1…單晶矽基板 2···氧離子 3…埋入氧層 4...石夕層 5···佈線層In addition, since the SIMOX substrate uses an environment containing a large amount of oxygen during the high temperature heat treatment in the manufacturing process, the oxygen concentration in the substrate varies with the solid solubility at the processing temperature. The relationship between the solid-state oxygen solubility of single crystal silicon and temperature is shown in Figure 3 (JCMikkesen, Jr., in Oxygen, Carbon, Hydrogen and Nitrogen in Crystalline Silicon, p. 19 ~ 30, Materials Research Society (1986)), The solid solubility increases synchronously when the temperature rises, and it also reaches 1.OxlO18 cm-3 or more at a temperature of 1300 ° C or higher, which is generally used in the 20 high-temperature heat treatment used to manufacture SIMOX substrates. Therefore, the oxygen concentration of the SIMOX substrate, regardless of the oxygen concentration of the material substrate, will change with the heat treatment time at the same temperature and reach a solid solubility close to that temperature. In addition, the solid solubility of oxygen is reduced by 14 541601 玖, and the description of the invention decreases with temperature. Therefore, if the procedure _maintained at a lower temperature than the maximum processing temperature in the final stage of the high temperature heat treatment is included, it is the same as the aforementioned high temperature heat treatment. The oxygen concentration decreases with treatment time to near-solid solubility at this holding temperature. The solid-state solubility of oxygen in monocrystalline stone is from about 12 to about 7.5xl0ncm-3 at the temperature mentioned above, so if it contains · there is a certain temperature in the final stage of heat treatment at a temperature of 125 (rc or less) The time program can make the oxygen concentration of the SIM0x substrate less than 7.5x10 丨 7 cm_3. To be more precise, it should be less than 12Ot. Also, the "degree of decrease in oxygen concentration" is maintained by the temperature The diffusion length of dissolved oxygen is determined by the product of 10 and the holding time. If the expansion length at 125 ° C is taken into account, the holding time should be more than 4 hours, but the longest processing time is from the economic point of view. It is preferably about 20 hours. In addition, the lower the holding temperature *, the lower the solid solubility of oxygen, so it is beneficial to reduce the oxygen concentration. Conversely, because the diffusion length of dissolved oxygen is also reduced, the holding time needs to be extended. Therefore, 15 The lower limit of the maintaining temperature is preferably 800 ° C. In addition, the environment in the aforementioned procedure set in the final stage of high temperature heat treatment is the same as the other procedures of high temperature heat treatment, except for inert gases such as argon and nitrogen. Can also make Oxygen, hydrogen, or a mixture of argon and oxygen, nitrogen and oxygen, etc.--Regarding the device used for high temperature heat treatment, there is no particular limitation if the heat treatment can be performed at the desired temperature for the required time. Ideally The use device can be represented by a high-temperature heat treatment furnace, but if it meets the processing temperature, processing time and other properties, it can also be processed by a lamp-type annealing furnace. The conditions in the heat treatment furnace are in addition to 15 541601 理, the temperature of the invention, and the processing time. There are no particular restrictions on the insertion overflow, heating rate, and cooling rate. In addition, the heating and cooling conditions can be divided into several stages. Example 5 Hereinafter, a specific example of the present invention will be described. By the Chucklawsky method Monocrystalline stones were made to have an impurity concentration of 1 × 1014αιΓ3 or less and 2x1013cnr3 or less. Thereafter, each crystal was processed to produce a single-crystal silicon substrate having a diameter of 8 inches (200 planes). The resistivity of the finished silicon substrate is measured from the inside of the substrate by the four-probe method at 10 timings. The resistance value of the substrate originally processed by crystallization is ιοοωοπ, and the other is determined by The resistance value of the substrate processed by crystallization is 500 Qcm. When the oxygen concentration is measured by a Fourier transform infrared spectrometer, any substrate is 8 · 5 × 1017 cm—3. After that, the silicon substrates are prepared separately. Two pieces, a total of four pieces, were subjected to oxygen ion implantation at a base plate temperature of 550 ° C, an acceleration voltage of 180 keV, and an injection amount of 4 × 1017〇ΓΓ. After that, the substrates processed by different crystals were used as a group of two pieces of substrates. Put them into a high-temperature heat treatment furnace for heat treatment. Samples A and B of the first group were heat-treated at 1350 ° C for 6 hours in an environment where argon was added with a partial pressure of 0.5% oxygen, and then at 5 ° C. A speed of 20 ° C / min reduces the temperature to 800 ° C and removes it from the furnace. Samples C and D of the second group were heat-treated at the same temperature at 1350 ° C for 6 hours under the same environment, and then the temperature was reduced to 1250 ° C at a rate of 5 ° C / min, and taken out of the furnace. The SIMOX substrate taken out from the heat treatment furnace was removed with a dilute hydrofluoric acid solution. Thereafter, when the thickness of each layer was evaluated by a spectroscopic ellipsometer, the thickness of the surface silicon layer of samples A and B was 340 nm, the thickness of the buried oxide layer was 85 nm, and the thickness of samples C and D were 330 nm and 85 nm, respectively. When the resistivity of the SIMOX substrate was measured by a four-probe method from the inside of the substrate, as in the case of a material substrate, samples A and C were 100Ωαη, and samples B and D were 500Ωαη. Then, all the SIMOX substrates were put into a heat treatment furnace again, and subjected to a heat treatment at 450 ° C for 1 hour under an environment where 4% of trace hydrogen was added to nitrogen. By measuring the inside of each of the substrates 10 taken out of the heat treatment furnace by a four-probe method, it can be determined that the resistivity of samples A and B dropped to 50 Ω cm, while sample C was maintained at 100 Ωαη, and sample D was maintained at 500 Ω cm. High resistance. These results are summarized in Table 1. Table 1 Resistivity (Ωαη) of the sample measured by four probes Remarks A 100 50 before hydrogen sintering A 100 50 Comparative example 1 B 500 50 Comparative example 2 C 100 100 Example 1 D 500 500 Example 2 Industrially available As explained above, by using a single crystal silicon substrate with high resistivity and specifying the high temperature heat treatment conditions when manufacturing SIMOX substrates, the present invention can provide a device program suitable for the device and can maintain 17 541601 (Ii) Description of the invention The high-resistance and high-resistance SOI substrate with good quality of the substrate. [Brief description of the drawings] Figures 1A to 1E illustrate the manufacturing process from a silicon wafer to a SIM0X substrate and the manufacturing of a semiconductor device. 5 The graph shown in Figure 2 is a graph of the relationship between the substrate oxygen concentration and the substrate resistance after hydrogen sintering. The graph shown in Figure 3 is a graph of the oxygen solid solubility of silicon wafers at the heat treatment temperature. [Representative symbols for main components of the figure] 1 ... Single-crystal silicon substrate 2 ... Oxygen ions 3 ... Buried oxygen layer 4 ... Shi Xi layer 5 ... Wiring layer

Claims (1)

541601 拾、申請專利範圍 1· 一種製造SIMOX基板之方法,係藉由於單晶矽基板中 注入氧離子,其後並施以高溫熱處理,而形成一埋入氧 化層及一表面單晶矽層者;該方法中包含有一程序,即 ’使該單晶石夕基板使用一平均電阻率在1 〇〇Ωαη以上且 在單晶矽之本徵電阻率以下之基板,並於高溫熱處理之 最後階段以1250°c以下且在80(TC以上之溫度保持一定 時間者。 2.如申請專利範圍第1項之製造SIMOX基板之方法,其 中該高溫熱處理之最後階段之保持溫度係在12〇〇〇c以下 且在800°C以上。 3·如申請專利範圍第1或2項之製造SIMOX基板之方法 ,其中該高溫熱處理之最後階段之保持時間係在4小時 以上。 4. 如申請專利範圍第1項之製造SIM〇x基板之方法,其 中该單晶石夕基板係以恰克勞斯基法製造者。 5. 如申請專利範圍第1項之製造SIM〇x基板之方法,其 中該單晶矽基板係使用平均電阻率在5〇〇Qcm以上且在 單晶矽之本徵電阻率以下之基板。 6·種WMOX基板’係藉由申請專利範圍第1至4項中 任一項之方法而製造者,且該SIM〇x基板經低溫熱處 理後之基板部分之平均電阻率係在1〇〇Ωαη以上且在單 晶矽之本徵電阻率以下。 7· 一種SIMOX基板,係藉由申請專利範圍第5項之方法 而製造者,且該SIMOX基板經低溫熱處理後之基板部 19 541601 拾、申請專利範圍 分之平均電阻率係在500Ωαη以上且在單晶矽之本徵電 阻率以下。 20541601 Patent application scope 1. A method for manufacturing a SIMOX substrate is formed by implanting oxygen ions into a single crystal silicon substrate and then applying high temperature heat treatment to form a buried oxide layer and a single crystal silicon layer on the surface. ; The method includes a procedure that 'use the single crystal substrate with a substrate having an average resistivity above 1000 Ωαη and below the intrinsic resistivity of the single crystal silicon, and in the final stage of high temperature heat treatment, Keep below 1250 ° c and keep it at a temperature above 80 ° C for a certain period of time. 2. For the method for manufacturing SIMOX substrates in the first scope of the patent application, wherein the holding temperature in the final stage of the high-temperature heat treatment is 12000c Below and above 800 ° C. 3. If the method for manufacturing SIMOX substrates in the first or second scope of the patent application, the holding time of the last stage of the high temperature heat treatment is more than 4 hours. 4. If the first scope of the patent application The method for manufacturing a SIM0x substrate according to item 1, wherein the monocrystalline substrate is manufactured by Chucklaussky method. 5. If the method for manufacturing a SIM0x substrate according to item 1 of the patent application scope, wherein The single crystal silicon substrate is a substrate having an average resistivity of 500 Qcm or more and below the intrinsic resistivity of the single crystal silicon. 6. · WMOX substrates' are any of the first to fourth items in the scope of patent application It is manufactured by the method, and the average resistivity of the SIMOX substrate after the low temperature heat treatment is above 100Ωαη and below the intrinsic resistivity of the single crystal silicon. 7. A SIMOX substrate, which is borrowed Manufactured by the method in the scope of patent application No. 5 and the substrate portion of the SIMOX substrate after low temperature heat treatment 19 541601. The average resistivity of the patent application scope points is above 500Ωαη and is the intrinsic resistivity of single crystal silicon. Following. 20
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