TW525228B - Method of depositing amorphous silicon based films having controlled conductivity - Google Patents
Method of depositing amorphous silicon based films having controlled conductivity Download PDFInfo
- Publication number
- TW525228B TW525228B TW089102228A TW89102228A TW525228B TW 525228 B TW525228 B TW 525228B TW 089102228 A TW089102228 A TW 089102228A TW 89102228 A TW89102228 A TW 89102228A TW 525228 B TW525228 B TW 525228B
- Authority
- TW
- Taiwan
- Prior art keywords
- conductivity
- scope
- patent application
- item
- film
- Prior art date
Links
Classifications
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
- C23C16/22—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of inorganic material, other than metallic material
- C23C16/24—Deposition of silicon only
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02612—Formation types
- H01L21/02617—Deposition types
- H01L21/0262—Reduction or decomposition of gaseous compounds, e.g. CVD
Landscapes
- Chemical & Material Sciences (AREA)
- Engineering & Computer Science (AREA)
- Organic Chemistry (AREA)
- Physics & Mathematics (AREA)
- General Chemical & Material Sciences (AREA)
- Materials Engineering (AREA)
- Mechanical Engineering (AREA)
- Metallurgy (AREA)
- Inorganic Chemistry (AREA)
- Chemical Kinetics & Catalysis (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Chemical Vapour Deposition (AREA)
- Cold Cathode And The Manufacture (AREA)
Abstract
Description
525228 、發明說明() 登Jli員域: 本發明大致關係於一種用以沉積一非晶…膜於 I* ,二、 / ’邊膜具有受控電氣導電率,更明確地說, 本發明關係於一種、、 、 本所 ’積非日日珍為主膜之方法,該膜具有於 取 換雜非晶矽間之導電率。該膜可以藉由化 子氣相沉積處理沉積至一基材上。 蹵背景: 近年來平板顯示裝置已經開發,用於各種電子應用 I 口筆圯j %腦中。此一裝置,一主動矩陣液晶顯示 二、’二系被使用。然而,液晶顯示裝置具有固定限制,而 1 ί于其不此適用於很多應用中。例如,液晶顯示裝置具有 製造限制,例如於破璃上之非晶矽之低沉積速度,高製造 複雜性及低良率。即使多數光被浪費,但諸顯示器需要— 低功率勞光背光。一液晶顯示影像係同時由亮曰光或極端 視角時很難看到’該視角係於很多應用中之主要考量。 一種最新開發裝置,場發射顯示器(FED)克服部份之 沒些限制,並對於液晶顯示裝置提供了重大之優點。例如 菖FED與典型薄膜電晶體液晶顯示裝置相比較時,具有較 鬲對比率,較大視角,較高最大亮度,較低功率消耗及較 寬操作溫度範圍。 不像液晶顯示,場發射顯示器(FED)使用彩色勞光p 來產生其本身光亮。F E D並不需要複雜,消耗功率之背光 及濾光板,以及所有由FED所產生之光對於使用者均是可 第2頁 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公釐) (請先閱讀背面之注音?事項再填寫本頁} n H ϋ H 一口,_ HI 1 n n n n I » 經濟部智慧財產局員工消費合作社印製 525228 A7525228, description of the invention () Deng Jli member: The present invention is generally related to a method for depositing an amorphous ... film on I *, two, / 'The edge film has a controlled electrical conductivity, more specifically, the relationship of the present invention In a kind of method used by our firm, "Ji Fei Ri Ri Zhen" as the main film, the film has conductivity between the exchange of heterogeneous amorphous silicon. The film can be deposited on a substrate by a chemical vapor deposition process.蹵 Background: In recent years, flat panel display devices have been developed for various electronic applications. In this device, an active matrix liquid crystal display II and a 'II series are used. However, liquid crystal display devices have fixed limitations, and they are not suitable for many applications. For example, liquid crystal display devices have manufacturing limitations such as low deposition speed of amorphous silicon on broken glass, high manufacturing complexity, and low yield. Even though most of the light is wasted, the displays need—low-power light-emitting backlights. A liquid crystal display image is difficult to see at the same time from bright light or extreme viewing angle. This viewing angle is the main consideration in many applications. A newly developed device, the field emission display (FED) overcomes some of the limitations and provides significant advantages for liquid crystal display devices. For example, 菖 FED has a higher 鬲 contrast ratio, larger viewing angle, higher maximum brightness, lower power consumption, and wider operating temperature range when compared with typical thin film transistor liquid crystal display devices. Unlike a liquid crystal display, a field emission display (FED) uses colored light p to produce its own light. The FED does not need to be complicated. The power-consuming backlight and filter, and all the light generated by the FED are available to the user. Page 2 This paper size applies the Chinese National Standard (CNS) A4 specification (210 X 297 mm) (Please read the phonetic on the back? Matters before filling out this page} n H ϋ H, _ HI 1 nnnn I »Printed by the Intellectual Property Bureau of the Ministry of Economic Affairs and Consumer Cooperatives 525228 A7
見的。酬並不需要大陣列之薄膜電晶體。因此,對於主 動矩陣液晶顯示之良率問題之主要來源被去除。 於FED中,電子係由一陰極被射出並碰撞在透明板背 面上之螢光體’以產生影像。已知此一陰極發光過程係為 產生光之最有效方法。不像傳統CRT,於FED中之每一 像素係具有其自已電子源,典型為一陣列之發射微點。於 陰極及閘極間之電壓差吸取來自陰極之電子並將其加速 向螢光體。因Λ,發射電流及顯示亮度係完全取決於發射 材料之功函數。發射源材料之清潔度及均勾度係基本要 求。 多數FED係被抽真至低壓,即1〇·7托耳,以提供發 射電子之長的平肖自由路徑並防止;亏染及尖端之劣化。顯 π解析度足改良係藉由使用一對焦栅,以準直由微點所吸 收之電子。 被發展用於顯π裝置之第一場發射陰極使用鉬之金 屬微點發射詻。於此一裝置中,一矽晶圓係首先被氧化, 以產生一厚Si02層,然後一金屬閘層係被沉積於氧化物 K 。閘極層係然後被作成圖案,以形成閘極孔。蚀刻孔 下之Si〇2造成了閘極之底切並創造了一井。鉬係被沉積 於垂直入射’同時,一犧牲材料例如Ni係由放置於裝置 側之來源沉積,使得具有尖點之圓錐成長於空腔内。當犧 牲層被去除時,留下發射器圓錐。 於另一 fed裝置中,矽微點發射器係由熱氧化矽基 材,對氧化矽作出圖案,以外露下層矽基材,並選擇地蝕 第3頁 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公爱) (請先閱讀背面之注意事項再填寫本頁) C· --------訂·--------· 經濟部智慧財產局員工消費合作社印製 525228 ^_____ 經濟部智慧財產局員工消費合作社印製 A7 B7 發明說明() 刻外路碎’以產生發尖點加以產生。再進一步氧化及姓刻 保護珍並使得發尖點之點尖銳。 於另一&计中,微點係被加至一想要材料,例如玻璃 之基材上’该破瑪係用於大面積平面板顯示之理想基材。 微點可以由導電材料,例如金屬或已摻雜半導體作成。於 此一 FED裝置中,吾人想要有一層間層’其具有受控導電 率於陰極及微點之間。層間層之電阻率之適當加工使得裝 置可以以穩定及可控制方式操作。層間層之電阻率係於絕 緣體及導體之間,而實際想要值係取決於裝置設計之規格 而定。 化學氣相沉積(CVD)或電漿加強化學氣相沉積 (PECVD)係被廣泛用於半導體裝置之製造中,用以沉積材 料層至各種基材上。於一傳統PECVD處理中,一基材係 被放置於真2沉積室中,該室被裝置有一對平行板電極。 該基材係大致被安裝於一晶座上,該晶座也是下電極。一 反應氣體經由一氣體入口歧管流入沉積室中,該歧管同時 作為上電極。一射頻(RF)電壓係施加於兩電極之間,而產 生一 RF功率,以足夠使一電極形成於反應氣體中。該電 漿使得反應氣體分解並沉積一層想要材料於基材體之表 面上。其他電子材料層可以藉由流入沉積室一反應氣體而 沉積於第一層上,該反應氣體包含另一層予以沉積之材 料。每一反應氣體係受到電漿處理,而沉積一層想要之材 料層。 於場發射顯示裝置之製造中,吾人想要沉積一非晶玲 第4頁 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公釐) (請先閲讀背面之注意事項再填寫本頁) _裝---- 訂---------, 525228 經濟部智慧財產局員工消費合作社印製 A7 五、發明說明() 為主膜’該膜具有於本質_及n +摻雜非晶碎間… 間範圍。η、雜非晶珍之導電率係藉由調整含“ 膜中·^磷原子數量加以控制。 、曰、 原埋上,即使可能藉由加入 很少!又磷原子而產生中間導― ^ , 導电率膜,但這是很困難工 作,即需要特殊預先混合pH" >。 2以精確控制磷原子數 因為場發射顯示裝置使得很原 , 很;層,其必須沉積低應力 膜以防止玻璃彎曲及薄膜之剝論 准製程s p r Μ °用以沉積非晶碎之標 τ叙私產生南壓縮之薄膜,特別 時。 田以同,儿積速率沉積 發里I剪及概诚: :發明提供一種沉積方法’用以備製具有受控電阻率 声2非晶珍為主薄膜。此等膜可以於FED製造中作為 -層間層。它們也可以使用於其他電子裝置中,諸裝置需 要文控電阻·率於絕緣體及導體範圍 ㈤叫<潯腠者。於本發明 中所述之沉積法利用化學氣相沉積戋兩 π在、、 貝4兒漿加強化學氣相 /儿積之万法,但其他薄膜沉積技術 可以使用。 ⑴口物理氣相沉積也 於-方面中,本發明特徵於一種形成非晶妙為主膜於 基材上之方法’該基材係位於沉積室中,該方法包含:將 -珍為王揮發物引入沉積室内;將—導電率增加揮發物引 入沉積室中’該導電率增加揮發物包含—或多數用以增加 非晶石夕為主膜導電率之成份;及將-導電率減少揮發物引 第5頁 私紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公釐) IJ ^---------. (請先閱讀背面之注意事項再填寫本頁) 經濟部智慧財產局員工消費合作社印製 525228 A7 ---------_B7_ _____ __ 五、發明說明() ^' 〜- 積主中’違導電率減少揮發物包含一 必夕數成份,用 ’咸V非晶碎為主膜之導電率。 、、於另一方面,本發明特徵在於一種形成非晶矽為主膜 於基材上之方法,該基材係位於沉積室内,該方法· 恍— .. ^ ^ 、一夕為主揮發物引入沉積室中;將膦引入沉積室中;並 將—含氮揮發物引入沉積室中。 ,、 ^於另一方面中,本發明特徵在於一種形成非晶矽為主 膜於基材上4方法,該基材係位於沉積室内,該方法包 含:將一矽為主揮發物引入沉積室中;將膦引入沉積室 内,並將一含碳揮發物引入沉積室中。 諸實施例可以包含一或多數個以下特性。 導電率增加揮發物及導電率減少揮發物可以被以相 關相對流速引入沉積室中,該流速係被選擇,以達成想要 薄膜電阻率。相對流速可以被選擇以完成約1 〇3至1 〇 7歐 姆公分之膜電阻率。導電率增加揮發物可以包含膦及導電 減少揮發物可以包含氨,膦及氨係被引入沉積室中,以約 1 : 1 000至約1 : 1〇(膦:氨)範圍中之流速比。或者,導電 率增加揮發物可以包含膦及導電率減少揮發物可以包含 甲烷,膦及甲烷係以約1 : 1 〇 〇至約1 : 1 (膦··曱烷)之流 速。 導電率增加揮發物可以包含一摻雜物。該掺雜物可以 包含一 η型摻雜物(例如磷)或P型摻雜物(例如硼)。 非晶矽為主膜可以特徵於一能帶隙,及導電率減少揮 發物較佳包含一能帶隙增加成份,其增加#晶碎為主膜相 第6頁 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公釐) (請先閱讀背面之注意事項再填寫本頁)See you. It does not require large arrays of thin film transistors. Therefore, the main source of yield problems for active matrix liquid crystal displays is eliminated. In the FED, electrons are emitted from a cathode and collide with a phosphor 'on the back surface of the transparent plate to produce an image. This cathodic emission process is known to be the most effective method of generating light. Unlike traditional CRTs, each pixel in a FED has its own electron source, typically an array of emitting microdots. The voltage difference between the cathode and the gate draws electrons from the cathode and accelerates them toward the phosphor. Because of Λ, the emission current and display brightness depend entirely on the work function of the emitting material. The cleanliness and uniformity of the emission source materials are the basic requirements. Most FED systems are pumped down to a low pressure, ie 10.7 Torr, to provide a long free path of Ping Shao to emit electrons and prevent it; defects and tip deterioration. The apparent π resolution improvement is achieved by using a focusing grid to collimate the electrons absorbed by the micro-dots. The first field emission cathode developed for a π display device uses molybdenum metal micro-dots to emit plutonium. In this device, a silicon wafer system is first oxidized to produce a thick SiO 2 layer, and then a metal gate layer system is deposited on the oxide K. The gate layer system is then patterned to form a gate hole. The Si02 under the etched hole caused the gate undercut and created a well. The molybdenum series is deposited at the normal incidence 'while a sacrificial material such as Ni series is deposited from a source placed on the device side, so that a cone with a sharp point grows in the cavity. When the sacrificial layer is removed, the emitter cone is left. In another fed device, the silicon micro-dot emitter is made of thermally oxidized silicon substrate, patterning the silicon oxide, exposing the underlying silicon substrate, and choosing to etch. Page 3 This paper applies Chinese National Standards (CNS) A4 specifications (210 X 297 public love) (Please read the precautions on the back before filling out this page) C · -------- Order · -------- · Employee Consumption of Intellectual Property Bureau of the Ministry of Economic Affairs Printed by the cooperative 525228 ^ _____ Printed by the Consumers ’Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs, printed A7 B7 Description of the invention () Cut out the road to produce sharp points. Further oxidize and protect the name and make the point sharp. In another & meter, micro-dots are added to a desired material, such as glass substrates. 'The Poma is an ideal substrate for large area flat panel displays. The microdots can be made of a conductive material, such as a metal or a doped semiconductor. In this FED device, we want to have an interlayer 'that has a controlled conductivity between the cathode and the microdots. Proper processing of the interlayer resistivity allows the device to operate in a stable and controlled manner. The resistivity of the interlayer is between the insulator and the conductor, and the actual desired value depends on the specifications of the device design. Chemical vapor deposition (CVD) or plasma enhanced chemical vapor deposition (PECVD) is widely used in the manufacture of semiconductor devices to deposit material layers onto various substrates. In a conventional PECVD process, a substrate is placed in a true 2 deposition chamber, which is equipped with a pair of parallel plate electrodes. The substrate is generally mounted on a crystal base, which is also a lower electrode. A reaction gas flows into the deposition chamber through a gas inlet manifold, which also serves as the upper electrode. A radio frequency (RF) voltage is applied between the two electrodes, and an RF power is generated enough to form an electrode in the reaction gas. The plasma decomposes the reactive gas and deposits a desired material on the surface of the substrate body. Other electronic material layers can be deposited on the first layer by flowing into the deposition chamber with a reactive gas that contains another layer of material to be deposited. Each reaction gas system is treated with plasma, and a desired material layer is deposited. In the manufacture of field emission display devices, I would like to deposit an amorphous crystal. Page 4 The paper size is applicable to China National Standard (CNS) A4 (210 X 297 mm) (Please read the precautions on the back before filling in this Page) _installation ---- order ---------, 525228 Printed A7 by the Consumers 'Cooperative of Intellectual Property Bureau of the Ministry of Economic Affairs 5. Description of the invention () Main film' This film has its essence _ and n + Doped amorphous fragmentation ... range. The conductivity of η and heteroamorphous crystals is controlled by adjusting the number of phosphorus atoms in the film containing ".", said, buried in the original, even if it may be added by very little! and phosphorus atoms to generate intermediate conductance-^, Conductivity film, but it is very difficult to work, that is, it requires special premixing pH " >. 2 in order to precisely control the number of phosphorus atoms because the field emission display device makes it very original, very; layer, it must deposit a low stress film to prevent Glass bending and thin film peeling standard process spr Μ ° used to deposit amorphous broken film τ succinated film produced by the South compression, especially when. Tian Yitong, the deposition rate of the hairpin I shear and general sincerity:: Invention Provide a deposition method to prepare amorphous films with controlled resistivity. These films can be used as interlayers in FED manufacturing. They can also be used in other electronic devices. Controlling the resistance and rate in the range of insulators and conductors is known as <浔 腠. The deposition method described in the present invention uses chemical vapor deposition. But other thin film deposition techniques Qikou physical vapor deposition is also in the-aspect, the present invention is characterized by a method of forming an amorphous film on a substrate 'the substrate is located in a deposition chamber, the method includes: Zhenweiwang introduced volatiles into the deposition chamber; introduced-conductivity increased volatiles into the deposition chamber 'the conductivity increased volatiles contained-or most of the components used to increase the conductivity of the amorphous film as the main film; and-conductive The reduction of volatile matter cited on page 5 The private paper size applies to the Chinese National Standard (CNS) A4 (210 X 297 mm) IJ ^ ---------. (Please read the precautions on the back before filling in this Page) Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs 525228 A7 ---------_ B7_ _____ __ V. Description of the invention () ^ '~-In the owner's "Iconductivity reduction of volatile matter contains a must The conductivity of the main film is based on the amorphous salt of the salt V. On the other hand, the invention is characterized by a method for forming an amorphous silicon film on a substrate, which is located in a deposition chamber. This method · 恍 — .. ^ ^, the main volatiles are introduced into the deposition chamber overnight The phosphine is introduced into the deposition chamber; and the nitrogen-containing volatiles are introduced into the deposition chamber. In another aspect, the present invention is characterized by a method for forming an amorphous silicon-based film on a substrate. The material is located in the deposition chamber, and the method includes: introducing a silicon-based volatile substance into the deposition chamber; introducing phosphine into the deposition chamber; and introducing a carbon-containing volatile substance into the deposition chamber. Embodiments may include one or more of the following. Characteristics. Increased conductivity and decreased conductivity can be introduced into the deposition chamber at a relative relative flow rate, which is selected to achieve the desired film resistivity. The relative flow rate can be selected to achieve approximately 1.03 to Film resistivity of 107 ohm cm. The volatiles with increased conductivity may contain phosphine and the volatiles with reduced conductivity may contain ammonia. Phosphine and ammonia are introduced into the deposition chamber at a flow rate ratio in the range of about 1: 1 to about 1:10 (phosphine: ammonia). Alternatively, the conductivity-increasing volatiles may include phosphine and the conductivity-decreasing volatiles may include methane, and the phosphine and methane are at a flow rate of about 1: 1 to about 1: 1 (phosphine · methane). The conductivity increasing volatiles may include a dopant. The dopant may include an n-type dopant (such as phosphorus) or a p-type dopant (such as boron). Amorphous silicon-based film can be characterized by a band gap, and the conductivity is reduced. Volatile compounds preferably include a band gap increasing component, which increases # 晶 碎 Main film phase. Page 6 This paper applies Chinese national standards ( CNS) A4 size (210 X 297 mm) (Please read the precautions on the back before filling this page)
說明( j^^>228 五、發明 子於一形成於類似停件下之 * 加成fv道 々件下又一膜之能帶隙而不有能帶增 雙(例:曱!二率増加探發物可…氣,氨,一, 於一貫施例中,石夕幺幸 ,, 物包& _ '、、 匕含^夕健’導電率增加揮發 中,二王及二電八率減少揮發物包含氨。於另-實施例 及導電率沾广含矽烷’及導電率增加揮發物包含膦, 包年減少揮發物包冬甲 6、 膜包含矽俨壤。 於另一貫施例中,矽為主 揮發物包: !增加揮發物包含膦1-導電率減少 “二導電率減少揮發物包含甲烷。 二;1:!減少揮發物可以被引入沉積室中。 非晶砂為主 /J中’具有精確控制導電率及低應力之 、’專模係藉由一反庫廣触 加強化學氣相沉積室加以產生乳合物流入一電聚 氣體所承恭、 反應氣體處合物包含被氫 騰含量,北:錢:氨及膦。藉由控制膦部份壓力而改變 膦厶及 為王挺《n型導電率可以被改變,即增加 量::::加導電率。藉由控制氨部份壓力而改變氮含 之4可以被改變,即增加氮含量增加非…主膜 ^ ^料場發射顯示器裝置之理想範圍係於約… / 10㉟姆公分。於本發明中所述之新穎方法使得本技 二者可以控制非晶秒為主膜之電阻率於103至107歐姆公 分之想要範圍内。由新穎方法所產生之薄膜具有低拉力應 力’使得彎曲或自基材剝離可以被避免。 本發明同時也有關於一場發射顯示裝置,其係由電漿 加強化學氣相沉積技術所製造,於該技術中一反應氣體混 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公爱) (請先閱讀背面之注意事項再填寫本頁) 攀裝 • n I n n ·ϋ n n 訂---------· 525228. A7 B7 五、發明說明() 合物,包含矽烷,氫,膦(被载於氫)及氨係被用以產生具 有叉控導電率之非晶矽為主薄膜。藉由調整每一成份氣體 之流速,一用於場發射裝置之具有精確控制導電率及低應 力之非晶石夕為主薄膜可以取得。 本發明之優點係如下: 本發明提供-種方法’用以於化學氣相沉積處理或電 漿加強化學氣相沉積處理中,沉積具有控制導電率及低應 力之非晶珍為主膜,藉由併入簡單處理控制步驟。本發明 同時提供一種方法,用以於化學氣相沉積處理或電漿二強 化學氣相沉積處理中’藉由使用一含PA及ΝΑ之反應氣 體混合物,以沉積非晶碎為主之薄膜,該薄媒具有受㈣ 電率及低應力。本發明更提供一種方法,用以沉積非“ 為主薄膜,該薄膜具有受控導電率或電漿加強化學氣相沉 積處理,藉由控制反應室中之反應氣體之流速。 本發明之其他特性及優點將由以下包含圖式及申請 專利範圍之說明而了解。 3 圖式簡軍說明: 經濟部智慧財產局員工消費合作社印製 之電漿加強化 (請先閱讀背面之注意事項再填寫本頁) 第1圖為可以執行依據本發明之方法於其中 學氣相沉積室之剖面圖。 U. 第2圖為典型場發射顯示裝置之放大剖面圖。 第3圖為圖表,例示出電阻率與pHs及ΝΑ流逯比間之關 係。Explanation (j ^^ > 228 5. The inventor is formed in a similar stopper * Addition of the band gap of another film under the fv channel without the band double (for example: 曱! 二 率 増 加The probe can be ... gas, ammonia, and in the same embodiment, Shi Xi is lucky, and the package & _ ',, dagger containing ^ Xi Jian' conductivity increases volatile, the two kings and two electricity eight rate Reduce volatiles to include ammonia. In another embodiment and conductivity, silanes are widely contained and volatiles are increased to include phosphine, and volatiles are reduced to reduce the volatiles, such as Dongjiao 6, and the film to contain silicon loam. In another embodiment, Silicon-based volatiles package:! Increase volatiles containing phosphine 1-Conductivity reduction "Two conductivity reduces volatiles containing methane. Two; 1 :! Reduce volatiles can be introduced into the deposition chamber. Amorphous sands dominate / The special model in J, with precise control of electrical conductivity and low stress, is produced by an inverse library and wide-touch enhanced chemical vapor deposition chamber to produce a milk compound and flow into an electropolymer gas. Hydrogen content, North: Qian: Ammonia and phosphine. Phosphonium is changed by controlling the pressure of the phosphine part and Wang Ting The n-type conductivity can be changed, that is, to increase the amount :::: plus conductivity. By controlling the pressure of the ammonia part, the nitrogen content can be changed. 4 can be changed, that is, increasing the nitrogen content to increase the non-main film ^ ^ material field emission The ideal range of the display device is about ... / 10 cmcm. The novel method described in the present invention allows both of this technology to control the resistivity of the amorphous second main film within the desired range of 103 to 107 ohm cm. The film produced by the novel method has low tensile stress, so that bending or peeling from the substrate can be avoided. The invention also relates to a field emission display device, which is manufactured by plasma enhanced chemical vapor deposition technology. The size of the paper for the reaction gas mixed paper in the technology is applicable to the Chinese National Standard (CNS) A4 specification (210 X 297 public love) (Please read the precautions on the back before filling this page) Mounting • n I nn · ϋ nn Order- ------- · 525228. A7 B7 V. Description of the invention () Compounds, including silane, hydrogen, phosphine (carried in hydrogen) and ammonia are used to produce amorphous silicon with cross-conductivity. Main film. By adjusting each The flow rate of the partial gas can be obtained as a main thin film of amorphous stone with precise control conductivity and low stress for field emission devices. The advantages of the present invention are as follows: The present invention provides a method 'for chemical gas In the phase deposition process or the plasma enhanced chemical vapor deposition process, an amorphous film with controlled conductivity and low stress is deposited, and a simple process control step is incorporated. The invention also provides a method for chemical In the vapor deposition process or the plasma two strong chemical vapor deposition process, by using a reaction gas mixture containing PA and NA, the amorphous thin film is mainly deposited. The thin medium has a low electrical conductivity and low stress. The present invention further provides a method for depositing a non- "main film having a controlled conductivity or a plasma enhanced chemical vapor deposition process by controlling the flow rate of the reaction gas in the reaction chamber. Other features and advantages of the present invention will be understood from the following description including drawings and patent application scope. 3 Illustration of brief military illustration: Plasma printing enhanced by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs (please read the precautions on the back before filling out this page). Figure 1 shows the method according to the present invention. Sectional view of facies deposition chamber. U. Figure 2 is an enlarged sectional view of a typical field emission display device. Figure 3 is a graph illustrating the relationship between resistivity and pHs and NA flow ratio.
第4圖為圖表,例示出應力與pH j久inh3成逮比間之關 第8頁 本紙張尺度適用中國國豕標準(CNS)A4規格(21〇 X 297公爱) 525228 A7 五、發明說明( 係。 第5圖為非晶矽為主膜之雷阳盘 包阻率與膦:甲烷流速比之關 係。 岡號對照氣明: 10電漿加強化學氣相沉積設備 12 16 20 24 28 32 38 50 54 58 沉積室 氣體入口歧管 轴 抬舉板 抬舉孔 側壁 基材 場發射顯示裝置 玻璃基材 金屬閘極層 14 18 22 26 30 36 42 52 56 60 項壁 晶座 底壁 括舉銷 氣體出口 RF電源 氣體入口管 電阻層 絕緣體層 陰極結構 (請先閱讀背面之注意事項再填寫本頁) -裝--------訂---------· 發明詳細說曰3 : 經濟部智慧財產局員工消費合作社印製 本發明揭示一種改良古 民万法’用以沉積具有受控導電率 及低應力之非晶石夕為主薄蓉 辱膜:於基材上,用於一例如場發射 顯示裝置之電子裝置,兹 精由電漿加強化學氣相沉積技術。 開1參考第1圖’其中示出一電漿加強化學氣相沉積 設備1 0之剖面圖’依據本發明之方法可以執行於其中者。 例如由透納等人所揭示於美國專利第5,512,32〇號。一沉 第9頁 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公釐) 525228Figure 4 is a chart illustrating the relationship between stress and pH j 久 inh3. Page 8 This paper applies the Chinese National Standard (CNS) A4 specification (21〇X 297 public love) 525228 A7 V. Description of the invention (Department. Figure 5 is the relationship between the entrapment ratio of the Leiyang disk and the phosphine: methane flow rate ratio of the amorphous silicon-based film. Gang No. control gas Ming: 10 plasma enhanced chemical vapor deposition equipment 12 16 20 24 28 32 38 50 54 58 Deposition chamber gas inlet manifold shaft lifting plate lifting hole side wall substrate field emission display device glass substrate metal gate layer 14 18 22 26 30 36 42 52 56 60 RF power supply gas inlet tube resistance layer insulator layer cathode structure (please read the precautions on the back before filling this page) -Installation -------- Order --------- · Detailed description of the invention 3 : Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economics The present invention discloses an improved ancient method for depositing amorphous stones with controlled conductivity and low stress. The thin film is mainly used as a substrate Electronic devices such as field emission display devices Vapor deposition technology. Reference is made to Fig. 1 which shows a sectional view of a plasma-enhanced chemical vapor deposition device 10 'in which the method according to the present invention can be performed. For example, disclosed by Turner et al. U.S. Patent No. 5,512,32. Yi Shen, page 9 This paper is sized to the Chinese National Standard (CNS) A4 (210 X 297 mm) 525228
五、發明說明() 開口’穿過頂壁14及-第-電極或氣體入 口歧& 1 6於邊開口中。或者,丁員Μ 14可以與鄰近内表面 (請先閱讀背面之注意事項再填寫本頁) 之屯極1 6起固化。於室i 2之内有一晶| 1 8,該晶座係 以板形式,平杆裳一雨打 丁弟 私極1 6。晶座1 8典型為鋁並被塗覆 以一層氧化鋁。一晶虑1 δ #、丄, 曰日厘1 8係被連接至地端,使得其作為 第一見極’以連接RF源3 6於兩電極16及1 8之間。 叩座1 8係安裝於軸2〇之一端,該軸向垂直延伸穿過 /儿積至12〈底壁22。軸2〇係可垂直移動,以允許晶座 1 8垂直向第一電極或遠離該電極。一抬舉板24水平延伸 於晶座18及沉積室12之底壁22之間,該底壁係大致平 灯於晶座1 8並可垂直移動。抬舉銷26可由抬舉板24垂 直向上伸出。抬舉銷2 6係被定位以延伸穿過於晶座1 8中 <抬舉孔28 ’並且,其長度係略微長於晶座1 8之厚度。 雖然圖中只示出兩抬舉銷26,但其也可能有更多抬舉銷 26分離開抬舉板24。 經濟部智慧財產局員工消費合作社印製 一氣體出口 30延伸穿過沉積室12之側壁32並連接 至機構(未示出),用以將沉積室12排氣。一氣體入口管 42延伸入第一電極或沉積室I]之氣體入口歧管16,並連 接穿過一氣體交換網路(未示出)至各種氣體源(未示出)。 第一電極1 6係連接至一 rf電源3 6。一傳送板(未示出) 係典型被提供以承載基材經由一真空隔絕門(未示出)進入 沉積室12並至晶座1 8上,並同時被由沉積室12移去被 塗覆之基材。 於沉積設備1 0之操作中,一基材3 8係首先被加載至 第10頁 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公釐) 525228 A7 B7 五、發明說明( 經 濟 部 智 慧 財 產 局 員 工 消 費 合 作 社 印 製 沉積室12並被傳送板(未示出)所故置於晶纟18上。基材 38係為-尺寸’該尺寸超出過晶座18之抬舉孔28者。一 種用於平板顯示裝置基材之經常使用大小係大約36〇_ 乘以465顏。一晶纟系藉由移動& 2〇肖上以定位於抬 舉銷26之上’使得抬舉銷26並夫M a F Λ 上衣延伸穿過孔28,及晶座 1 8及基材3 8係相當接近於第一雨4τ_ ^ 弟 16。於基材表面及氣 體入口歧管16之釋放表面間之電極間距或距離係於約12 至約5〇_之間。-更佳之電極間距係於約2〇至約36匪 之間。 於本發明之沉積處理之前,可以是大 基材38 |依據已知技術加以纟理。㈣佳實施例之啟始 處理後,-包含-圖案金屬之最上層係被沉積。 於本發明之沉積處理開始時,沉積室12係首先被經 由氣體出口 30被抽氣。該有圖案基材則然後被定位於 晶座18之上。基材38係被保持於約2〇〇i 4〇代之溫度 間,於沉積本發明之非晶矽薄之時。於沉積時,用於基材 之較佳溫度範圍係於約300t至約35(rc之間。於沉積時, -於約0.5托耳至約5托耳間之壓力係被維持於反應室 中,一較佳壓力範圍係於約丨5托耳及约2 · 5托耳之間。 以本設備之詳細說明處理係包含於勞等人之美國專利第 5, 399, 3 87號案中,該案係受讓給本案之受讓人,該案 係併入作為參考。 弟2圖不出典型場發射顯示裝置5〇之放大剖面圖。 裝置50係藉由沉積非晶矽為主膜之電阻層52於玻璃基材 (請先閱讀背面之注意事項再填寫本頁) ^--------^--------- 第11頁 W張尺—中各⑵0 χ 297公髮r 525228 A7 B7 五、發明說明( (請先閱讀背面之注意事項再填寫本頁) 54上加以形成。一絕緣體層56及一金屬閉層58係然後依 序形成並蝕刻,以形成金屬微點60。一陰極結構6〇係被 電阻層52所覆蓋。因此,一電阻但略微導電非晶矽層52 在高度絕緣層56,例如Si〇2。能控制非晶矽層52之電阻 率係重要的,使得其並未形成過多電阻,但其將作動為一 限制電阻,以防止若一微點60短路至金屬層58時有過多 電流流動。 應注意的是雖然一場發射顯示裝置係被顯示以展示 本發明之方法,但該方法並不只限定於FED之製造。麥發 明可以用於任何需要沉積一層具有受控電阻率之電子裝 置之製造。 一連_之測試係進行於由本發明方法所備製之測試 樣印上’以展現於導電率上之反應流速作用及所產生薄膜 之應力。其結果係總結於表1及2。 例子 經濟部智慧財產局員工消費合作社印製 例子1展7F用於一本質非晶矽薄之沉積處理,該膜並 未包含於反應氣體混合物中之摻雜氣體。該膜係形成為於 受熱基材上之包漿中之碎垸及氫反應之副產物。碎燒之 流速係被控制於lOOOsccm ’及氫之流速係被控制於 lOOOsccm,及所使用電漿功率(即供給至電極16之RF功 率)係3 00瓦,罜之壓力係保持於2 〇托耳,電極間距(即 於電極16及晶座18間之間距)係保持於962密耳(2·44公 分),以接觸加熱來加熱基材之晶座係被保持於4丨〇 之溫 第12頁 525228 Α7 Β7 五 經濟部智慧財產局員工消費合作社印製 、發明說明( 度,及所取得之沉積速率係1 6 8奈米每分。於沉積處理完 成後,所取得之薄膜係被測試以產生以下物理特性,8 . Q X108達因每平方公分之壓縮應力及2.0 xio9歐姆公分之 電阻率。 例子2 例子2例示用於摻雜ρ非晶矽之沉積處理,其中薄膜 係被沉積於ΡΗ3氣體之流動,但沒有ΝΗ3氣體。矽烷之流 速係 lOOOsccm,及 ΡΗ3之流速係 〇.5Sccm,及氧是 lOOOsccm,及所用之RF功率為300瓦,室壓為2.0耗耳, 晶座間距係9 6 2密耳(2 · 4 4公分),晶座溫度係4 1 〇 °c及沉 積速度係完成於每分156奈米。膦係為於氫載氣中〇 5% 之濃度,該載氣係於流速中。所取得之非晶矽膜具有i. 7 X109每平方公分達因之壓縮應力及17 χ1〇2歐姆公分之 電阻率。 例子3 於此例子中’只有氨氣體被使用於反應氣體混合物 中’而沒有PH3氣體。所使用之矽烷氣體流速為 lOOOsccm ’ NH3 流速為 50〇SCCm,氫流速為 1〇〇〇sccm,所 使用RF功率為300瓦,室壓係被保持於2 〇托耳,電極 間距係962密耳(2.44公分),晶座溫庋為41(Γ(:,及取得 每分1 3 5奈米之沉積速率。所取得用於薄膜之物理特性係 遠不同於例子2中所取得者。膜應力係於7 4 χ丨〇9每平方 第13頁 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公釐) C請先閱讀背面之注音?事項再填寫本頁) >裝------- —訂-------- 經濟部智慧財產局員工消費合作社印製 525228 A7 __________B7 五、發明說明() 公分達因之張力模式。所量得之膜電阻率係具有2 2 χ丨〇 i 0 歐姆公分之高電阻值。 於此例子中,PH;之摻雜氣體及Nh3之含氮氣體係用 於反應氣體混合物中、PH3對NH3之流速比係1.25 X 10-2 比1。碎垸之流速為iooosccm,PH3之流速係2 5sccin , NH3之流速係20〇sccm,H2之流速係1 000sccm。所使用 RF功率為600瓦,室壓為2.0粍耳,電極之間距為962 密耳(2.44公分),及晶座溫度係4〇〇它,及取得每分1 97 奈米之沉積速率。一具有想要電阻率之非晶矽膜係被取 得。薄膜之物理特性係量測於4 · 〇 X 1 〇8達因每平方公分之 張應力及1.6 X 1 0歐姆公分之電阻率。應注意電阻率值係 約於例子2及例子3所示之兩極限值之一半,即於丨.7 X 102 及 2.2 X 1010 之間。 例子5 於此例子中,PH3及NH3之氣體均被用於反應氣體混 合物中。PH3對NH3之流速比為0·75 X 1(Τ2比1。於此化 學氣相沉積處理中,矽烷之流速係為1〇〇〇seem,ΝΗ3之流 速為 200sccm,PH3之流速為 1.5sccm,H2之流逯為 lOOOseem,所使用之RF功率為600瓦,室壓係被保持於 2.0托耳,於電極間之間距係962密耳(2.44公分),晶座 溫度係被保持於4 0 0 °C,及取得每分1 9 7奈米之沉積速 (請先閱讀背面之注意事項再填寫本頁) >裝------- —訂---------· 第u頁V. Description of the invention () The opening 'passes through the top wall 14 and the -electrode or gas inlet port & 16 in the side opening. Alternatively, the D member M 14 can be cured with the tuner pole 16 adjacent to the inner surface (please read the precautions on the back before filling this page). There is a crystal | 1 8 in the chamber i 2. The seat is in the form of a plate. The base 18 is typically aluminum and is coated with a layer of alumina. A crystal line 1 δ #, 丄, said Japanese 18 series is connected to the ground, so that it is used as the first pole ′ to connect the RF source 36 between the two electrodes 16 and 18. The cymbal 18 is mounted on one end of the shaft 20, and the axial direction extends vertically through 12 to the bottom wall 22. The axis 20 can be moved vertically to allow the pedestal 18 to be perpendicular to the first electrode or away from the electrode. A lifting plate 24 extends horizontally between the base 18 and the bottom wall 22 of the deposition chamber 12, and the bottom wall is substantially flat and can move vertically on the base 18. The lifting pin 26 can be extended vertically by the lifting plate 24. The lift pins 26 are positioned to extend through the base 18 < lift holes 28 ' and their length is slightly longer than the thickness of the base 18. Although only two lifting pins 26 are shown in the figure, there may be more lifting pins 26 separating the lifting plate 24. Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economics A gas outlet 30 extends through the side wall 32 of the deposition chamber 12 and is connected to a mechanism (not shown) for exhausting the deposition chamber 12. A gas inlet pipe 42 extends into the gas inlet manifold 16 of the first electrode or deposition chamber 1] and is connected through a gas exchange network (not shown) to various gas sources (not shown). The first electrode 16 is connected to an RF power source 36. A transfer plate (not shown) is typically provided to carry a substrate through a vacuum insulation door (not shown) into the deposition chamber 12 and onto the wafer base 18, and at the same time is removed from the deposition chamber 12 and coated. Of the substrate. In the operation of the deposition equipment 10, a substrate 3 8 series is first loaded on page 10. The paper size applies the Chinese National Standard (CNS) A4 specification (210 X 297 mm) 525228 A7 B7 V. Description of the invention (economic The Intellectual Property Bureau employee consumer cooperative printed the deposition chamber 12 and was accidentally placed on the crystallizer 18 by the transfer board (not shown). The substrate 38 is-size 'This size exceeds the lifting hole 28 of the crystal base 18 A commonly used size for a flat panel display device substrate is approximately 36 × multiplied by 465 colors. A crystal is positioned by moving & 20 to position on the lifting pin 26 'so that the lifting pin 26 and The husband M a F Λ top extends through the hole 28, and the crystal bases 18 and 38 are quite close to the first rain 4τ_ ^ brother 16. The electrode between the surface of the substrate and the release surface of the gas inlet manifold 16 The pitch or distance is between about 12 and about 50 °.-A better electrode pitch is between about 20 and about 36 mm. Before the deposition process of the present invention, it can be a large substrate 38 | According to known Technology to manage. After the initial processing of the preferred embodiment, The upper layer is deposited. At the beginning of the deposition process of the present invention, the deposition chamber 12 is first evacuated through the gas outlet 30. The patterned substrate is then positioned on the wafer base 18. The substrate 38 is held Between about 200i and 40th generation, when the amorphous silicon of the present invention is deposited thin. At the time of deposition, the preferred temperature range for the substrate is between about 300t to about 35 ° C. During deposition, the pressure between about 0.5 Torr and about 5 Torr is maintained in the reaction chamber, and a preferred pressure range is between about 5 Torr and about 2.5 Torr. The detailed processing of the equipment is included in the US Patent No. 5,399,387 of Lao et al., Which was assigned to the assignee of this case, and the case is incorporated as a reference. An enlarged cross-sectional view of a typical field emission display device 50. The device 50 is a glass substrate by depositing a resistive layer 52 of amorphous silicon as the main film (please read the precautions on the back before filling this page) ^ ---- ---- ^ --------- Page 11 W Zhang ruler—Zhong ⑵ 0 χ 297 public hair r 525228 A7 B7 V. Description of the invention ((Please read the note on the back first) And then fill in this page) 54. An insulator layer 56 and a metal closing layer 58 are then sequentially formed and etched to form metal microdots 60. A cathode structure 60 is covered by the resistive layer 52. Therefore A resistive but slightly conductive amorphous silicon layer 52 is on a highly insulating layer 56 such as Si02. It is important to be able to control the resistivity of the amorphous silicon layer 52 so that it does not form too much resistance, but it will act as a Limit the resistance to prevent excessive current from flowing when a micro-dot 60 is shorted to the metal layer 58. It should be noted that although a field emission display device is displayed to demonstrate the method of the present invention, the method is not limited to the manufacture of FEDs. Microfax can be used in the manufacture of any electronic device that requires the deposition of a layer of controlled resistivity. A series of tests were performed on test specimens prepared by the method of the present invention to print 'to show the reaction flow rate effect on the conductivity and the stress of the resulting film. The results are summarized in Tables 1 and 2. Example Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economy Example 1F 7F is used for the deposition of an essentially amorphous silicon thin film. The film does not contain a doping gas in the reaction gas mixture. The film is formed as a by-product of the mash and hydrogen reaction in the slurry on the heated substrate. The flow rate of crushing and burning is controlled at 1000 sccm 'and the flow rate of hydrogen is controlled at 1000 sccm, and the plasma power used (that is, the RF power supplied to the electrode 16) is 300 watts, and the pressure of krypton is maintained at 200 TOR The distance between the electrode and the electrode (that is, the distance between the electrode 16 and the crystal base 18) is maintained at 962 mils (2.44 cm). The crystal base which is heated by contact heating is maintained at a temperature of 4 丨 〇 Page 12 525228 Α7 Β7 Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs, the invention description (degrees, and the deposition rate obtained are 16.8 nanometers per minute. After the deposition process is completed, the obtained thin films are tested In order to produce the following physical characteristics, 8. Q X108 dyne compressive stress per square centimeter and resistivity of 2.0 xio9 ohm centimeters. Example 2 Example 2 illustrates a deposition process for doped p amorphous silicon, where a thin film is deposited on The flow of PZ3 gas, but there is no NZ3 gas. The flow rate of silane is 1000sccm, and the flow rate of PZ3 is 0.5Sccm, and oxygen is 1000sccm. 9 6 2 mils (2 · 44 cm), the crystal base temperature is 41 ° C and the deposition rate is completed at 156 nanometers per minute. Phosphine is a concentration of 5% in a hydrogen carrier gas, which is in the flow rate. The obtained amorphous silicon film has a compressive stress of 7 x109 dyne per square centimeter and a resistivity of 17 x 10 2 ohm centimeters. Example 3 In this example, 'only ammonia gas is used in the reaction gas mixture' without PH3 gas. The flow rate of the silane gas used is 1000 sccm 'The flow rate of NH3 is 50 SCCm, the flow rate of hydrogen is 1000 sccm, the RF power used is 300 watts, the chamber pressure system is maintained at 200 Torr, and the electrode spacing system is 962 mils (2.44 cm) with a crystal temperature of 41 ° (Γ (:, and a deposition rate of 135 nm per minute). The physical properties obtained for the film are far different from those obtained in Example 2. The film stress is at 7 4 χ 丨 〇9 per square page. The paper size is applicable to the Chinese National Standard (CNS) A4 specification (210 X 297 mm). C Please read the note on the back first? Matters before filling out this page) > ---------- Order -------- Printed by the Consumer Cooperative of Intellectual Property Bureau of the Ministry of Economic Affairs 525228 A7 __________B7 V. Description of the invention () Tension mode of cm dyne. The measured film resistivity has a high resistance value of 2 2 χ 丨 〇i 0 ohm cm. In this example, the doping gas of PH; And the nitrogen-containing system of Nh3 is used in the reaction gas mixture, and the flow rate ratio of PH3 to NH3 is 1.25 × 10-2 to 1. The flow rate of crushed mash is iooosccm, the flow rate of PH3 is 25 sccin, the flow rate of NH3 is 20 sccm, and the flow rate of H2 is 1 000 sccm. The RF power used was 600 watts, the chamber pressure was 2.0 Torr, the electrode spacing was 962 mils (2.44 cm), and the wafer temperature was 400 ° C, and a deposition rate of 1 97 nm per minute was obtained. An amorphous silicon film having a desired resistivity was obtained. The physical properties of the thin film were measured at a tensile stress of 4.0 × 10 dyne per square centimeter and a resistivity of 1.6 × 10 ohm centimeter. It should be noted that the resistivity value is about one and a half of the two limit values shown in Example 2 and Example 3, that is, between .7 X 102 and 2.2 X 1010. Example 5 In this example, both PH3 and NH3 gases were used in the reaction gas mixture. The flow rate ratio of PH3 to NH3 is 0.75 X 1 (T2 to 1. In this chemical vapor deposition process, the flow rate of silane is 1000 Seem, the flow rate of NH3 is 200 sccm, and the flow rate of PH3 is 1.5 sccm. The flow rate of H2 is 1000seem, the RF power used is 600 watts, the room pressure is maintained at 2.0 Torr, the distance between the electrodes is 962 mils (2.44 cm), and the temperature of the crystal holder is maintained at 4 0 0 ° C, and obtain the deposition rate of 197 nanometers per minute (please read the precautions on the back before filling in this page) > loading ------- --order --------- · P. U
525228 五、發明說明( A7 率。所取仔又膜之物理特性係於工·3 χ丨〇9達因每平方公分 I張應力及9·6Χ 1〇5歐姆公分之電阻率。可以看出藉由增 加PH;相對於ΝΗ3之流速,當相較於例子4時,膜之電阻 率係增加’及張應力係只略微增加。 例子6 於此例子中’ ΝΗ;及PH;之氣體係用於反應氣體混合 物中。ΡΗ3對ΝΗ;之流速比為15〇>< 10·2比!。於此化學 氣相沉積處理中,矽烷之流速係為l〇〇〇sccni,PA之涑速 為1.5sccm,NH3之流速為lOOsccm,H2之流速為 lOOOsccm,所使用之RF功率為6〇〇瓦,室壓係被保持於 2.0托耳’於電極間之間距係962密耳(2.44公分),晶座 溫度係被保持於400°C ’及取得每分240奈米之沉積速 率。所取得之膜特性具有4.7X109達因每平方公分之張废 力及3.6X105歐姆公分之電阻率。可以看出減少於反疯氣 體混合物中之氨含量時,相較於PH3之含量時,膜之電阻 率係降低,及張應力係只略微增加。 例子7 於此例子中,PH3及NH3氣體均被用於反應氣體混合 物中。PH3對NH3之流速比為〇.6 X 10·2比1。但可以相信 PH3 : NH3之流速比可以低至〇·1 X 1〇·2或0.001 : i可以被 使用。於此化學氣相沉積處理中,矽烷之流速係為 1000sccm,NH3之流速為 2〇〇sccm’PH3之流速為 i 5sccm, 第15頁 紙張尺度適用中國國家標準(CNS)A4 ϋ^1() χ 297公釐) (請先閱讀背面之注意事項再填寫本頁)525228 V. Description of the invention (A7 rate. The physical characteristics of the film obtained are based on the I · 3 stress per square centimeter I tensile stress and the resistivity of 9 · 6 × 105 ohm centimeter. It can be seen By increasing the flow rate of PH; relative to ΝΗ3, when compared to Example 4, the resistivity of the membrane increases and the tensile stress increases only slightly. Example 6 In this example, the ΝΗ; and PH; gas systems are used In the reaction gas mixture, the flow rate ratio of PZ3 to NZ; is 15 ° < 10.2 ratio! In this chemical vapor deposition process, the flow rate of silane is 1000 scccni, the speed of PA It is 1.5sccm, the flow rate of NH3 is 100sccm, the flow rate of H2 is 1000sccm, the RF power used is 600 watts, and the chamber pressure is maintained at 2.0 Torr. The distance between the electrodes is 962 mils (2.44 cm). The crystal base temperature is maintained at 400 ° C and a deposition rate of 240 nanometers per minute is obtained. The obtained film characteristics have a waste force of 4.7X109 dyne per square centimeter and a resistivity of 3.6X105 ohm centimeters. Yes It can be seen that when the ammonia content in the anti-mad gas mixture is reduced, compared to the PH3 content, the membrane The resistivity decreases and the tensile stress increases only slightly. Example 7 In this example, both PH3 and NH3 gases are used in the reaction gas mixture. The flow rate ratio of PH3 to NH3 is 0.6 × 10 · 2 to 1. However, it can be believed that the flow rate ratio of PH3: NH3 can be as low as 0.1 × 10.2 or 0.001: i. In this chemical vapor deposition process, the flow rate of silane is 1000 sccm, and the flow rate of NH3 is 2. 〇sccm'PH3 has a flow rate of i 5sccm. The paper size on page 15 applies Chinese National Standard (CNS) A4 ϋ ^ 1 () χ 297 mm) (Please read the precautions on the back before filling this page)
經濟部智慧財產局員工消費合作社印製 Α7 Β7Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs Α7 Β7
525228 五、發明說明() 2之流速為l〇〇〇sccjn,所使用之Rp Μ功率被降低為400 瓦’室壓係被保持於2.0托耳,於電核間之間距係962密 耳(2.44公分)’晶座溫度係被保持於4〇〇。(:,及取得每分 18〇奈米之沉積速率。所取得之膜之物理特性係於6·3χΐ〇9 達因每平方公分之張應力及7·0χι〇6歐姆公分之電阻率。 可以看出藉由增加Μ%之流速,當相較於例子6時,膜之 電阻率係大量增加,及張應力幾乎保持不變。 例子 8 於此例子中,PH;及ΝΗ3氣體均被用於反應氣體混合 物中Ρ Η3對Ν Η3之流速比為2 · 5 X 1 〇 -2比1。可以相信 ΡΗ3·ΝΗ3之流速比南至ιχι〇ι或〇·ι: 1時也可以使用。 於此化學氣相沉積處理中,矽烷之流速係為l〇〇〇sccm , NH3之流速為i00sccm,pH3之流速為2 5sccm,H2之流速 為lOOOsccm,所使用之rf功率為400瓦,室壓係被保持 於2.0托耳,於電極間之間距係962密耳(2.44公分),晶 座溫度係被保持於400°C,及取得每分190奈米之沉積速 率。所取得之膜之物理特性係於4 · 8 X 1 〇9達因每平方公分 之張應力及6.Οχιό4歐姆公分之電阻率。可以看出藉由增 加ΡΗ3之流速,當相較於例子7時,膜之電阻率係大量增 加,及張應力基本上保持不變。 例子9 於例子9中’ ρη3之摻雜氣體及氣體氮Ν2係被用於反 第16頁 本紙張尺度_ + _家鮮(CNS)A4規格(210 X 297公楚) (請先閱讀背面之注意事項再填寫本頁) _裝------- —訂---------· 經濟部智慧財產局員工消費合作社印製 525228 A7 B7 五、發明說明() 應氣體混合物中。碎:):完之流速係為1 〇 〇 〇 s c c m,P Η3之流速 為 2.5sccm,Ν2之流速為 I 500sccm, H2之流速為 lOOOsccm,所使用之RF功率為600瓦,室壓係被保持於 1.2托耳,於電極間之間距係962密耳(2.44公分),晶座 溫度係被保持於400 °C,及取得每分1 90奈米之沉積速 率。具有想要電阻率之非晶矽膜係被取得。膜之物理特性 係被:c仔於2.5xi〇9達因每平方公分之張應力及9.6χΐ〇5 歐姆公分之電阻率。可以想到,增加氮之淚度,增加了電 阻率但減少了導電率。 例子 10 於例子10中,PH3之摻雜氣體及氣體氮N2被使用於 反應氣體混合物中。矽烷之流速係為l 000sccm,PH3之流 速為 2.5sccm,N2之流速為500sccm,H2之流速為 1 5 00sccm,所使用之RF功率為600瓦,室壓係被保持於 1.2托耳’於電極間之間距係962密耳(2.44公分),晶座 溫度係被保持於400 °C,及取得每分194奈米之沉積速 率。一具有想要電阻率之非晶矽膜係被取得。膜之物理特 性係量測於1.1 X 1 〇9達因每平方公分之壓縮應力及8·2 X 1 02歐姆公分之電阻率。該資料係相符於由其他例子所取 得之結果。 所示之例子1至3之係由先前技藝所備製之比較例。 上述之例子4至丨〇係例示出本發明可能完成之優點。對 於例子1至10之資料係示於表1及2中。 第17頁 1本紙張尺度適用中國國豕彳*準(CNS)A4規格(21Q X 297公爱) " (請先閱讀背面之注意事項再填寫本頁) | ϋ H ϋ ϋ — ϋ n^-Γοτ _ ΜΜ MM ·· a··· SB·· I 雪 * 經濟部智慧財產局員工消費合作社印製 525228 A7 B7 五、發明說明() 表1 例子1 例子2 例子3 例子4 例子5 S1H4 (seem) 1000 1000 1000 1000 1000 PH3 (seem) -- 5.5 -- 2.5 1.5 NH3 (seem) —一 -- 500 200 200 PH3/PH (χΙΟ2) -- -- —— 1.25 0.75 Η2 (seem) 1000 1000 1000 1000 1000 功率(瓦) 300 300 300 600 600 壓力(托耳) 2.0 2.0 2.0 2.0 2.0 間距(密耳) 962 962 962 962 962 溫度(°C) 410 410 410 400 400 沉積速率 (奈米/分) 168 156 135 197 197 應力 (達因/平方公分) C8.0E8 C1.7E9 T7.4E9 T4.0E8 T1.3E9 電阻率 (歐姆-公分) 2.0E9 1.7E2 2.2E10 1.6E5 9.6E5 經濟部智慧財產局員工消費合作社印製 第18頁 (請先閱讀背面之注意事項再填寫本頁)525228 V. Description of the invention () 2 The flow rate is 1000 sccjn, the Rp M power used is reduced to 400 watts. The chamber pressure system is maintained at 2.0 Torr, and the distance between the electric cores is 962 mils ( 2.44 cm) The temperature of the crystal base was maintained at 400. (:, And obtain a deposition rate of 180 nanometers per minute. The physical properties of the obtained film are at a tensile stress of 6.3 x 109 dyne per square centimeter and a resistivity of 7.0 ohm x 6 cm. It can be seen that by increasing the flow rate of M%, the resistivity of the film increases substantially and the tensile stress remains almost unchanged when compared to Example 6. Example 8 In this example, both PH; and NH 3 gas are used for The flow rate ratio of P Η3 to Ν Η3 in the reaction gas mixture is 2.5 5 X 1 〇-2 to 1. It is believed that the flow rate of P Η3 · ΝΗ3 can be used when the flow rate is south to ιχιι or 〇: ι: 1. In the chemical vapor deposition process, the flow rate of silane is 1000 sccm, the flow rate of NH3 is 100 sccm, the flow rate of pH 3 is 25 sccm, the flow rate of H2 is 1000 sccm, the rf power used is 400 watts, and the chamber pressure is Maintained at 2.0 Torr, the distance between the electrodes was 962 mils (2.44 cm), the temperature of the crystal holder was maintained at 400 ° C, and a deposition rate of 190 nm per minute was obtained. The physical characteristics of the obtained film were Tensile stress per square centimeter at 4.8 X 1.09 ohms per square centimeter It can be seen that by increasing the flow rate of PZ3, when compared to Example 7, the resistivity of the film increases greatly, and the tensile stress remains substantially unchanged. Example 9 In Example 9, the doping gas of ρη3 and Gas nitrogen N2 series is used to reverse page 16 of this paper size _ + _ Jia Xian (CNS) A4 size (210 X 297 cm) (Please read the precautions on the back before filling this page) _Package ---- --- —Order --------- · Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs 525228 A7 B7 V. Description of the invention () Should be in a gas mixture. Broken :): The flow rate of the end is 1 〇 〇〇sccm, the flow rate of P2.53 is 2.5sccm, the flow rate of N2 is I 500sccm, the flow rate of H2 is 1000sccm, the RF power used is 600 watts, the room pressure system is maintained at 1.2 Torr, and the distance between the electrodes is At 962 mils (2.44 cm), the base temperature was maintained at 400 ° C and a deposition rate of 1 90 nm per minute was achieved. An amorphous silicon film having a desired resistivity is obtained. The physical characteristics of the film are: quilt at 2.5xi09 dyne tensile stress per square centimeter and resistivity of 9.6xΐ05 ohm centimeter. It is conceivable that increasing the tear level of nitrogen increases the resistivity but decreases the conductivity. Example 10 In Example 10, a doping gas of PH3 and a gas nitrogen N2 were used in a reaction gas mixture. The flow rate of silane is 1000 sccm, the flow rate of PH3 is 2.5 sccm, the flow rate of N2 is 500 sccm, the flow rate of H2 is 1 500 sccm, the RF power used is 600 watts, and the chamber pressure is maintained at 1.2 Torr at the electrode. The interval is 962 mils (2.44 cm), the crystal base temperature is maintained at 400 ° C, and a deposition rate of 194 nm per minute is obtained. An amorphous silicon film having a desired resistivity was obtained. The physical properties of the film were measured at 1.1 X 1.09 dyne per square centimeter compressive stress and 8 · 2 X 1 02 ohm centimeter resistivity. This information is consistent with the results obtained from other examples. The examples 1 to 3 shown are comparative examples prepared by the prior art. Examples 4 to 0 described above illustrate the advantages that the present invention may accomplish. The data for Examples 1 to 10 are shown in Tables 1 and 2. Page 17 1 This paper size applies to China's national standard * CNS A4 (21Q X 297 public love) " (Please read the precautions on the back before filling this page) | ϋ H ϋ ϋ — ϋ n ^ -Γοτ _ ΜΜ MM ·· a ··· SB ·· I Snow * Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs 525228 A7 B7 V. Description of the invention () Table 1 Example 1 Example 2 Example 3 Example 4 Example 5 S1H4 ( seem) 1000 1000 1000 1000 1000 PH3 (seem)-5.5-2.5 1.5 NH3 (seem)-one-500 200 200 PH3 / PH (χΙΟ2)---1.25 0.75 Η2 (seem) 1000 1000 1000 1000 1000 Power (W) 300 300 300 600 600 Pressure (Torr) 2.0 2.0 2.0 2.0 2.0 Pitch (mils) 962 962 962 962 962 Temperature (° C) 410 410 410 400 400 Deposition rate (nm / min) 168 156 135 197 197 Stress (Dyne / cm2) C8.0E8 C1.7E9 T7.4E9 T4.0E8 T1.3E9 Resistivity (ohm-cm) 2.0E9 1.7E2 2.2E10 1.6E5 9.6E5 Intellectual Property Bureau employee, Ministry of Economic Affairs Printed by Consumer Cooperatives, page 18 (Please read the notes on the back before filling this page)
本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公釐) 525228 A7 B7 五、發明說明() 表2 例子6 例子7 例子8 例子9 例子10 SiHU (seem) 1000 1000 1000 1000 1000 PH3 (seem) 1.5 1.5 2.5 2.5 1.5 NH3 (seem) 100 250 100 —— -- PH3/PH (χΙΟ2) 1.50 0.60 2.50 -- -- N2 (seem) -- -- -- 1500 500 H2 (seem) 1000 1000 1000 1000 1000 功率(瓦) 600 400 400 600 600 壓力(托耳) 2.0 2.0 2.0 1.2 1.2 間距(密耳) 962 962 962 962 962 溫度(°C) 400 400 400 400 400 沉積速率 240 180 190 190 194 (奈米/分) 應力 T4.7E9 T6.3E9 T4.8E9 T2.5E9 C1.1E9 (達因/平方公分) 電阻率 3.6E5 7.0E6 6.0E4 9.0E5 8.2E2 (歐姆-公分) (請先閱讀背面之注意事項再填寫本頁) 經濟部智慧財產局員工消費合作社印製 藉由混合PH3及NH3摻雜氣體在一起以各種容積比, 即對於NH3 : PH3範圍1 000 : 1至約10 : 1範圍中,一種 具有想要應力值及電阻值之非晶矽膜可以被取得。其被示 於第3圖中,藉由改變於反應氣體混合物中之膦含量,薄 膜之導電率可以被改變。例如,增加膦含量增加了膜之導 第19頁 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公釐) 525228 ^____ 經濟部智慧財產局員工消費合作社印製 A7 B7 發明說明() 電率’因為膦係為電子施體。同樣地,改變於反應氣體混 合物中之氮含量改變了取得之電阻率,因為氮造成了膜之 :緣特性。例如,藉由增加於反應氣體混合物中之氮含 f ’所取得之非晶矽膜之電阻率係被增加。本發明非晶矽 為王模之電阻率之想要範圍係於1Q3至約1G7歐姆公分之 間。該範圍係為表i中之資料所可取得的,其他實驗資料 出%阻率之杈佳範圍係於約1 05至約1 〇6歐姆公 分(間1此,藉由使用本發明《NH3及PH3反應氣體混 合物,一具有受控導電_及低應力晶碎為主膜係被形 成。 、 、於此膜中之應力層次係較佳被最小化。應力值應被保 持於低10達因/平方公分及於高1〇8達因/平方公分範圍 於第4圖所示,應力程度保持基本上不變,但pH〕: ΝΑ <流速率改變。於此所述之新穎方法完成了非晶矽膜 之應力類型之適當控制,同時,使得所得電阻率之可預測 選擇。 例子1至8使用氨作為含氮氣體。例子9及丨〇使用 氮氣N2作為含氮氣體及產生範圍於102至1〇4歐姆之可控 制電阻率。可以知道含氮氣體例如Να將產生類似結果。 吾人相信氮係被以達超出相關摻雜位準加以引入非晶矽 基底中。雖然增加半導體n型摻雜物p之濃度,來自 增加導電率(降低電阻率),但增加氮之濃度傾向於增加電 子把帶隙’當所得材料漸進地由非晶矽改變為氮化矽時。 較大能帶隙係相關於電阻率增加。因此,類似作用應藉由 第20頁 本紙張尺度適_標準(CNS)A4規格咖χ 297公爱) ------------裝--------訂---------線 (請先閱讀背面之注意事項再填寫本頁) 525228 A7 五、發明說明( 使用含碳或含氧氣體加以取得, ^ 孩等氣體使得材料變成本 絕緣:Π及介二二氧化…目關能帶隙係相關於所增 加之%且〃 0 員似作用應藉由使用含碳或含氧氣_ 加以取得,該含碳或含氧氣體使材料向半絕緣 及=This paper size applies Chinese National Standard (CNS) A4 (210 X 297 mm) 525228 A7 B7 V. Description of the invention (Table 2) Example 6 Example 7 Example 8 Example 9 Example 10 SiHU (seem) 1000 1000 1000 1000 1000 PH3 (seem) 1.5 1.5 2.5 2.5 1.5 NH3 (seem) 100 250 100 -----PH3 / PH (χΙΟ2) 1.50 0.60 2.50--N2 (seem)---1500 500 H2 (seem) 1000 1000 1000 1000 1000 Power (W) 600 400 400 600 600 Pressure (Torr) 2.0 2.0 2.0 1.2 1.2 Pitch (mil) 962 962 962 962 962 Temperature (° C) 400 400 400 400 400 Deposition rate 240 180 190 190 194 ( Nanometer / minute) Stress T4.7E9 T6.3E9 T4.8E9 T2.5E9 C1.1E9 (Dyne / cm2) Resistivity 3.6E5 7.0E6 6.0E4 9.0E5 8.2E2 (ohm-cm) (Please read the back first Please pay attention to this page, please fill out this page) Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs by mixing PH3 and NH3 doped gases together in various volume ratios, ie for the range of NH3: PH3 from 1 000: 1 to about 10: 1 In an amorphous silicon film with a desired stress and resistance value, Too. It is shown in Figure 3. By changing the content of phosphine in the reaction gas mixture, the conductivity of the film can be changed. For example, increasing the phosphine content increases the film guide. Page 19 The paper size applies the Chinese National Standard (CNS) A4 specification (210 X 297 mm) 525228 ^ ____ Printed by the Intellectual Property Bureau of the Ministry of Economic Affairs, Consumer Cooperatives A7 B7 Invention Description ( ) Electricity 'because phosphine is an electron donor. Similarly, changing the nitrogen content in the reaction gas mixture changes the resistivity obtained because nitrogen causes the edge characteristics of the film. For example, the resistivity of an amorphous silicon film obtained by increasing the nitrogen content f 'in the reaction gas mixture is increased. The desired range of resistivity of the amorphous silicon in the present invention is between 1Q3 and about 1G7 ohm centimeters. This range is available from the data in Table i. The best range of% resistivity for other experimental data ranges from about 105 to about 1.06 ohm centimeters (between 1 and 2, by using the present invention "NH3 and For PH3 reaction gas mixture, a film with controlled conductivity and low stress is formed as the main film system. The stress levels in this film are preferably minimized. The stress value should be kept as low as 10 dyne / The square centimeter and the high 108 dyne / cm2 range are shown in Figure 4. The degree of stress remains essentially the same, but the pH]: ΝΑ < Flow rate changes. The novel method described here completes the non- Appropriate control of the type of stress of the crystalline silicon film, and at the same time, allows predictable selection of the obtained resistivity. Examples 1 to 8 use ammonia as a nitrogen-containing gas. Examples 9 and 丨 use nitrogen N2 as a nitrogen-containing gas and produce a range of 102 to The controllable resistivity of 104 ohms. It can be known that nitrogen-containing gas such as Nα will produce similar results. I believe that nitrogen is introduced into the amorphous silicon substrate beyond the relevant doping level. Although the semiconductor n-type doping is increased The concentration of substance p comes from increasing Electrical conductivity (decreasing resistivity), but increasing the concentration of nitrogen tends to increase the electron's band gap when the resulting material gradually changes from amorphous silicon to silicon nitride. A larger energy band gap is related to an increase in resistivity. Therefore The similar effect should be adjusted by the paper on page 20 _Standard (CNS) A4 size coffee 297 public love) ------------ install -------- order-- ------- line (please read the notes on the back before filling this page) 525228 A7 V. Description of the invention (obtained by using carbon or oxygen-containing gas, ^ children and other gases make the material into this insulation: Π and Dioxin… The energy band gap of the mesh is related to the increase in% and the 似 0 member effect should be obtained by using carbon or oxygen containing _, which makes the material semi-insulating and =
電質二氧化矽趨近。 /及J 例如,一含碳揮發物(例如— 虱姐或軋怨物)可以於沉 積一非晶石夕為主膜時加以控制, 、 乂控制所沉積膜之導❿ 率。於一實施例中,甲烷((:114:)係&一 % ^ 含矽揮發物(例如 燒氣體)及摻雜揮發物(例# ph3氣體或B2H6氣體)加 入沉積室中’以形成非晶矽為主膜。> 於第5圖所亍-,〆 膦氣體被用以作為摻雜揮發物時,心積膜之電阻率隨; 甲燒之流速相對《氣體流速比(即當叫:叫流速比降 低)之增加而增加。因假設其他因素保持不變… 揮發物之加入沉積室中傾向於増加沉積膜之電阻率。 一實施例中,一含氮揮發物(例如卵3,比或比〇)可以被 與含碳揮發物(例如CHO及一摻雜揮發物(例如pH3或 B2H6)一起被引入沉積室中。於此實施例[含碳揮發物 及含氮揮發物作用以增加沉積膜之電阻率,及摻雜揮^物 作用以增加沉積膜之導電率。於這些實施例之中,非晶矽 為主膜可以藉由很多膜形成技術加以形成,包含化學氣相 沉積(CVD),電漿加強化學氣相沉積(pECVD)及物 沉積(PVD)技術。當膜係使用PVD加以形成時,含碳揮發 物可以藉由RF濺鍍一高純度碳化矽靶加以引入沉積室 中0 第21頁 (請先閱讀背面之注意事項再填寫本頁) -裝Electricity silicon dioxide approaches. / And J For example, a carbon-containing volatile matter (for example, lice or grudge) can be controlled when an amorphous stone is deposited as the main film, and the conductivity of the deposited film can be controlled. In an embodiment, methane ((: 114 :) series & one% ^ silicon-containing volatiles (such as burning gas) and doped volatiles (example # ph3 gas or B2H6 gas) are added to the deposition chamber to form a non- Crystal silicon is the main film. ≫ As shown in Figure 5, when the gadolinium phosphine gas is used as a doping volatile, the resistivity of the epicardial membrane varies with : Called the flow rate ratio to decrease) and increase. Assume that other factors remain unchanged ... Volatile substances are added to the deposition chamber and tend to increase the resistivity of the deposited film. In one embodiment, a nitrogen-containing volatile substance (eg, egg 3, Ratio or ratio 0) can be introduced into the deposition chamber together with carbon-containing volatiles (for example, CHO and a doped volatile (for example, pH 3 or B2H6). In this embodiment, Increasing the resistivity of the deposited film, and doping it to increase the conductivity of the deposited film. In these embodiments, the amorphous silicon-based film can be formed by many film formation techniques, including chemical vapor deposition (CVD), plasma enhanced chemical vapor deposition (pECVD) and sedimentation (PVD) technology. When the film is formed using PVD, carbon-containing volatiles can be introduced into the deposition chamber by RF sputtering with a high-purity silicon carbide target. 0 Page 21 (Please read the precautions on the back before filling in this (Page)-Pack
T ί I ϋ ^ y n 1 ·ϋ emmm ί ίβ I 經濟部智慧財產局員工消費合作社印製 525228. 五、發明說明( 經濟部智慧財產局員工消費合作社印製 上述例子顯示一且右γ ,、有fe圍為由1〇2至ι〇7歐姆公分之 可控制電阻率之非晶碎五 口人相信該可控制範園可以猎 由使用很有限量之滕而^ 膦而加以延伸至i〇iQ歐姆公分,特別是 例子3之重氨濃度。因 L 本發明提供一種可控制完成範 圍1 0至1 09歐姆公分雷 阻率 < 方法,該方法係不容易% 成於先前技藝中。 雖然,本發明已經以彳、 、、工以例不万式加以描述,應可以了解 的是於此所使用之名詞係 货' 說明 < 本質而不是限制。 再者本發明已經以較佳實施例方式加以描述,但可 以了解的熟習於此技藝者可以應用這些教導而導致本發 月之八他可把欠化。例如,於摻雜氣體間之體積比可以適 當地用以替換於例子中所示者。例子之掺雜氣體PH3提供 η 土摻雜。其他n型摻雜氣體可以用於本發明。$時,例 如B2H6 I p型摻雜氣體可以用於本發明。例子之氫氣體 係較NH3為少還原,因此主要作為—載氣體,雖然傳統係 使用氫以/儿積问品質非晶矽。其他較含氮氣體為少還原之 載氣可以R H2。此等載氣之例子是氬及氦。再者,即使 PECVD之處理係用以沉積諸層於場發射顯示裝置中,但其 他例如CVD之處理也可以用以沉積具有受控導電率之非 晶矽為主膜於其他半導體裝置中。 其他實施例係於申請專利範圍之範圍内。 第22頁 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公釐) (請先閱讀背面之注音?事項再填寫本頁) ----訂---------.T ί I ϋ yn 1 · ϋ emmm ί ί β I Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs 525228. V. Description of the Invention (Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs The above examples show one and the right. Fe is an amorphous shard with a resistivity of 10 to ohm ohm cm. Five people believe that the controllable range can be extended to i〇iQ by using a very limited amount of phosphate. Ohm centimeter, especially the heavy ammonia concentration of Example 3. Because the present invention provides a controllable completion range of 10 to 10 09 Ohm centimeters, the resistivity method is not easy to achieve in the prior art. Although, The present invention has been described by way of example, and it should be understood that the terms used herein are goods' description < essence but not limitation. Furthermore, the present invention has been described in terms of preferred embodiments. Describe, but it is understandable that a person skilled in the art can apply these teachings to cause the eighth of this month he can underestimate. For example, the volume ratio between the doping gas can be appropriately replaced as shown in the example The doping gas PH3 of the example provides η soil doping. Other n-type doping gases can be used in the present invention. For example, B2H6 I p-type doping gas can be used in the present invention. The hydrogen system of the example is less than NH3. Reduction, therefore, is mainly used as a carrier gas, although traditionally, hydrogen is used to produce amorphous silicon. Other carrier gases that are less reduced than nitrogen-containing gases can be R H2. Examples of such carrier gases are argon and helium. Furthermore, even though the PECVD process is used to deposit layers in field emission display devices, other processes such as CVD can also be used to deposit amorphous silicon with controlled conductivity as the main film in other semiconductor devices. The examples are within the scope of patent application. Page 22 This paper size applies the Chinese National Standard (CNS) A4 (210 X 297 mm) (Please read the note on the back? Matters before filling out this page) --- -Order ---------.
Claims (1)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US09/249,041 US6352910B1 (en) | 1995-07-11 | 1999-02-12 | Method of depositing amorphous silicon based films having controlled conductivity |
Publications (1)
Publication Number | Publication Date |
---|---|
TW525228B true TW525228B (en) | 2003-03-21 |
Family
ID=22941805
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
TW089102228A TW525228B (en) | 1999-02-12 | 2000-02-10 | Method of depositing amorphous silicon based films having controlled conductivity |
Country Status (4)
Country | Link |
---|---|
JP (1) | JP2000297372A (en) |
KR (1) | KR100588266B1 (en) |
SG (1) | SG79302A1 (en) |
TW (1) | TW525228B (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
TWI421950B (en) * | 2009-11-03 | 2014-01-01 | Applied Materials Inc | Thin film transistors having multiple doped silicon layers |
Family Cites Families (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
AU530905B2 (en) * | 1977-12-22 | 1983-08-04 | Canon Kabushiki Kaisha | Electrophotographic photosensitive member |
JPS5825281A (en) * | 1981-08-07 | 1983-02-15 | Semiconductor Energy Lab Co Ltd | Semiconductor device |
US4460416A (en) * | 1982-12-15 | 1984-07-17 | Burroughs Corporation | Method for fabricating in-situ doped polysilicon employing overdamped gradually increasing gas flow rates with constant flow rate ratio |
GB2199987A (en) * | 1986-12-22 | 1988-07-20 | Rca Corp | Doped polycrystalline silicon layers for semiconductor devices |
JPS63236370A (en) * | 1987-03-25 | 1988-10-03 | Toshiba Corp | Semiconductor device |
KR890005881A (en) * | 1987-09-29 | 1989-05-17 | 최근선 | Method for manufacturing thin film transistor of amorphous silicon |
JPH07142413A (en) * | 1993-09-22 | 1995-06-02 | Toray Ind Inc | Amorphous silicon film and deposition thereof |
US6352910B1 (en) * | 1995-07-11 | 2002-03-05 | Applied Komatsu Technology, Inc. | Method of depositing amorphous silicon based films having controlled conductivity |
US5902650A (en) * | 1995-07-11 | 1999-05-11 | Applied Komatsu Technology, Inc. | Method of depositing amorphous silicon based films having controlled conductivity |
-
2000
- 2000-02-10 TW TW089102228A patent/TW525228B/en not_active IP Right Cessation
- 2000-02-11 SG SG200000794A patent/SG79302A1/en unknown
- 2000-02-11 KR KR1020000006398A patent/KR100588266B1/en active IP Right Grant
- 2000-02-14 JP JP2000035340A patent/JP2000297372A/en active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
TWI421950B (en) * | 2009-11-03 | 2014-01-01 | Applied Materials Inc | Thin film transistors having multiple doped silicon layers |
Also Published As
Publication number | Publication date |
---|---|
KR100588266B1 (en) | 2006-06-13 |
JP2000297372A (en) | 2000-10-24 |
SG79302A1 (en) | 2001-03-20 |
KR20000058015A (en) | 2000-09-25 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US5902650A (en) | Method of depositing amorphous silicon based films having controlled conductivity | |
US7544625B2 (en) | Silicon oxide thin-films with embedded nanocrystalline silicon | |
JP5242009B2 (en) | Photovoltaic device using carbon nanowall | |
US6720037B2 (en) | Plasma processing method and apparatus | |
KR20120001640A (en) | Method for manufacturing microcrystalline semiconductor film and semiconductor device | |
US7521341B2 (en) | Method of direct deposition of polycrystalline silicon | |
US5479875A (en) | Formation of highly oriented diamond film | |
JPH08111531A (en) | Multi-stage chemical vapor deposition process for thin film transistor | |
JP5116961B2 (en) | Diode using carbon nanowall | |
US20020115269A1 (en) | Method of depositing amorphous silicon based films having controlled conductivity | |
US6352910B1 (en) | Method of depositing amorphous silicon based films having controlled conductivity | |
TW525228B (en) | Method of depositing amorphous silicon based films having controlled conductivity | |
JP4737672B2 (en) | Film-forming method by plasma CVD, electron emission source, field emission display and illumination lamp | |
US6593683B1 (en) | Cold cathode and methods for producing the same | |
KR100617482B1 (en) | METHOD FOR PRODUCING FIELD EMISSION DEVICES AND ZnO NANONEEDLES FOR FIELD EMISSION DEVICES AND ELECTRONIC DEVICES USING THE SAME | |
JPH09263948A (en) | Formation of thin film by using plasma, thin film producing apparatus, etching method and etching device | |
JP3295133B2 (en) | Manufacturing method of amorphous semiconductor | |
JP2001237446A (en) | Thin-film polycrystalline silicon, silicon-based photoelectric conversion element and its manufacturing method | |
JPH021365B2 (en) | ||
Chen et al. | Fabrication and characterization of phosphorus-doped diamond field emitters in triode-type field emission arrays | |
JP2001291882A (en) | Method of manufacturing thin film | |
TWI386512B (en) | Adhesion layer for thin film transistors | |
Gu et al. | The preparation of (001) textured diamond films with large areas | |
Otobe et al. | Preferential nucleation of nanocrystalline silicon along microsteps | |
KR100245098B1 (en) | Method of manufacturing nitrogen doped diamond |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
GD4A | Issue of patent certificate for granted invention patent | ||
MK4A | Expiration of patent term of an invention patent |