TW523839B - Electronic device and its manufacturing method - Google Patents

Electronic device and its manufacturing method Download PDF

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Publication number
TW523839B
TW523839B TW090119799A TW90119799A TW523839B TW 523839 B TW523839 B TW 523839B TW 090119799 A TW090119799 A TW 090119799A TW 90119799 A TW90119799 A TW 90119799A TW 523839 B TW523839 B TW 523839B
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TW
Taiwan
Prior art keywords
electronic
electronic component
electronic device
manufacturing
mentioned
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TW090119799A
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Chinese (zh)
Inventor
Shigeru Nakamura
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Hitachi Ltd
Hitachi Hokkai Semiconductor
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Publication of TW523839B publication Critical patent/TW523839B/en

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    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/341—Surface mounted components
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/60—Attaching or detaching leads or other conductive members, to be used for carrying current to or from the device in operation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/27—Manufacturing methods
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/27—Manufacturing methods
    • H01L2224/27001—Involving a temporary auxiliary member not forming part of the manufacturing apparatus, e.g. removable or sacrificial coating, film or substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001—Core members of the connector
    • H01L2224/45099—Material
    • H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45144—Gold (Au) as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73201—Location after the connecting process on the same surface
    • H01L2224/73203—Bump and layer connectors
    • H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8319—Arrangement of the layer connectors prior to mounting
    • H01L2224/83192—Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed only on another item or body to be connected to the semiconductor or solid-state body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/14—Integrated circuits
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/191—Disposition
    • H01L2924/19101—Disposition of discrete passive components
    • H01L2924/19105—Disposition of discrete passive components in a side-by-side arrangement on a common die mounting substrate
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10621—Components characterised by their electrical contacts
    • H05K2201/10636—Leadless chip, e.g. chip capacitor or resistor
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10621—Components characterised by their electrical contacts
    • H05K2201/10674—Flip chip
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/02—Details related to mechanical or acoustic processing, e.g. drilling, punching, cutting, using ultrasound
    • H05K2203/0278—Flat pressure, e.g. for connecting terminals with anisotropic conductive adhesive
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/328—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by welding
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/49126—Assembling bases
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/4913—Assembling to base an electrical component, e.g., capacitor, etc.
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/4913—Assembling to base an electrical component, e.g., capacitor, etc.
    • Y10T29/49131—Assembling to base an electrical component, e.g., capacitor, etc. by utilizing optical sighting device
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/4913—Assembling to base an electrical component, e.g., capacitor, etc.
    • Y10T29/49133—Assembling to base an electrical component, e.g., capacitor, etc. with component orienting
    • Y10T29/49137—Different components
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/4913—Assembling to base an electrical component, e.g., capacitor, etc.
    • Y10T29/49139—Assembling to base an electrical component, e.g., capacitor, etc. by inserting component lead or terminal into base aperture
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/4913—Assembling to base an electrical component, e.g., capacitor, etc.
    • Y10T29/49144—Assembling to base an electrical component, e.g., capacitor, etc. by metal fusion
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/49147—Assembling terminal to base
    • Y10T29/49149—Assembling terminal to base by metal fusion bonding

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  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)
  • Wire Bonding (AREA)

Abstract

Provided are a method of manufacturing an electronic device including a first electronic component mounted on one main surface of a wiring board by being thermo-compression bonded by means of a thermo-compression bonding tool with an adhesive resin interposed between a first area of the one main surface of the wiring board and the first electronic component, and a second electronic component mounted on a second area different from the first area of the one main surface of the wiring board by melting a soldering paste material and higher than the first electronic component in post-mounting height, and wherein the first electronic component is mounted before the mounting of the second electronic component.

Description

523839 A7 __ B7 _ 五、發明説明（1 ) 本發明係關於電子裝置及其製造方法，特別是關於， (請先閱讀背面之注意事項再填寫本頁) 應用在具有以不同安裝形態安裝於配線基板上之電子零件 之電子裝置，十分有效之技術。 -習知之電子裝置有稱作M C M ( Multi Chip Module )之 裝置。M C M係將內部設有積体電路之多數半導體晶片安 裝在配線基板上，構成一個完整之功能者。在此M C Μ， 爲了達成資料轉送之高速化或小型化，頻繁地採用倒裝片 (FUp-Chip)安裝技術，該項技術係使用電路形成面之電 極焊接點上形成有突起狀電極之半導體晶片（倒裝片-FUp-Chip)，將其安裝在配線基板上。 經濟部智慧时產笱3工消費合作社印製 倒裝片（FUp-Clnp)安裝技術有各種安裝方式之提案 ，並被實用化。其中之一是，接合用樹脂使用片狀之異方 導電性樹脂（ACF;Anisotropic Conductive Film)之 A C F 安 裝方式。A C F安裝方式係使用電路形成面之電極焊接點 上形成有突起狀電極，例如由金製成之突塊之半導體晶片 ，而在與配線基板之間夾有A C F樹脂之狀態，熱壓接半 導體晶片，將半導體晶片接合固定在配線基板，同時以電 氣方式連接配線基板之配線之連接部與半導體晶片之電極 焊接點之方式。異方導電性樹脂係在絕緣膜樹脂中分散混 進多數導電性粒子者。關於A C F安裝，在例如日本國特 開平 10-270496 (USP 6208525)有 記載。523839 A7 __ B7 _ V. Description of the invention (1) The present invention relates to electronic devices and their manufacturing methods, in particular, (please read the precautions on the back before filling this page). It is applied to wiring with different installation forms. An electronic device for electronic components on a substrate is a very effective technology. -Known electronic devices include devices called MC (Multi Chip Module). M C M mounts most semiconductor wafers with integrated circuits on the wiring substrate to form a complete function. In this MC, in order to achieve high speed or miniaturization of data transfer, FUp-Chip mounting technology is frequently used. This technology uses semiconductors with protruding electrodes formed on electrode pads on the circuit formation surface. Wafer (FUp-Chip), which is mounted on a wiring board. Printed by the Ministry of Economic Affairs, Wisdom, Time and Industry Cooperative Cooperative Fup-Clnp installation technology has various installation methods and has been put into practical use. One of them is an A C F mounting method using a sheet-like anisotropic conductive resin (ACF) for the bonding resin. The ACF mounting method uses a protruding electrode formed on an electrode solder joint of a circuit formation surface, such as a semiconductor wafer made of gold bumps, and the semiconductor wafer is thermally compression-bonded with an ACF resin sandwiched between the wiring substrate and the circuit board. A method of bonding and fixing a semiconductor wafer to a wiring substrate while electrically connecting a connection portion of a wiring of the wiring substrate and an electrode soldering point of the semiconductor wafer. The anisotropic conductive resin is one in which a large number of conductive particles are dispersed in an insulating film resin. The A C F installation is described in, for example, Japanese Patent Application Laid-Open No. 10-270496 (USP 6208525).

同時，除了ACF安裝方式外，另有接合用樹脂使用 片狀之非導電性樹脂（NCF;Non Conductive Film)之N C F 本紙張尺度適用中國國家標準（CNS ) A4規格（210X297公釐） -4 - 523839 A7 B7 五、發明説明（2 ) 安裝方式。接合用樹脂使用糊漿狀之異方導電性樹脂（ ACP;Anisotropic Conductive Paste)之 A C P 安裝方式。 (請先閱讀背面之注意事項再填寫本頁) 另一方面，安裝在配線基板之表面安裝型電子零件（ SMD:Surface Mount Device)則除了半導體晶片之外，有利 用焊接安裝之焊接式電子零件。此焊接式電子零件包括被 動零件及主動零件。焊接式被動零件有，例如晶片電容器 、晶片電阻器、晶片電感器等。焊接式主動零件有，例如 封裝半導體晶片之B G A ( Ball Grid Array )型、C S P ( Chip Size Package)型、Q F P ( Quad Flatpack Package) 型、Q F N ( Quad Flatpack. Non-Leaded Package)型等之半 導體裝置。 本發明人等已開發成功，將例如A C F安裝方式以熱 壓接方式安裝之半導體晶片（以下稱作壓接式I C ( Integrated Circuit)晶片），及焊接式電子零件混合裝載於 同一配線基板上之MCM。在開發此MCM時本發明人等 發現以下之問題點。 經濟部t慧时4¾¾工消費&汴社印製 (1 )焊接式電子零件有安裝後之高度（從配線基板 之一主面至最頂部之高度） 較壓接式I C晶片爲高者。如果將高度較高之焊接式 電子零件在壓接式IC晶片之前先安裝時，安裝壓接式 I C晶片時，壓接式I C晶片之熱壓接用工具（熱壓接頭 )很容易接觸到焊接式電子零件，因此需要將焊接式電子 零件與壓接式I C晶片之間隔加大，而成爲阻礙小型化之 要因。 本紙張尺度適用中國國家標準（CNS ) A4規格（210X297公釐） -5- 523839 A7 B7 五、發明説明（3 ) 同時，爲了提高生產性，希望一次熱壓接多數之壓接 式I C晶片時，熱壓接 用工具必須使用較壓接式I C晶片爲大者，若此熱壓 接用工具之範圍內有高度較高之焊接式電子零件，整批之 熱壓接很困難。 (2 )焊接式電子零件之考裝，係向配線基板之配線 之連接部供給焊錫糊漿材料（將多數焊錫粒子與助溶劑混 練之半固体狀之焊錫材料），然後，介由焊錫糊漿材料裝 設焊接式電子零件，使配線基板之配線之連接部與焊接式 電子零件之電極部成面對面。焊錫糊漿材料之供應，有屏 蔽（screen )印刷法或撒布（dispense )法。屏蔽印刷法係 將置於屏蔽罩（screenmask)上之焊錫糊漿材料，藉由擠 壓輥（squeeze)通過屏蔽罩之開口部轉印在基板表面之方 法。撒布法則是從細噴嘴吐出焊錫糊漿材料進行塗敷之方 法。 爲了提高M C Μ之生產性，可以整批供應之屏蔽印刷 法較適合，但如果在焊接式電子零件之前先安裝壓接式 I C晶片時，安裝焊接式電子零件時，以屏蔽印刷法要供 應焊錫糊漿材料便有困難。在已安裝之壓接式I C晶片之 部分，以避開這一部分方式，使用設有突出部之稱作壓紋 罩（embossed mask)，可以一次供應焊錫糊漿材料，這時 ，爲了能使擠壓輥順暢滑動，需要使壓紋罩之突出部之平 面尺寸較壓接式IC晶片之平面尺寸大，使成平滑之突出 形狀，因此不能在壓接式I C晶片之附近配置焊接式電子 本紙張尺度適用中國國家標準（CNS ) A4規格（210X297公釐） (請先閲讀背面之注意事項再填寫本頁) «丨 訂 -6 - 523839 Α7 Β7 五、發明説明（4 ) 零件，成爲阻礙MCM之小型化之主要原因。 (3 )被要求有高散熱性之MCM要選定散熱体。懕 接式I C晶片因面向其電路 形成面之背面外露，因此介由熱傳導片在壓接式I c 晶片之背面裝設散熱体，便可以獲得很高之散熱效果。然 而，有安裝後之高度較壓接式I C晶片高之焊接式電子零 件存在時，壓接式I C晶片之背面與熱傳導片之接觸會受 到焊接式電子零件之阻礙，M C Μ之散熱性會降低。 本發明之目的在提供，能夠提高電子裝置之生產性之 技術。 本發明之另一目的在提供，能夠達成電子裝置之小型 化之技術。 本發明之其他目的在提供，能夠提高電子裝置之散熱 性之技術。 本發明之上述及其他目的以及新穎之特徵，將可以從 本說明書之記述及附圖獲得進一步之瞭解。 簡單說明本案所揭示之發明中，具代表性者之槪要如 下。 (1 ) 一種電子裝置之製造方法，電子裝置具備有： 與配線基板之一主面之第1領域之間夾有接合用樹脂，以 熱壓接用工具加以熱壓接，藉此安裝在上述配線基板之一 主面上之第1電子零件；藉由溶融焊錫糊漿材料安裝在上 述配線基板之一主面之與第1領域不同之第2領域，且安 裝後之高度較上述第1電子零件局之第2電子零件；其特 本紙張尺度適用中國國家標準（CNS ) A4規格（210X297公釐） (請先閲讀背面之注意事項再填寫本頁) 訂 523839 A7 _ B7 五、發明説明（5 ) 徵在於， 安裝上述第2電子零件之前，先安裝上述第1電子零 件。 (2) 如上述（1)項之電子裝置之製造方法，其中 ，-.上述接合用樹脂係熱硬化性樹脂。 (3) 如上述（1)項之電子裝置之製造方法，其中 ，熱壓接上述第1電子零件時之上述熱壓接用工具之溫度 ，較上述焊錫之融點爲高。 (4) 如上述（1)項之電子裝置之製造方法，其中 ，上述第1電子零件係內部設有電路之主動零件，上述第 2電子零件係被動零件。 (5 ) —種電子裝置之製造方法，電子裝置具備有： 與配線基板之一主面之第1領域之間夾有接合用樹脂，以 熱壓接用工具加以熱壓接，藉此安裝在上述配線基板之一 主面上之第1電子零件；藉由溶融焊錫糊漿劑材料安裝在 上述配線基板之一主面之與第1領域不同之第2領域之第 2電子零件，其特徵在於， 在安裝上述第2電子零件之前，先安裝上述第1電子 零件。 (6) 如上述（5)項之電子裝置之製造方法，其中 ，上述焊錫糊黎材料之供應，係以屏蔽 (s c r e e η )印刷法爲 之。 (7) 如上述（5)項之電子裝置之製造方法，其中 ，上述第2電子零件之安裝後之高度，較上述第1電子零 本紙張尺度適用中國國家標準（CNS ) A4規格（210X297公釐） f請先閱讀背面之注意事項再填寫本頁，> -訂 -線·- ¾齊邹皆法工消費釜泎fi印製 -8- 523839 A7 B7 __ 五、發明説明（6 ) 件爲高。 (8) 如上述（5)項之電子裝置之製造方法，其中 ，上述第1電子零件係內部設有電路之主動零件，上述第 2電子零件係被動零件。 (9) 一種電子裝置，其特徵在於，具備有： 配線基板； 安裝在上述配線基板之一主面之第1領域之多數第1 電子零件； 安裝在上述配線基板之一主面之與第1領域不同之第 2領域，且從上述配線基板之一主面至最頂部之高度，較 上述第1安裝零件爲高之多數第2電子零件； 以及， 裝設在上述多數第1電子零件，上述多數第2電子零 件未裝設之熱傳導片。（10)如上述（9)項之電子裝 置，具備有，裝設於上述熱傳導片，且覆蓋上述 多數第1電子零件上及上述多數第2電子零件上之平 面形之散熱体。 茲參照附圖，詳細說明本發明之實施形態如下。 再者，在用以說明發明之實施形態之所有圖式，具有 同一功能者標示同一記號，省略重覆之說明。 第1圖係本發明實施形態1之M C Μ (電子裝置）之 模式平面圖，第2圖係第1圖之MCM之模式底面圖，第 3圖係裝配在第1圖之MCM之控制用晶片、緩衝器用晶 片及晶片電容器之安裝狀態之截面圖。再者，爲了使圖式 I紙張尺度適用中國國家標準（CNS ) Α4規格（210X297公釐） 一~ -9 - (請先閱讀背面之注意事項再填寫本頁) 訂 經濟部t慧时4笱員工消費合泎钍印製 523839 Α7 Β7 五、發明説明（7 ) 更容易瞭解，第3圖省略表示截面之斜線。 如第1圖及第2圖所示，本實施形態1之MCM (電 子裝置）1,在配線基板2之一主面2X上搭載有多數之 焊接式零件及壓接式I C晶片，在面向配線基板2之一主 面.2 X之背面（另一主面）2 Y，配置當做外部連接用端 子之多數球形狀之焊錫突塊2 2。壓接式I C .晶片使用內 δ受控制電路之1個半導體晶片（以下稱作，控制用晶片） 1 〇、內設 g己憶電路（例如 S D R A M: S y n c h r ο η 〇 u s D y n a m i c Random Access Memory )之4個半導體晶片（以下稱作，記 憶用晶片）1 2、內設緩衝器電路之5個半導體晶片（以 下稱作，緩衝器用晶片）1 4、內設N A N D電路之1個 半導體晶片（以下稱作，運算用晶片）1 6。此等壓接式 I C晶片係藉由例如A C F安裝方式安裝。焊接式電子零 件使用多數晶片電容器1 7、1 8及晶片電阻器1 9。此 等焊接式電子零件係藉焊錫回流法安裝。 焊錫突塊2 2係由例如鉛（P b )-錫（S η )組成 之焊錫材料形成。此焊錫突塊2 2係以電氣方式且以機械 方式連接在配置於配線基板2之背面2 Υ之電極焊接點。 控制用晶片1 0、記憶用晶片1 2、緩衝器用晶片 1 4及運算用晶片1 6之平面形狀係成方形狀。在本實施 形態，緩衝器用晶片1 4及記憶用晶片1 2係例如以長方 形狀形成，控制用晶片1 0及運算用晶片1 6則例如呈正 方形。 雖未限定，但控制用晶片1 0、記憶用晶片1 2、緩 本紙張尺度適用中國國家標準（CNS ) Α4規格（210Χ297公釐） (請先閲讀背面之注意事項再填寫本頁) 訂 線應 -10- 523839 A7 B7 五、發明説明（8 ) 衝器用晶片1 4及運算用晶片1 6之架構主要是具有，半 導體基板，在此半導體基板之電路形成面上分別堆疊多層 絕緣層、配線層之多層配線層、以覆蓋此多層配線層狀形 成之表面保護層（最終保護）。半導體基板係例如以單晶 矽形成，絕緣層係例如以氧化矽膜形成，配線層係例如以 鋁（A 1 )或鋁合金等之金屬膜形成。記憶用晶片1 2之 表面保護膜係例如以能夠提高記憶器之耐α線強度之聚醯胺 系之樹脂形成。控制用晶片1 0、緩衝器用晶片1 4及運 算用晶片1 6之表面保護膜係由例如以氧化矽或氮化矽等 之絕緣膜形成。 雖未詳細圖示，配線基板2係如第3圖所示，具有剛 性基板、以增長（build-up )法形成在此剛性基板上之柔軟 層、形成在此柔軟層上之絕緣膜5之架構。剛性基板及柔 軟層呈多層配線構造。剛性基板之各絕緣層係以例如將玻 璃纖維浸泡環氧系或聚醯胺系樹脂之高彈性樹脂板形成， 柔軟層之各絕緣層係以例如環氧系之低彈性樹脂形成，剛 性基板及柔軟層之各配線層係以例如銅（C u )之金屬膜 形成。此絕緣膜5係以例如環氧系之樹脂形成。此絕緣膜 5對焊接式電子零件（本實施形態係1 7、1 8、1 9 ) 控制安裝時之焊錫擴展，對壓接式電子零件（本實施形態 係10、12、14、16)確保與接合用樹脂之接合力 〇 在配線基板2之最上層之配線層，設有多數由形成在 此配線層之配線之一部分構成之連接部3及電極焊接點4 本纸張尺度適用中國國家標準（CNS ) A4規格（210X297公釐1 (請先閲讀背面之注意事項再填寫本頁)At the same time, in addition to the ACF installation method, other bonding resins use sheet-like non-conductive resins (NCF; Non Conductive Film). NCF This paper size applies to Chinese National Standard (CNS) A4 (210X297 mm) -4- 523839 A7 B7 V. Description of the invention (2) Installation method. The bonding resin uses the A C P mounting method of an anisotropic conductive resin (ACP). (Please read the precautions on the back before filling in this page.) On the other hand, surface mount electronic components (SMD: Surface Mount Device) mounted on wiring boards include soldered electronic components in addition to semiconductor wafers. . This soldered electronic part includes a driven part and an active part. Welded passive parts are, for example, chip capacitors, chip resistors, chip inductors, etc. Welding active parts include semiconductor devices such as BGA (Ball Grid Array), CSP (Chip Size Package), QFP (Quad Flatpack Package), and QFN (Quad Flatpack. Non-Leaded Package). . The present inventors have successfully developed, for example, a semiconductor wafer mounted in an ACF mounting method by a thermal compression bonding method (hereinafter referred to as a crimp-type IC (Integrated Circuit) chip) and a soldered electronic component are mixed and mounted on the same wiring substrate. MCM. When developing this MCM, the present inventors found the following problems. The Ministry of Economic Affairs and the Consumer Electronics & Printing Co., Ltd. (1) The height of the soldered electronic parts (the height from the main surface to the top of the wiring substrate) is higher than that of the crimped IC chip. If a soldered electronic component having a high height is mounted before the pressure-bonded IC chip, the heat-bonding tool (thermo-compression joint) of the pressure-bonded IC chip is easily accessible when the pressure-bonded IC chip is mounted. Electronic components, it is necessary to increase the distance between the soldered electronic components and the pressure-bonded IC chip, which has become a factor hindering miniaturization. This paper size applies Chinese National Standard (CNS) A4 specification (210X297 mm) -5- 523839 A7 B7 V. Description of the invention (3) At the same time, in order to improve productivity, it is desirable to thermocompression bond most IC chips The tool for thermocompression bonding must be larger than the IC chip for compression bonding. If the range of the tool for thermal compression bonding has a higher level of soldered electronic parts, the entire batch of thermal compression bonding is difficult. (2) The test installation of soldering electronic parts is to supply solder paste material (semi-solid solder material mixed with most solder particles and flux) to the connection part of the wiring board, and then pass the solder paste The material is equipped with solder-type electronic parts, so that the connection part of the wiring of the wiring substrate and the electrode part of the solder-type electronic parts face each other. The supply of solder paste materials can be screen printing or dispensing. The screen printing method is a method in which a solder paste material placed on a screen mask is transferred to a surface of a substrate through an opening of the screen by a squeezing roller. The spreading method is a method in which a solder paste material is ejected from a fine nozzle and applied. In order to improve the productivity of MC Μ, the shield printing method that can be supplied in batches is more suitable. However, if a crimp-type IC chip is installed before soldering electronic parts, and a solder printing method is used, solder paste must be supplied by shield printing method. Difficulties in pulp materials. In order to avoid this part of the mounted crimp-type IC chip, a so-called embossed mask provided with a protruding portion can be used to supply the solder paste material at one time. The smooth sliding of the roller requires that the planar size of the protruding portion of the embossed cover is larger than the planar size of the crimped IC chip, so that it has a smooth protruding shape. Therefore, it is not possible to arrange a soldered electronic paper sheet near the crimped IC chip. Applicable to China National Standard (CNS) A4 specification (210X297 mm) (Please read the precautions on the back before filling this page) «丨 -6-523839 Α7 Β7 V. Description of the invention (4) The parts have become a small obstacle to MCM The main reason for change. (3) The MCM that is required to have high heat dissipation performance should select a heat sink.懕 Since the back of the IC chip facing the circuit formation surface is exposed, a heat sink is installed on the back of the crimp IC chip through a heat conductive sheet, and a high heat dissipation effect can be obtained. However, when there are soldered electronic parts with a height higher than that of the crimped IC chip after installation, the contact between the back surface of the crimped IC chip and the heat conductive sheet will be hindered by the soldered electronic part, and the heat dissipation of the MC will be reduced . An object of the present invention is to provide a technology capable of improving the productivity of an electronic device. Another object of the present invention is to provide a technology capable of achieving miniaturization of an electronic device. Another object of the present invention is to provide a technology capable of improving heat dissipation of an electronic device. The above and other objects and novel features of the present invention will be further understood from the description of the present specification and the accompanying drawings. Briefly explain the representative of the invention disclosed in this case as follows. (1) A method for manufacturing an electronic device, the electronic device comprising: a resin for bonding is interposed between the first region of one of the main surfaces of the wiring substrate, and a thermocompression bonding tool is used for thermocompression bonding, thereby mounting on the above-mentioned The first electronic component on one of the main surfaces of the wiring substrate; the second area which is different from the first area on the one of the main surfaces of the above-mentioned wiring substrate is mounted with a molten solder paste material, and the height after installation is higher than that of the first electronic component. The second electronic part of the Parts Bureau; its special paper size applies to the Chinese National Standard (CNS) A4 specification (210X297 mm) (Please read the precautions on the back before filling this page) Order 523839 A7 _ B7 V. Description of the invention ( 5) The feature is that before the second electronic component is mounted, the first electronic component is mounted. (2) The method for manufacturing an electronic device according to the above item (1), wherein-. The bonding resin is a thermosetting resin. (3) The method for manufacturing an electronic device according to the above item (1), wherein the temperature of the tool for thermocompression bonding during the thermocompression bonding of the first electronic component is higher than the melting point of the solder. (4) The method for manufacturing an electronic device according to the above item (1), wherein the first electronic part is an active part provided with a circuit therein, and the second electronic part is a passive part. (5) A method for manufacturing an electronic device, the electronic device is provided with: a resin for bonding is sandwiched between the first region of one of the main surfaces of the wiring substrate, and a thermocompression bonding tool is used for thermal compression bonding, thereby mounting the The first electronic component on one of the main surfaces of the wiring substrate; and the second electronic component in a second field that is different from the first field and is mounted on one of the main surfaces of the wiring substrate by a molten solder paste material, which is characterized in that: Before installing the second electronic component, first install the first electronic component. (6) The method for manufacturing an electronic device according to the above item (5), wherein the supply of the solder paste material is based on a shield (s c r e e η) printing method. (7) The method for manufacturing an electronic device as described in (5) above, wherein the height of the second electronic part after installation is more than the first electronic part paper size of the Chinese National Standard (CNS) A4 specification (210X297). (Centi) f Please read the notes on the back before filling in this page, > -Order-line ·-¾ Qi Zoujie Legal Engineering Consumer Kettle 泎 fi printed -8- 523839 A7 B7 __ 5. Description of the invention (6) The item is high . (8) The method for manufacturing an electronic device according to the above item (5), wherein the first electronic part is an active part provided with a circuit therein, and the second electronic part is a passive part. (9) An electronic device, comprising: a wiring substrate; a plurality of first electronic components in a first field mounted on one of the main surfaces of the wiring substrate; and a first component mounted on one of the main surfaces of the wiring substrate. A second area in which the fields are different, and the height from one main surface to the top of the wiring board is higher than the first mounting part, and the second electronic part is higher than the first mounting part; and Most second electronic parts are not provided with a thermally conductive sheet. (10) The electronic device according to the item (9), which includes a planar heat sink mounted on the heat conductive sheet and covering the majority of the first electronic parts and the majority of the second electronic parts. Embodiments of the present invention are described in detail below with reference to the drawings. In addition, in all the drawings for explaining the embodiment of the invention, those having the same function are marked with the same symbol, and repeated descriptions are omitted. FIG. 1 is a plan view of a MC MM (electronic device) in Embodiment 1 of the present invention, FIG. 2 is a bottom view of the MCM in FIG. 1, and FIG. 3 is a control chip mounted on the MCM in FIG. 1. A cross-sectional view of the mounted state of a buffer wafer and a chip capacitor. Furthermore, in order to make the paper size of Schema I applicable to the Chinese National Standard (CNS) Α4 specification (210X297 mm) 1 ~ -9-(Please read the precautions on the back before filling out this page) Order the Ministry of Economic Affairs t 慧 时 4 笱Printed by the employee's consumption agreement 523839 Α7 Β7 V. Description of the invention (7) It is easier to understand. The oblique line showing the cross section is omitted in Figure 3. As shown in FIGS. 1 and 2, the MCM (electronic device) 1 of the first embodiment has a large number of soldered components and crimp-type IC chips mounted on one of the main surfaces 2X of the wiring substrate 2, and faces the wiring. One of the main surfaces of the substrate 2. 2 The back surface (the other main surface) 2 Y of the X is provided with a plurality of ball-shaped solder bumps 22 as terminals for external connection. Crimp type IC. The chip uses one semiconductor chip with δ controlled circuit (hereinafter referred to as the control chip) 1 〇 Built-in g memory circuit (for example, SDRAM: Synchr ο η 〇us D ynamic Random Access Memory ) 4 semiconductor wafers (hereinafter referred to as memory wafers) 1 2. 5 semiconductor wafers with built-in buffer circuits (hereinafter referred to as buffer wafers) 1 4. 1 semiconductor wafer with NAND circuits ( This is hereinafter referred to as a computing wafer). These crimp-type IC chips are mounted by, for example, A C F mounting method. Soldering electronic parts use most chip capacitors 17 and 18 and chip resistors 19. These soldered electronic parts are mounted by solder reflow. The solder bump 22 is formed of a solder material composed of, for example, lead (P b) -tin (S η). The solder bumps 22 are electrically and mechanically connected to electrode pads arranged on the back surface 2 of the wiring board 2. The planar shapes of the control wafer 10, the memory wafer 12, the buffer wafer 14 and the arithmetic wafer 16 are square. In this embodiment, the buffer wafer 14 and the memory wafer 12 are formed in a rectangular shape, for example, and the control wafer 10 and the calculation wafer 16 are, for example, rectangular. Although not limited, the control chip 10, the memory chip 1 2. The size of the paper is subject to the Chinese National Standard (CNS) A4 specification (210 × 297 mm) (Please read the precautions on the back before filling this page) Ying-10- 523839 A7 B7 V. Description of the invention (8) The structure of the chip 14 for punch and the chip 16 for operation mainly includes a semiconductor substrate, and a plurality of insulation layers and wirings are stacked on the circuit formation surface of the semiconductor substrate. Multilayer wiring layer, a surface protection layer (final protection) formed in a layered manner to cover this multilayer wiring. The semiconductor substrate is formed of, for example, single crystal silicon, the insulating layer is formed of, for example, a silicon oxide film, and the wiring layer is formed of, for example, a metal film such as aluminum (A 1) or an aluminum alloy. The surface protective film of the memory wafer 12 is formed of, for example, a polyamide-based resin capable of improving the α-line resistance of the memory. The surface protection films of the control wafer 10, the buffer wafer 14 and the operation wafer 16 are formed of an insulating film such as silicon oxide or silicon nitride. Although not shown in detail, as shown in FIG. 3, the wiring substrate 2 has a rigid substrate, a flexible layer formed on the rigid substrate by a build-up method, and an insulating film 5 formed on the flexible layer. Architecture. The rigid substrate and flexible layer have a multilayer wiring structure. Each of the insulating layers of the rigid substrate is formed of, for example, a highly elastic resin plate in which glass fibers are dipped in an epoxy-based or polyamide-based resin, and each of the insulating layers of the flexible layer is formed of, for example, an epoxy-based low-elastic resin. Each wiring layer of the flexible layer is formed of a metal film such as copper (Cu). This insulating film 5 is made of, for example, an epoxy-based resin. This insulating film 5 controls the solder expansion of the soldering type electronic parts (in this embodiment 17, 18, 19), and ensures the crimp type electronic parts (in this embodiment 10, 12, 14, 16). Bonding force with bonding resin. The wiring layer on the uppermost layer of the wiring board 2 is provided with a plurality of connection portions 3 and electrode pads 4 composed of a part of the wiring formed on this wiring layer. This paper standard applies Chinese national standards. (CNS) A4 specification (210X297mm1 (Please read the precautions on the back before filling this page)

•11- 523839 A7 __B7___ 五、發明説明（9 ) 。此等連接部3及電極焊接點4係由形成在絕緣膜5之開 口從配線基板2之一主面2 X露出。 在控制用晶片1 〇及緩衝器用晶片1 4，各晶片之相 互面對面之一主面及另一主面中之一主面之電路形成面（ l.OX、14X)，係如第3圖所示，形成有多數電極焊 接點（1 0 a、1 4 a )。各晶片之多數電極焊接點（ 1 0 a、1 4· a )係形成在各晶片之多層配線層中之最上 層之配線層，由形成在各晶片之表面保護膜之搭接開口， 從各晶片之電路形成面露出。雖未圖示，但記憶用晶片 1 2及運算用晶片1 6也與控制用晶片1 〇及緩衝器用晶 片1 4同樣，在各晶片之電路形成面形成有多數電極焊接 點。控制用晶片1 0之電極焊接點1 〇 a、緩衝器用晶片 1 4之電極焊接點1 4 a及運算用晶片1 6之電極焊接點 ,係以四邊電極焊接點排列方式配置，記憶用晶片1 2之 電極焊接點則以中央電極焊接點排列方式配置。 控制用晶片1 0及緩衝器用晶片1 4之電極焊接點上 ，以及，記憶用晶片1 2及運算用晶片1 6之電極焊接點 上，在安裝製程前之階段，預先形成有突起狀電極之例如 由Au構成之柱狀突塊11。柱狀突塊11使用例如au 線，以熱壓接倂用超音波振動之球搭接法形成。此球搭接 法係在A u線之前端形成球体，然後一面施加超音波振動 同時將球体熱壓接在晶片之電極焊接點，然後，從球体之 部分切斷Au線，以形成突塊之方法。因此，形成在電極 焊接點上之柱狀突塊可牢固連接在電極焊接點。 本纸張尺度適用中國國家標準（CNS ) A4規格（210X297公釐） (請先閲讀背面之注意事項再填寫本頁) 訂 線羞 經濟部智慧財產局員工消費合作社印製 •12- 523839 A7 B7_ _ 五、發明説明（10) 如第3圖所示，控制用晶片1 0係以其電路形成面 1 0 X面向配線基板2之一主面2 X之狀態安裝之。控制 用晶片1 0與配線基板2之間夾裝有接合用樹脂之例如異 方導電性樹脂2 0，藉由此異方導電性樹脂2 0將控制用 晶片1 0接合固定在配線基板2。 控制用晶片1 0之柱狀突塊1 1係通過形成在絕緣膜 5之開口，配置在控制用晶片1 0之電極焊接點1 0 a與 配線基板2之連接部3之間，以電氣方式連接雙方。此柱 狀突塊1 1係藉由夾裝於配線基板2與控制用晶片1 〇間 之異方導電性樹脂2 0之熱收縮力（從加熱狀態回到常溫 狀態時產生之收縮力）或熱硬化收縮力（熱硬化性樹脂硬 化時產生之收縮力），以及熱壓接用工具之壓接力等，壓 .接在配線基板2之連接部5 a。柱狀突塊1 1與配線基板 2之連接部5 a之間夾有混進異方導電性樹脂2 0之多數 導電性粒子中之一部分。再者，記憶用晶片1 2、緩衝器 用晶片1 4及運算用晶片1 6也與控制用晶片1 〇同樣$ 裝。 晶片電容器1 7之架構是以矩形狀形成，其兩端胃有* 電極部7 a。晶片電容器1 8及晶片電阻器1 9之架 與晶片電容器1 7相同。晶片電容器1 7、1 8及晶片電 阻器1 9係通過形成在絕緣膜5之開口，用焊錫2 1 & « 氣方式且以機械方式連接在配線基板2之電極焊接點4。 安裝後之各電子零件之高度（配線基板2之〜 X至最頂部之高度）如下。 ^氏張尺度適用中國國家標準（CNS ) A4規格（210X297公釐） ^-- -13- (請先閱讀背面之注意事項再填寫本頁) 、?τ 523839 A7 B7 五、發明説明（11) 控制用晶片1 0及記憶用晶片1 2之高度爲〇 · 4〔 mm〕左右，緩衝器用晶片1 4及運算用晶片1 6之高度 爲〇 · 28〔mm〕左右，晶片電容器17之高度爲 〇 · 85〔mm〕左右，晶片電容器18之高度爲〇 · 8 〔m m〕左右，晶片電阻器1 9之高度爲0 · 4 5 〔 m m 〕左右。 其次，再參照第4圖至第9圖，說明MCM1之製造 。第4圖至第7圖係說明MCΜ之製程用之模式截面圖， 第8圖至第9圖係說明M C Μ之製程用之模式平面圖。再 者，爲了使圖式較易瞭解，在第4圖至第7圖省略表示截 面之斜線。 本實施形態將說明安裝壓接式電子零件後，安裝焊接 式電子零件之安裝形態。 首先，準備壓接式電子零件（控制用晶片1 0、記憶 用晶片1 2、緩衝器用晶片1 4、運算用晶片1 6 )及焊 接式電子零件（晶片電容器1 7、1 8、晶片電阻器1 9 ),同時，準備第4圖（Α)所示之配線基板2。控制用 晶片1 0、記憶用晶片1 2、緩衝器用晶片1 4及運算用 晶片1 6之各電極焊接點上形成有柱狀突塊1 1。 其次，如第4圖（Β )所示，以黏貼用工具（黏貼用 頭）2 5將片狀之異方導電性樹脂2 Ο Α轉印到被覆用帶 子23至配線基板2之一主面之控制用晶片搭載領域，而 如第5圖（A)所示，在配線基板2之一主面2 X之控制 用晶片搭載領域配置異方導電性樹脂2 Ο A。異方導電性 本紙張尺度適用中國國家標準（CNS ) A4規格（210X297公釐） (請先閲讀背面之注意事項再填寫本頁) 訂 % 經濟部智慧財產苟員工消費合作Ti印焚 -14 - 523839 A7 B7 五、發明説明（12) 樹脂2 Ο A係使用例如在環氧系之熱硬化性樹脂混合多數 導電性粒子者。 其次，如第5圖（B )所示，在配線基板2之一主面 2 X之控制用晶片搭載領氣，介由異方導電性樹脂2 0 A 配置控制用晶片1 0。控制用晶片1 0係配置成使其電路 形成面1 Ο X與配線基板2之一主面2 X相對面。控制用 晶片1 0係藉由晶片搭載機之運送用筒夾從收容托盤運送 到配線基板2之一主面2 X之控制用晶片搭載領域。 其次，如第6圖（A )所示，以熱壓接用工具2 6 A 熱壓接控制用晶片1 0在配線基板2之連接部3連接柱狀 突塊1 1，然後，保持壓接狀態直到異方導電性樹脂 2 Ο A硬化。異方導電性樹脂2 Ο A會先溶融，然後硬化 。藉此，如第6圖（B )所示，由硬化之異方導電性樹脂 2 Ο A將控制用晶片1 0接合固定在配線基板2。控制用 晶片1 0之電極焊接點1 0 a被壓接在配線基板2之連接 部3,介由柱狀突塊11及混入異方導電性樹脂20之多 數導電性粒子中之一部分，以電氣方式連接在配線基板2 之連接部3。在此製程，晶片之熱壓接係在控制用晶片 1 0與熱壓接用工具2 6 A之間夾著聚四氟乙烯片2 4爲 之。 其次，以跟控制用晶片1 0同樣之方法將記憶用晶片 1 2安裝在配線基板2之一主面2 X之記憶用晶片搭載領 域，然後，以跟控制用晶片1 0同樣之方法將緩衝器用晶 片1 4安裝在配線基板2之一主面2 X之緩衝器用晶片搭 本紙張尺度適用中國國家標準（CNS ) A4規格（210X297公釐） (請先閱讀背面之注意事項再填寫本頁) -«丨 訂 -15- 523839 A7 B7 五、發明説明（ 載領域，然後，以跟控制用晶片1 0同樣之方法將運算用 晶片1 6安裝在配線基板2之一主面2 X之運算用晶片搭 載領域。藉此，如第8圖所示，在配線基板2之一主面 2 X搭載壓接式安裝零件。 . 在此，若在壓接式電子零件之前先安裝，安裝後之高 度較壓接式電子零件高之焊接式電子零件，熱壓接壓接式 電子零件之熱壓接用工具2 6 A容易接觸到已安裝之焊接 式零件，因此，有必要擴大焊接式電子零件與壓接式電子 零件之間隔，但如本實施形態，在焊接式電子零件之前安 裝壓接式電子零件，便可實質上排除熱壓接用工具2 6 A 接觸到焊接式電子零件之不妥，因此可以縮小焊接式電子 零件與壓接式電子零件之間隔。 同時，在本實施形態，異方導電性樹脂2 Ο A之硬化 係以1 8 0 ° C，2 0秒之條件下爲之。這時之加熱，係預 先使配線基板2之溫度成爲6 5 ° C，再以加熱到2 3 5 °C 之熱壓接用工具2 6 A爲之。同時，與上述之熱壓接製程 之條件比較，爲了進入提高生產性，而以2 0 0 ° C、1 〇 秒之條件進行異方導電性樹脂2 Ο A之硬化時，配線基板 2之溫度維持6 5°C，熱壓接用工具2 6 A之設定溫度必 須上昇到2 6 5 ° C。 熱壓接製程之處理溫度較採用作爲焊錫糊漿材料 2 1 A之焊錫之融點（例如1 8 3。C )高時，若在壓接式 電子零件之前先安裝焊接式電子零件，熱壓接製程之熱量 有時會使焊接式零件之焊錫溶融。尤其是採用可以覆蓋搭 本紙張尺度適用中國國家標準（CNS ) A4規格（210X297公釐） (請先閱讀背面之注意事項再填寫本頁)• 11- 523839 A7 __B7___ 5. Description of the invention (9). These connection portions 3 and electrode pads 4 are exposed from a main surface 2X of the wiring substrate 2 through openings formed in the insulating film 5. In the control wafer 10 and the buffer wafer 14, the circuit forming surfaces (l.OX, 14X) of one of the main surfaces and the other main surface of each of the wafers facing each other are as shown in FIG. 3 It is shown that most electrode welding points (1 0 a, 1 4 a) are formed. Most electrode solder joints (10a, 1 ·· a) of each wafer are the uppermost wiring layers formed in the multilayer wiring layers of each wafer, and are formed by overlapping openings of the surface protective film formed on each wafer from each The circuit formation surface of the wafer is exposed. Although not shown, the memory wafer 12 and the arithmetic wafer 16 also have a plurality of electrode solder joints formed on the circuit formation surface of each wafer in the same manner as the control wafer 10 and the buffer wafer 14. The electrode solder joints 10 of the control wafer 10, the electrode solder joints 14 of the buffer wafer 14 and the electrode solder joints of the computing wafer 16 are arranged in a four-sided electrode solder joint arrangement, and the memory wafer 1 is arranged. The electrode welding points of 2 are arranged in a central electrode welding point arrangement. Control electrodes 10 and bumper chips 14 have electrode solder joints, and memory wafers 12 and arithmetic wafers 16 have electrode bumps formed before the mounting process. For example, a columnar protrusion 11 made of Au. The columnar projections 11 are formed by, for example, an au wire and a thermocompression bonding method using an ultrasonic vibration ball bonding method. This ball overlap method is to form a sphere at the front end of the Au wire, and then apply ultrasonic vibration on one side while thermocompression bonding the sphere to the electrode welding point of the wafer, and then cut the Au wire from the part of the sphere to form a bump. method. Therefore, the columnar bump formed on the electrode welding point can be firmly connected to the electrode welding point. This paper size applies to China National Standard (CNS) A4 (210X297 mm) (Please read the precautions on the back before filling this page). Thread printed by the Intellectual Property Bureau of the Ministry of Economic Affairs, Consumer Cooperatives • 12- 523839 A7 B7_ _ V. Description of the invention (10) As shown in FIG. 3, the control wafer 10 is mounted with its circuit formation surface 10X facing one of the main surfaces 2X of the wiring substrate 2. Between the control wafer 10 and the wiring substrate 2, a bonding resin such as an anisotropic conductive resin 20 is interposed, and the control wafer 10 is bonded and fixed to the wiring substrate 2 by the anisotropic conductive resin 20. The columnar projections 11 of the control wafer 10 are formed through openings in the insulating film 5 and are disposed between the electrode solder joints 10a of the control wafer 10 and the connection portion 3 of the wiring substrate 2 and are electrically connected. Connect the two sides. This columnar projection 11 is the thermal contraction force (the contraction force generated when the heating state returns to the normal temperature state) of the anisotropic conductive resin 20 sandwiched between the wiring substrate 2 and the control wafer 10, or The thermosetting shrinkage force (the shrinkage force generated when the thermosetting resin is hardened), and the crimping force of the thermocompression tool are crimped to the connection portion 5 a of the wiring substrate 2. Between the columnar projection 11 and the connection portion 5a of the wiring substrate 2, a portion of most of the conductive particles mixed with the anisotropic conductive resin 20 is interposed. In addition, the memory wafer 1 2, the buffer wafer 14, and the arithmetic wafer 16 are also mounted in the same manner as the control wafer 10. The structure of the chip capacitor 17 is formed in a rectangular shape, and there are * electrode portions 7 a at both ends of the stomach. The chip capacitor 18 and the chip resistor 19 have the same frame as the chip capacitor 17. The chip capacitors 17 and 18 and the chip resistor 19 are connected to the electrode pads 4 of the wiring substrate 2 with solder 2 1 & «pneumatically and mechanically through openings formed in the insulating film 5. The height of each electronic component after mounting (the height of the wiring board 2 to X to the topmost) is as follows. ^ Zhang scale is applicable to China National Standard (CNS) A4 specification (210X297 mm) ^--13- (Please read the precautions on the back before filling this page),? Τ 523839 A7 B7 V. Description of the invention (11) The height of the control wafer 10 and the memory wafer 12 is about 0.4 [mm], the height of the buffer wafer 14 and the calculation wafer 16 is about 0.4 [mm], and the height of the chip capacitor 17 is The height of the chip capacitor 18 is about 0.8 [mm], and the height of the chip resistor 19 is about 0.4 [5]. Next, the manufacture of MCM1 will be described with reference to FIGS. 4 to 9 again. Figures 4 to 7 are schematic sectional views for explaining the process of MCM, and Figures 8 to 9 are plan views for explaining the pattern of M C M. In addition, in order to make the drawings easier to understand, the diagonal lines showing the cross sections are omitted in FIGS. 4 to 7. This embodiment will describe a mounting form of a soldered electronic part after a crimped electronic part is mounted. First, prepare crimp-type electronic parts (control wafer 10, memory wafer 1, 2, buffer wafer 14 and arithmetic wafer 16) and solder-type electronic parts (chip capacitors 17, 18, and chip resistors). 19)) At the same time, the wiring board 2 shown in FIG. 4 (A) is prepared. Columnar bumps 11 are formed at the welding points of the electrodes of the control wafer 10, the memory wafer 1, 2, the buffer wafer 14, and the arithmetic wafer 16. Next, as shown in FIG. 4 (B), the sheet-shaped anisotropic conductive resin 2 〇 Α is transferred to the main surface of the cover tape 23 to the wiring substrate 2 with an adhesive tool (adhesive head) 2 5. In the control wafer mounting area, as shown in FIG. 5 (A), an anisotropic conductive resin 2 0 A is arranged in the control wafer mounting area of one of the main surfaces 2 X of the wiring substrate 2. Alien conductivity This paper size applies the Chinese National Standard (CNS) A4 specification (210X297 mm) (Please read the precautions on the back before filling this page) Order% Intellectual Property of the Ministry of Economic Affairs Employee Consumption Cooperation Ti Yinan-14- 523839 A7 B7 V. Description of the invention (12) Resin 2 〇 A series uses epoxy-based thermosetting resin mixed with many conductive particles. Next, as shown in FIG. 5 (B), the control chip is equipped with a pilot gas on one of the main surfaces 2X of the wiring substrate 2, and the control chip 10 is arranged through the anisotropic conductive resin 2 0A. The control wafer 10 is arranged so that its circuit formation surface 10 × is opposite to one of the main surfaces 2 X of the wiring substrate 2. The control wafer 10 is a control wafer mounting area that is transported from a storage tray to a main surface 2 X of the wiring substrate 2 by a transport collet of a wafer mounting machine. Next, as shown in FIG. 6 (A), the thermocompression bonding tool 2 6 A is used for the thermocompression control wafer 10 to connect the columnar bumps 11 to the connection portion 3 of the wiring substrate 2 and then the compression bonding is maintained. The state is until the anisotropic conductive resin is cured. The anisotropic conductive resin 2 0 A will first melt and then harden. Thereby, as shown in FIG. 6 (B), the control wafer 10 is bonded and fixed to the wiring substrate 2 by the hardened anisotropic conductive resin 20A. The electrode welding point 10 a of the control wafer 10 is crimped to the connection portion 3 of the wiring substrate 2, and a part of most of the conductive particles mixed with the anisotropic conductive resin 20 via the columnar bumps 11 is electrically connected. It is connected to the connection part 3 of the wiring board 2 in a manner. In this process, the thermal compression bonding of the wafer is performed by sandwiching a polytetrafluoroethylene sheet 24 between the control wafer 10 and the thermal compression bonding tool 2 6 A. Next, the memory wafer 12 is mounted on one of the main surfaces 2 X of the wiring substrate 2 in the same way as the control wafer 10, and then the buffer wafer is buffered in the same manner as the control wafer 10. Chips for controllers 1 4 Installed on one of the main surfaces 2 of the wiring board 2 X For wafers for buffers The size of the paper is applicable to China National Standard (CNS) A4 (210X297 mm) (Please read the precautions on the back before filling this page) -«丨 -15-15 523839 A7 B7 V. Description of the invention (in the field, then, in the same way as the control wafer 10, the calculation wafer 16 is mounted on one of the main surfaces 2 X of the wiring substrate 2 for calculation Chip mounting field. As shown in FIG. 8, a crimp-type mounting component is mounted on one of the main surfaces 2 X of the wiring board 2. Here, if the crimp-type electronic component is mounted first, the height after mounting Welding electronic parts that are higher than crimping electronic parts, and thermocompression tools for thermocompression crimping electronic parts are easily accessible to the mounted welding parts. Therefore, it is necessary to expand Crimped electronic parts However, if the crimping type electronic component is installed before the soldering type electronic component in this embodiment, the fault that the thermal crimping tool 2 6 A touches the soldering type electronic component can be substantially eliminated, so that the soldering type can be reduced. The distance between the electronic part and the crimp-type electronic part. At the same time, in this embodiment, the hardening of the anisotropic conductive resin 2 0 A is performed under the condition of 180 ° C, 20 seconds. At this time, the heating, the The temperature of the wiring board 2 is set to 65 ° C in advance, and then the thermocompression tool 2 6A heated to 23.5 ° C is used. At the same time, compared with the conditions of the thermocompression process described above, in order to improve Productivity, when the anisotropic conductive resin 2 0 A is cured at 200 ° C and 10 seconds, the temperature of the wiring board 2 is maintained at 6 5 ° C, and the tool for thermocompression bonding is set at 2 6 A. The temperature must rise to 2 6 5 ° C. The processing temperature of the thermocompression bonding process is higher than the melting point (such as 1 8 3. C) of the solder used as the solder paste material 2 1 A. Before installing solder-type electronic parts, the heat of the thermal compression process sometimes caused Welding of soldered parts. Especially if it can cover the paper. The paper size is applicable to Chinese National Standard (CNS) A4 (210X297 mm) (Please read the precautions on the back before filling this page)

-16- 523839 A7 B7 五、發明説明（14) (請先閲讀背面之注意事項再填寫本頁) 載焊接式零件之領域大小之熱壓接用工具2 6 A時，焊接 式電子零件之安裝後之高度與壓接式電子零件之安裝後之 高度相同，或較低時，仍有使焊錫溶融，發生焊接式電子 零件之脫落等之不良事故。惟如本實施形態，若壓接式電 子零件較焊接電子零件先安裝時，便不會因熱壓接製程之 熱處理對焊接式電子零件產生不良影響，同時，完成硬化 之異方導電性樹脂2 0也不會因溶融焊錫糊漿材料2 1 A 之製程之熱量受到不良影響。如此，若壓接式電子零件較 焊接電子零件先安裝，便可以收到，例如大晶片之熱壓接 製程，或多數晶片之整批熱壓接製程均可採用之大型熱壓 接用工具2 6 A，也能夠共同採用於小晶片之熱壓接製程 之效果。 同時，爲了提高生產性，欲整批熱壓接多數壓接式電 子零件時，有需要使用較壓接式電子零件爲大之熱壓接頭 。這個時候，若壓接工具之範圍內有高度高之焊接式電子 零件，整批之熱壓接便很困難，但若在焊接電子零件之前 先安裝壓接式電子零件，便可以整批熱壓接多數壓接式電 子零件。 又如本實施形態，採用至少較壓接式電子零件爲大之 熱壓接用工具2 6 A時，爲了防止壓接式電子零件之周圍 溢出之異方導電性樹脂2 0污染到熱壓接用工具2 6 A， 可以在壓接式電子零件與熱壓接用工具2 6 A之間夾著聚 四氟乙烯片2 4。 然後，向配線基板2之一主面2X之各電極焊接點4 本纸張尺度適用中國國家標準（CNS ) A4規格（210X297公釐） -17- 523839 A7 B7 五、發明説明（15) (請先閲讀背面之注意事項再填寫本頁) 上供給焊錫糊漿材料2 1 A。焊錫糊漿材料2 1 a之供應 係如第7圖（A )所示，藉由從細噴嘴2 7吐出焊錫糊獎 材料材料2 1 A進行塗敷之撒布法。焊錫糊漿材料材料 2 1 A使用至少混練微小之焊錫粒子與助溶劑之焊錫糊獎 材料。本實施形態係使用混練例如3 7〔重量％〕p b _ 6 3〔重量％〕S η組成之焊錫粒之焊錫糊漿材料。再者 ，助溶劑含有松脂、活性劑及有機溶劑等。 其次，如第7圖（Β)所示，在配線基板2之一主面 2Χ之各電極焊接點4上，介由焊錫糊漿材料2 1Α，配 置晶片電容器1 7、1 8及晶片電阻器1 9，然後，施加 熱處理使焊錫糊漿材料2 1 Α溶融，如第3圖所示，以焊 錫2 1電氣方式且以機械方式連接配線基板2之電極焊接 點4與晶片電谷益17之電極17A，同時，與晶片電容 器1 7同樣，也以焊錫2 1電氣方式且以機械方式連接配 線基板2之電極焊接點4與晶片電容器18及晶片電阻器 19之電極。藉此，如第9圖所示，在配線基板2之一主 面2 X上搭載焊接式電子零件。 在溶融焊錫糊漿材料2 1 A之製程，焊錫糊漿材料 2 1 A所含之助溶劑之成分會污染焊接式電子零件之周邊 ，但由於在焊接式電子零件之前安裝壓接式電子零件，可 以防止連接壓接式電子零件之配線基板2之各連接部3被 助溶劑所污染。 如此，依據本實施形態時，可以·獲得下列效果。 (1 )因爲將安裝後之高度較壓接式電子零件高之焊 本紙張尺度適用中國國家標準（CNS ) A4規格（2ΐ〇χ297公釐） -18- 523839 A7 B7 五、發明説明（16) 接式電子 可以實質 零件之不 子零件之 同時 裝，例如 製程均可 用於小晶 生產性。 同時 此，可以 同時 具2 6 A 導電性樹 式電子零 2 4。其 同時 件，可以 部3被助 性。 (2 此，在安 極焊接點 接式電子 零件，在安裝壓接式電子零件之後再安裝。藉此 上排除，熱壓接用工具2 6 A接觸到焊接式電子 妥，因此，可以縮小焊接式電子零件與壓接式電 間隔。其結果，可以達成M C Μ 1之小型化。 ，由於將壓接式電子零件較焊接式電子零件先安 大晶片之熱壓接製程，或多數晶片之整批熱壓接 採用之大型熱壓接用工具2 6 A，也能夠共同採 片之熱壓接製程。其結果，可以提高MCM1之 ，由於可以 提高M C Μ ，採用至少 時，爲了防 脂2 0污染 件與熱壓接 結果，可以 ，由於在焊 防止連接壓 溶劑所污染 (請先閱讀背面之注意事項再填寫本頁} 整批熱壓接多數壓接式電子零件，因 1之生產性。 較壓接式電子零件爲大之熱壓接用工 止壓接式電子零件之周圍溢出之異方 到熱壓接用工具2 6 Α，可以在壓接 用工具2 6 Α之間夾著聚四氟乙烯片 提高MCM1之生產性。 接式電子零件之前安裝壓接式電子零 接式電子零件之配線基板2之各連接 。其結果，可以提高MCM1之生產 )焊錫糊漿材料材料2 1 A之塗敷採撒布法。藉 裝壓接式電子零件後，仍可以向配線基板2之電 4上供應焊錫糊漿材料21 A，因此，在安裝壓 零件後，仍可以安裝焊接式電子零件。 -19 523839 經濟部智慧时4笱員工消費^泎钍印製 Α7 Β7 五、發明説明（17) 而安裝壓接式電子零件後之焊錫糊漿材料2 1 A之供 應，可以藉利用壓紋罩之屏蔽印刷法，但這個時候要在壓 接式電子零件之附近（約5 m m以下）配置焊接式電子零 件便很困難。因此，要達成M C Μ 1之小型化，以撒布法 供·應焊錫糊漿材料較有利。另一方面，若要搭載多梢之 BGA型、CSP型、QFP型、QFN型等之半導體裝 置之焊接式電子零件，因爲需供應焊錫糊漿材料之處所有 很多處，以撒布法供應焊錫糊漿材料變成不利。安裝這種 多梢之半導體裝置時，以利用壓紋罩之屏蔽印刷法供應較 佳。 實施形態2說明在M C Μ之製造過程，於安裝焊接式 電子零件後，安裝壓接式電子零件之安裝形態。 第1 0圖至第1 5圖係說明本發明實施形態2之 MCM之製造用之截面圖。第1 6圖及第1 7圖係說明本 發明實施形態2之MCM之製造用之平面圖。再者，爲了 使圖式較易瞭解，在第1 〇圖至第1 5圖省略表示截面之 斜線。 首先，準備壓接式安裝零件（控制用晶片1 0、記憶 用晶片1 2、緩衝器用晶片1 4、運算用晶片1 6 )及焊 接式電子零件（晶片電容器1 7、1 8 ,晶片電阻器1 9 )，同時，準備第1 〇圖（Α)所示之配線基板2。控制 用晶片1 0、記憶用晶片1 2、緩衝器用晶片1 4及運算 用晶片1 6之各電極焊接點上形成有柱狀突塊1 1。 然後，在配線基板2之一主面2X上配置屏蔽罩28 本紙張尺度適用中國國家標準（CNS ) Α4規格（210Χ297公釐） (請先閲讀背面之注意事項再填寫本頁)-16- 523839 A7 B7 V. Description of the invention (14) (Please read the precautions on the back before filling in this page) The hot-pressing tool for soldering parts with the size of 2 6 A, the installation of soldering electronic parts The subsequent height is the same as the height of the crimped electronic parts after installation, or when it is low, there is still a bad accident such that the solder is melted and the soldered electronic parts fall off. However, according to this embodiment, if the crimped electronic part is installed before the soldered electronic part, the heat treatment of the thermal compression process will not adversely affect the soldered electronic part, and at the same time, the hardened anisotropic conductive resin 2 will be completed. 0 will not be adversely affected by the heat of the process of melting the solder paste material 2 1 A. In this way, if the crimp-type electronic parts are installed before the soldered electronic parts, they can be received, for example, a large-chip thermo-compression process, or a large-scale thermo-compression tool that can be used for the entire batch of thermo-compression processes of most wafers2 6 A can also be used together for the effect of the thermal compression bonding process of small chips. At the same time, in order to improve productivity, it is necessary to use thermocompression joints that are larger than the compression-type electronic parts when the entire batch of thermocompression-type electronic parts is to be thermocompression-bonded. At this time, if there is a high degree of soldered electronic parts within the range of the crimping tool, the thermal crimping of the entire batch will be difficult. Connect most crimp-type electronic parts. As in this embodiment, when using a thermocompression tool 2 6 A that is at least larger than the compression-type electronic parts, the conductive conductive resin 20 is prevented from being contaminated by the thermocompression bonding in order to prevent the surrounding of the compression-type electronic parts from overflowing. With the tool 2 6 A, a polytetrafluoroethylene sheet 2 4 can be sandwiched between the crimp-type electronic part and the thermocompression tool 2 6 A. Then, the electrode solder joints 4 on the main surface 2X of one of the wiring substrates 2 The paper size applies the Chinese National Standard (CNS) A4 specification (210X297 mm) -17- 523839 A7 B7 V. Description of the invention (15) (Please Read the precautions on the back before filling out this page) Supply 2 1 A of solder paste material. The supply of the solder paste material 2 1 a is a spraying method in which the solder paste material 2 1 A is ejected from the fine nozzle 27 as shown in FIG. 7 (A). Solder paste material 2 1 A A solder paste material that mixes at least tiny solder particles and a flux is used. In this embodiment, a solder paste material is used which kneads solder particles composed of, for example, 37 [wt%] p b _ 63 [wt%] S η. Furthermore, the co-solvent contains turpentine, an active agent, an organic solvent, and the like. Next, as shown in FIG. 7 (B), chip capacitors 17 and 18 and chip resistors are arranged on each electrode solder joint 4 of one main surface 2X of the wiring substrate 2 through a solder paste material 2 1A. 19 Then, heat treatment is applied to melt the solder paste material 2 1 Α. As shown in FIG. 3, the electrode 2 of the wiring substrate 2 is electrically and mechanically connected to the solder joint 4 of the wiring substrate 2 and the chip electric valley 17 as shown in FIG. 3. At the same time, the electrode 17A is electrically and mechanically connected to the electrode pad 4 of the wiring substrate 2 and the electrode of the chip capacitor 18 and the chip resistor 19 with solder 21 as with the chip capacitor 17. Thereby, as shown in Fig. 9, a solder-type electronic component is mounted on one of the main surfaces 2X of the wiring substrate 2. In the process of melting the solder paste material 2 1 A, the component of the co-solvent contained in the solder paste material 2 1 A will pollute the periphery of the soldered electronic parts, but because the crimped electronic parts are installed before the soldered electronic parts, It is possible to prevent each connection portion 3 of the wiring substrate 2 to which the crimp-type electronic component is connected from being contaminated with a co-solvent. As described above, according to this embodiment, the following effects can be obtained. (1) Because the height of the paper after installation is higher than that of the crimp-type electronic parts, the Chinese paper standard (CNS) A4 (2ΐ〇χ297 mm) is applicable -18- 523839 A7 B7 V. Description of the invention (16) Connection electronics can be installed at the same time as sub-components of physical parts, for example, the manufacturing process can be used for small crystal production. At the same time, it can have 2 6 A conductive tree type electronic zero 2 4 at the same time. At the same time, it can be assisted. (2 Therefore, in Anji soldering point-type electronic parts, install the crimp-type electronic parts before mounting. This eliminates the fact that the thermal crimping tool 2 6 A contacts the solder-type electronics properly, so the soldering can be reduced. Type electronic parts and crimping type electrical interval. As a result, the miniaturization of MC Μ 1 can be achieved. Since the crimping type electronic parts are larger than the soldering type electronic parts, the thermal compression bonding process of the wafer is large, or the integration of most wafers is completed. The large thermocompression tool 2 6 A used for batch thermocompression can also be used for the common thermocompression process. As a result, MCM1 can be improved. Since MC Μ can be improved, it is used at least when it is used to prevent grease 2 0 The result of contaminated parts and thermocompression can be contaminated by soldering to prevent the condensed solvent (please read the precautions on the back before filling out this page) The whole batch of thermocompression crimping electronic parts, because of the productivity. Compared with the crimping type electronic parts, the thermally crimping work stop crimping type electronic parts overflow the anomaly around the thermal crimping tool 2 6 Α, and can be sandwiched between the crimping tools 2 6 Α Fluorinated vinyl sheet improves MC Productivity of M1. Each connection of the wiring board 2 of the crimped electronic zero-connected electronic component is installed before the connected electronic component. As a result, the production of MCM1 can be improved) The coating material of the solder paste 2 1 A After the installation of the crimp-type electronic parts, the solder paste material 21 A can still be supplied to the electric board 4 of the wiring board 2. Therefore, after the crimp-type parts are installed, the solder-type electronic parts can still be installed. -19 523839 Ministry of Economy Wisdom 4 笱 Employee consumption ^ 泎 钍 Printed A7 B7 V. Description of the invention (17) The supply of solder paste material 2 1 A after the installation of crimp-type electronic parts can be achieved by the shield printing method using an embossed cover. However, at this time, it is difficult to arrange the soldered electronic parts near the crimped electronic parts (below about 5 mm). Therefore, to achieve the miniaturization of the MC Μ 1, it is more advantageous to spread and supply solder paste materials. On the other hand, if you want to mount multi-tip semiconductor devices such as BGA, CSP, QFP, QFN and other semiconductor devices, because there are many places where you need to supply solder paste materials, supply soldering by spraying method. The paste material becomes unfavorable. When mounting such a multi-terminal semiconductor device, it is better to supply it by the shield printing method using an embossed cover. Embodiment 2 describes the manufacturing process of the MC, after the soldering electronic parts are installed, the pressure is installed. Figures 10 to 15 are sectional views for explaining the manufacturing of MCM according to the second embodiment of the present invention. Figures 16 and 17 are views illustrating the second embodiment of the present invention. A plan view of the MCM manufacturing. In addition, in order to make the drawings easier to understand, the diagonal lines showing the cross sections are omitted in Figures 10 to 15. First, prepare the crimp-type mounting parts (control chip 10, memory Use wafer 1 2, buffer wafer 1 4, arithmetic wafer 16) and soldered electronic components (wafer capacitors 17, 18, and wafer resistor 19), and prepare the figure 10 (A) The wiring board 2. Columnar bumps 11 are formed on the welding points of the electrodes of the control wafer 10, the memory wafer 1, 2, the buffer wafer 14, and the arithmetic wafer 16. Then, a shielding cover 28 is arranged on one of the main surfaces 2X of the wiring substrate 2. The paper size is applicable to the Chinese National Standard (CNS) A4 specification (210 × 297 mm) (Please read the precautions on the back before filling this page)

-20- 523839 A7 _____Β7___ 五、發明説明（18) 。屏蔽罩2 8在面向配線基板2之各電極焊接點4之位胃 有開口 2 8 Α。 接著，在屏蔽罩2 8之一表面上塗敷半固体狀之 糊漿材料（糊狀焊錫）2 1 A。焊錫糊漿材料材料2 i A 係使用至少混練微小之焊錫粒子與助溶劑之焊錫糊漿材料 。本實施形態係使用混練例如3 7〔重量％〕P b - 6 S 〔重量％〕S η組成之焊錫粒子之焊錫糊漿材料。再者， 助溶劑含有松脂、活性劑及有機溶劑等。 其次，如第1 0圖（Β )所示，令擠壓輥2 9沿屏蔽 罩28之一表面滑動，在屏蔽罩28之開口28Α之內部 塡充焊錫糊漿材料21A，同時，去除多餘之焊錫糊漿材 料21A。擠壓輥29之滑動進行數次。此後，去除屏蔽 罩2 8，而如第1 1圖（A )所示，以屏蔽印刷法向配線 基板2之各電極焊接點4上供應焊錫糊漿材料2 1 A。如 此，以利用屏蔽印刷法向配線基板2之電極焊接點4上整 批供應焊錫糊漿材料2 1 A，較之以例如撒布法等對各個 電極焊接點4供應焊錫糊漿材料2 1 A ,對搭載多梢之 BGA型、CSP型、QFP型、QFN型等之半導體裝 置時有利。 其次，如第1 1圖（B )所示，在配線基板2之一主 面2 X之各電極焊接點4上，介由焊錫糊漿材料2 i a， 配置晶片電谷器1 7、1 8及晶片電阻器1 9 ,然後，施 加熱處理使焊錫糊漿材料2 1 Α溶融，如第1 2圖（A ) 所示，以焊錫2 1電氣方式且以機械方式連接配線基板2-20- 523839 A7 _____ Β7 ___ V. Description of Invention (18). The shield cover 2 8 has an opening 2 8 A in the stomach at a position facing each electrode pad 4 of the wiring board 2. Next, a semi-solid paste material (paste solder) 2 1 A is applied to one surface of the shield cover 28. The solder paste material 2 i A is a solder paste material that mixes at least minute solder particles and a flux. In this embodiment, a solder paste material is used which kneads solder particles composed of 37 [wt%] P b-6 S [wt%] S η. The co-solvent contains turpentine, an active agent, an organic solvent, and the like. Next, as shown in FIG. 10 (B), the squeezing roller 29 is slid along one surface of the shield cover 28, and the solder paste material 21A is filled inside the opening 28A of the shield cover 28, and at the same time, the excess is removed. Solder paste material 21A. The sliding of the squeeze roller 29 is performed several times. After that, the shield cover 28 is removed, and as shown in FIG. 11 (A), a solder paste material 2 1 A is supplied to each electrode pad 4 of the wiring substrate 2 by a shield printing method. In this way, the solder paste material 2 1 A is supplied in a batch to the electrode solder joints 4 of the wiring substrate 2 by using a shield printing method, as compared to supplying the solder paste material 2 1 A to each electrode solder joint 4 by, for example, a spreading method, This is advantageous when mounting multi-terminal semiconductor devices such as BGA, CSP, QFP, and QFN. Next, as shown in FIG. 11 (B), on each of the electrode solder joints 4 of one of the main surfaces 2 X of the wiring substrate 2, a wafer valleyr 17, 18 is disposed through a solder paste material 2 ia. And the chip resistor 19, and then heat treatment is applied to melt the solder paste material 2 1 A. As shown in FIG. 12 (A), the solder substrate 2 is electrically and mechanically connected to the wiring substrate 2

(請先閲讀背面之注意事項再填寫本頁J -訂(Please read the notes on the back before filling in this page J-Order

523839 A7 ______B7 _ 五、發明説明（19) 之電極焊接點4與晶片電容器1 7之電極1 7 A，同時， 與晶片電容器1 7同樣，也以焊錫2 1電氣方式且以機械 方式連接配線基板2之電極焊接點4與晶片電容器1 8及 晶片電阻器1 9之電極。藉此，如第1 6圖所示，在配線 基板2之一主面上搭載焊接式安裝零件。 其次，在搭載壓接式安裝零件之前，如第1 2圖（B )所示，以電漿P使配線基板2之連接部3淸淨（電漿淸 淨）。如此實施電漿淸淨，則可完全去除焊錫糊漿材料2 1 A之助溶劑成分造成之污染，防止柱狀突塊1 1與配線 基板2之各連接部3之接觸不良。 其次，如第1 3圖（A )所示，使用黏貼用工具從覆 蓋帶子（cover tape ) 2 3將片狀之異方導電性樹脂2 0A 轉印到配線基板2之一主面之控制用晶片搭載領域，如第 1 3圖（B )所示，將異方導電性樹脂2 0 A配置在配線 基板2之一主面2 X之控制用晶片搭載領域。異方導電性 樹脂2 0 A係使用例如在環氧系之熱硬化性樹脂混入多數 導電性粒子者。 其次，如第1 4圖（A)所示，在配線基板2之一主 面2 X之控制用晶片搭載領域，介由異方導電性樹脂 2 0 A配置控制用晶片1 0。控制用晶片1 0係配置成使 其電路影成面1 0X與配線基板2之一主面2X相對面。 控制用晶片1 0係藉由晶片搭載機之運送用筒夾從收容托 盤運送到配線基板2之一主面2 X之控制用晶片搭載領域 本紙張尺度適用中國國家標準（CNS ) A4規格（210X297公釐） (請先閲讀背面之注意事項再填寫本頁) f 訂 線赢 -22- 523839 A7 B7 五、發明説明（20) (請先閱讀背面之注意事項再填寫本頁) 其次，如第1 4圖（B)所示，以熱壓接用工具 2 6 B壓接控制用晶片1 〇，將柱狀突塊1 1連接在配線 基板2之連接部3，然後，保持壓接狀態直到異方導電性 樹脂2 0 A硬化。異方導電性樹脂2 0 A會先溶融，然後 硬化。藉此，如第1 5圖所示，由硬化之異方導電性樹脂 2 0 A將控制用晶片1 0接合固定在配線基板2。控制用 晶片1 0之電極焊接點1 0 a被壓接在配線基板2之連接 部3 ,介由柱狀突塊1 1及混入異方導電性樹脂2 0之多 數導電性粒子中之一部分，以電氣方式連接在配線基板2 之連接部3。 其次，以跟控制用晶片1 0同樣之方法將記憶用晶片 1 2安裝在配線基板2之一主面之記憶用晶片搭載領域， 然後，以跟控制用晶片1 0同樣之方法將緩衝器用晶片 1 4安裝在配線基板2之一主面2 X之緩衝器用晶片搭載 領域，然後，以跟控制用晶片1 0同樣之方法將運算用晶 片1 6安裝在配線基板2之一主面2 X之運算用晶片搭載 領域。藉此，如第1 5圖及第1 7圖所示，在配線基板2 之一主面2 X搭載壓接式安裝零件。 在壓接式電子零件之前先安裝焊接式電子零件時，熱 壓接用工具2 6 B必須採用不會干擾到焊接式電子零件之 小型工具。同時，尤其是使用熱壓接用工具2 6 B之工具 頭面較熱壓接之壓接式電子零件小之工具，便可以防止溢 出壓接式電子零件周圍之異方導電性樹脂2 0污染熱壓接 用工具2 6 B。 本紙張尺度適用中國國家標準（CNS ) Α4規格（210Χ297公釐） -23- 523839 A7 B7 五、發明説明（21) 而且，在熱壓接用工具26B之工具頭面較熱壓接之 壓接式電子零件小時，因爲要以熱壓接用工具26B之工 具頭面覆蓋所有之柱狀突塊之上部，在平面上之配置，使 熱壓接用工具26B之工具頭面之周邊，位於柱狀突塊與 壓接式電子零件之周邊之間，藉此可以將熱壓接用工具 2 6 B所加之熱或壓力平均加在所有之柱狀突塊。 如此，依據本實施形態時，可以獲得下列效果。 (1 )在安裝壓接式電子零件之前先安裝焊接式電子 零件，可以藉一般之屏蔽印刷法供應焊錫糊漿材料2 1 A ，因此，較之使用壓紋罩之屏蔽印刷法供應焊錫糊漿材料 2 1 A時，可以達成M C Μ之小型化，較之以撒布法供應 焊錫糊漿材料21Α時，可以提高MCM之生產性。 (2 )在安裝壓接式電子零件之前先安裝焊接式電子 零件之實施形態，由於使用熱壓接用工具2 6 B之工具頭 面較熱壓接之壓接式電子零件小之工具，因此可以防止溢 出壓接式電子零件周圍之異方導電性樹脂2 0污染熱壓接 用工具2 6 B。其結果，可以提筒MCM之生產性。 (3 )在安裝壓接式電子零件之前先安裝焊接式電子 零件之實施形態，若使熱壓接用工具26B之工具頭面之 周邊，位於柱狀突塊與壓接式電子零件之周邊之間，藉此 ，便可以將熱壓接用工具2 6 B所加之熱或壓力平均加在 所有之柱狀突塊。 (4 )在搭載壓接式安裝零件之前，若進行電漿淸淨 ，則可以使焊錫糊漿材料2 1 A之助溶劑等所污染之配線 本紙張尺度適用中國國家標準（CNS ) Α4規格（210Χ297公釐） (請先閲讀背面之注意事項再填寫本頁) 、τ - 24- 523839 A7 ____B7_ 五、發明説明（22) (請先閲讀背面之注意事項再填寫本頁) 基板2之各連接部3淸淨，抑制壓接式安裝零件與配線基 板2之各連接部3之接觸不良。其結果，可以提高MCM 之生產量。 (5 )由於熱壓接用工具使用較熱壓接之壓接式電子 零件小之工具，可以迴避已安裝之焊接式電子零件與熱壓 接用工具頭之接觸。 再者，實施形態1及2係以使用柱狀突塊之例子，說 明形成在半導體晶片之電極焊接點上之突起狀電極，但不 限定如此，也可以使用例如P b · - S η組成之焊錫突塊。 但應使用融點較安裝焊接式電子零件時之焊錫溶融溫度， 及安裝壓接式電子零件時之熱壓接溫度高之材料形成之焊 錫突塊。 同時，實施形態1及2係以預先將介於壓接式電子零 件之電極焊接點與配線基板之連接部之間之突起狀電極， 形成在壓接式電子零件之電極焊接點上之例子進行說明， 但突起狀電極也可以形成在配線基板之連接部上。 經齊部皙慧財4笱員工消費合作钍印製 同時，實施形態1及2係以將壓接式電子零件接合固 定在配線基板之接合用樹脂，使用片狀之異方導電性樹脂 之例子進行說明，但不限定如此，也可以使用例如糊漿狀 之異方導電性樹脂（A C Ρ )或片狀之非導電性樹脂（ N C F )。 實施形態3說明裝設散熱体之M C Μ。 第1 8圖係說明本發明實施形態3之M C Μ之槪略架 構之截面圖，第1 9圖及第2 0圖係第1 8圖之MCM之 本紙張尺度適用中國國家標準（CNS ) Α4規格（210X297公釐） -25- 523839 A7 ____ B7 ___ 五、發明説明（23) 展開圖。再者，爲了使圖式較易瞭解，在第18圖省略表 示截面之斜線。 (請先閲讀背面之注意事項再填寫本頁) 如第1 8圖至第2 0圖所示，本實施形態之M C Μ具 有熱傳導片3 0及散熱体3 1。熱傳導片3 0係由例如具 彈性之矽橡膠形成，散熱体3 1係由例如鋁所製成之平面 板形成。 熱傳導片30接觸在壓接式電子零件之背面上，以不 接觸到晶片電容器1 7及1 8之方式形成圖案。將這種形 狀之熱傳導片30裝設在壓接式電子零件之背面上，在此 熱傳導片3 0裝設散熱体3 1，便可以藉熱傳導片3 0之 厚度補償壓接式電子零件與晶片電容器1 7、1 8之高低 差，因此，如第21圖所示，壓接式電子零件與熱傳導片 .3 0之接觸不會受到高度較高之晶片電容器1 7、1 8所 妨礙。其結果，可以有效將壓接式電子零件動作時產生之 熱量傳至熱傳導片3 0，而提高MCM之散熱性。 經濟部智慧时產笱資工消費合itfi印製 同時，由於形成可覆蓋多數壓接式電子零件上及多數 焊接式電子零件上，且平面尺寸較熱傳導片3 0大之散熱 .体3 1，使散熱体3 1之面積增加，因此可以進一步提高 M C Μ之散熱性。 而且，因熱傳導片3 0具有可以接觸到晶片電阻器 1 9 Α之形狀。這是因爲晶片電阻器1 9 Α兩側之控制用 晶片1 0及記憶用晶片1 2之高度是0 · 4〔 m m〕，晶 片電阻器19A之高度是〇 · 45〔mm〕，其商低差可 以藉由熱傳導片3 0之變形加以吸收之故。如此，將焊接 本紙張尺度適用中國國家標準（CNS ) A4規格（210X297公釐） -26- 523839 A7 B7 五、發明説明（24) 式電子零件中之安裝後之高度較低者選擇性配置在熱傳導 片3 0之黏貼領域內，壓接式電子零件間之領域也可以有 效活用，可以進一步將M C Μ小型化。 以上，依據上述實施形態具体說明本發明人等所完成 之發明，但本發明並不限定如上述實施形態，當然可以在 不脫離其主旨之範圍內作各種變更。 茲簡單說明，從本案所揭示之發明中具代表性者獲得 之效果如下。 依據本發明時，可以提高電子裝置之生產性。 依據本發明時，可以達成電子裝置之小型化。 依據本發明時，可以提高電子裝置之散熱性。 圖式之簡單說明 第1圖係本發明實施形態1之M C Μ (電子裝置）之 模式平面圖。 第2圖係第1圖之MCM之模式底面圖。 第3圖係裝配在第1圖之M C Μ之控制用晶片、緩衝 器用晶片及晶片電容器之安裝狀態之截面圖。 第4圖係說明本發明實施形態1之M C Μ之製造用之 截面圖。 第5圖係說明本發明實施形態1之M C Μ之製造用之 截面圖。 第6圖係說明本發明實施形態1之M C Μ之製造用之 截面圖。 本紙張尺度適用中國國家標準（CNS ) Α4規格（210Χ297公釐） (請先閱讀背面之注意事項再填寫本頁) 訂 -27- 523839 A7 _________B7___ 五、發明説明（2δ) 第7圖係說明本發明實施形態1之M C Μ之製造用之 截面圖。 第8圖係說明本發明實施形態1之M C Μ之製造用之 平面圖。 第9圖係說明本發明實施形態1之M C Μ之製造用之 平面圖。 第1 0圖係說明本發明實施形態2之M C Μ之製造用 之截面圖。 第1 1圖係說明本發明實施形態2之M C Μ之製造用 之截面圖。 第1 2圖係說明本發明實施形態2之M C Μ之製造用 之截面圖。 第1 3圖係說明本發明實施形態2之M C Μ之製造用 之截面圖。 第1 4圖係說明本發明實施形態2之M C Μ之製造用 之截面圖。 第1 5圖係說明本發明實施形態2之M C Μ之製造用 之截面圖。 第1 6圖係說明本發明實施形態2之M C Μ之製造用 之平面圖。 第1 7圖係說明本發明實施形態2之M C Μ之製造用 之平面圖。 第1 8圖係表示本發明實施形態3之M C Μ之槪略架 構之截面圖。 本紙張尺度適用中國國家標準（CNS ) Α4規格（210Χ297公釐） (請先閲讀背面之注意事項再填寫本頁) 訂 線秦 -28- 523839 A7 B7 五、發明説明（26) 第1 9圖係第1 8圖之MCM之展開圖。 第2 0圖係第1 8圖之MCM之展開圖。 第2 1圖係不應用本發明時之MCM之截面圖。 主要元件對照表 1 M C Μ 2 配線基板線基板 3 連接部續部 4 電極焊接點極 5 絕緣膜緣膜 10 控制用晶片御用 1〇Α 電極焊接點極 11 柱狀突塊 12 記憶用晶片 14 緩衝器用晶片 16 運算用晶片算用 1 7、1 8 晶片電容器 1 9、1 9 A 晶片電阻器 2 0、2 0 A 異方導電性樹脂方導電性樹脂 2 1 焊錫 2 1 A 焊錫糊漿材料 2 2 焊錫突塊 23 覆蓋用帶子 25 黏貼用工具 本紙張尺度適用中國國家標準（CNS ) A4規格（210X297公釐） (請先閱讀背面之注意事項再填寫本頁) f 訂 線爲 -29 - 523839 A 7 B7 五、發明説明（27) 2 6 A > 2 6 B 熱壓接用工具壓著用 2 7 噴嘴 (請先閱讀背面之注意事項再填寫本頁) 2 8 屏蔽罩 2 9 擠壓輥 30 熱傳導片傳導 31 散熱体熱体 本纸張尺度適用中國國家標準（CNS ) A4規格（210X 297公釐） -30-523839 A7 ______B7 _ V. Description of the invention (19) The electrode solder joints 4 and the chip capacitors 17 are the electrodes 1 7 A. At the same time, the chip capacitors 17 are also soldered 2 1 electrically and mechanically to the wiring substrate. The electrode pads 2 of 2 are the electrodes of chip capacitor 18 and chip resistor 19. Thereby, as shown in FIG. 16, a solder-type mounting component is mounted on one main surface of the wiring substrate 2. Next, before mounting the crimp-type mounting parts, as shown in FIG. 12 (B), the connection portion 3 of the wiring board 2 is cleaned with a plasma P (plasma cleaned). By performing plasma cleaning in this way, contamination caused by the solubilizing component of the solder paste material 2 1 A can be completely removed, and poor contact between the columnar bumps 11 and each connection portion 3 of the wiring substrate 2 can be prevented. Next, as shown in FIG. 13 (A), a sheet-shaped anisotropic conductive resin 2 0A is transferred from a cover tape 2 3 to a main surface of the wiring substrate 2 using a sticking tool. In the wafer mounting area, as shown in FIG. 13 (B), the anisotropic conductive resin 20 A is disposed in the control wafer mounting area of one of the main surfaces 2 X of the wiring substrate 2. The anisotropic conductive resin 20 A is made of, for example, an epoxy-based thermosetting resin mixed with a large number of conductive particles. Next, as shown in Fig. 14 (A), in the control wafer mounting area of the main surface 2X of one of the wiring substrates 2, the control wafer 10 is arranged via the anisotropic conductive resin 20A. The control wafer 10 is arranged so that its circuit shadowing surface 10X is opposite to one of the main surfaces 2X of the wiring substrate 2. The control wafer 1 0 is transported from the storage tray to one of the main surfaces 2 of the wiring board 2 by a transport collet of a wafer mounting machine. The control wafer mounting field of this paper applies the Chinese National Standard (CNS) A4 specification (210X297). (Mm) (Please read the notes on the back before filling in this page) f Order Win-22- 523839 A7 B7 V. Invention Description (20) (Please read the notes on the back before filling in this page) Second, as described in As shown in FIG. 4 (B), the crimping control wafer 1 10 is connected with the thermal crimping tool 2 6 B, and the columnar projection 11 is connected to the connection portion 3 of the wiring substrate 2, and then the crimping state is maintained until The anisotropic conductive resin is hardened at 20 A. The anisotropic conductive resin 20 A will first melt and then harden. Thereby, as shown in FIG. 15, the control wafer 10 is bonded and fixed to the wiring substrate 2 by the hardened anisotropic conductive resin 20 A. The electrode welding point 10 a of the control wafer 10 is crimped to the connection portion 3 of the wiring substrate 2, and a part of most of the conductive particles mixed with the anisotropic conductive resin 20 through the columnar bumps 11 and It is electrically connected to the connection portion 3 of the wiring substrate 2. Next, the memory wafer 12 is mounted on the memory wafer mounting area on one of the main surfaces of the wiring board 2 in the same manner as the control wafer 10, and then the buffer wafer is mounted in the same manner as the control wafer 10. 1 4 Mounted on the buffer chip mounting area on one of the main surfaces 2 X of the wiring substrate 2, and then mounted the computing chip 16 on one of the main surfaces 2 X of the wiring substrate 2 in the same manner as the control wafer 10. Computing chip mounting area. Thereby, as shown in FIGS. 15 and 17, a crimp-type mounting component is mounted on one of the main surfaces 2 X of the wiring substrate 2. When mounting soldered electronic parts before crimped electronic parts, the thermal compression tools 2 6 B must be small tools that do not interfere with soldered electronic parts. At the same time, especially using tools with a thermal crimping tool 2 6 B with a tool head that is smaller than the crimping type electronic parts, it can prevent the conductive conductive resin around the crimping type electronic parts from being polluted. Tools for thermocompression bonding 2 6 B. This paper size applies the Chinese National Standard (CNS) A4 specification (210 × 297 mm) -23- 523839 A7 B7 V. Description of the invention (21) Furthermore, the tool head surface of the tool 26B for thermocompression is more crimped than that for thermocompression Type electronic parts are small, because the upper part of all the columnar protrusions should be covered with the tool head surface of the thermal compression tool 26B and arranged on a plane, so that the periphery of the tool head surface of the thermal compression tool 26B is located at the column Between the bumps and the periphery of the crimp-type electronic component, the heat or pressure applied by the thermocompression tool 2 6 B can be evenly applied to all the columnar bumps. As described above, according to this embodiment, the following effects can be obtained. (1) Install the soldering electronic parts before installing the crimping electronic parts. The solder paste material 2 1 A can be supplied by the general shield printing method. Therefore, compared to the shield printing method using the embossed cover, the solder paste is supplied When the material 2 1 A, the miniaturization of the MC can be achieved, and the productivity of the MCM can be improved compared with the case where the solder paste material 21A is supplied by the spreading method. (2) The embodiment of installing soldered electronic parts before installing the crimped electronic parts. Since the tool head surface of the thermal crimping tool 2 6 B is smaller than the thermal crimped electronic part, It can prevent the anisotropic conductive resin 20 around the crimping type electronic parts from contaminating the thermal crimping tool 2 6 B. As a result, the productivity of the barrel MCM can be improved. (3) The embodiment of installing soldered electronic parts before installing the crimped electronic parts. If the periphery of the tool head surface of the thermal crimping tool 26B is located around the columnar projection and the crimped electronic part, In this way, the heat or pressure applied by the thermocompression tool 2 6 B can be evenly applied to all the columnar projections. (4) Before carrying out the crimp-type mounting parts, if the plasma cleaning is performed, the wiring contaminated by the solder paste material 2 1 A solubilizer, etc. can be used. The paper size is applicable to the Chinese National Standard (CNS) A4 specification ( 210 × 297 mm) (Please read the precautions on the back before filling out this page), τ-24- 523839 A7 ____B7_ V. Description of the invention (22) (Please read the precautions on the back before filling out this page) Each connection of substrate 2 The portion 3 is cleaned, and the contact failure between the crimp-type mounting part and each connection portion 3 of the wiring board 2 is suppressed. As a result, the throughput of MCM can be increased. (5) Since the tool for thermocompression bonding uses a tool smaller than that of the thermocompression bonding type electronic parts, it is possible to avoid contact between the mounted soldering electronic part and the tool head for thermocompression bonding. In addition, Embodiments 1 and 2 use the example of a columnar bump to describe a bump-shaped electrode formed on an electrode solder joint of a semiconductor wafer, but the invention is not limited to this. For example, P b ·-S η may be used. Solder bump. However, solder bumps made of materials that have a higher melting point than the solder melting temperature when mounting soldered electronic parts and the thermal compression bonding temperature when mounting crimped electronic parts should be used. In the meantime, Embodiments 1 and 2 are performed by using an example in which a protruding electrode interposed between an electrode welding point of a crimped electronic component and a connection portion of a wiring substrate is formed on the electrode welding point of the crimped electronic component. Note that the protruding electrodes may be formed on the connection portions of the wiring substrate. After being printed by the Ministry of Health and Human Resources 4th, while the employees are cooperating with each other, printing is carried out. Embodiments 1 and 2 are examples of bonding resins that are used to bond and fix crimp-type electronic parts to the wiring board. Although it demonstrates, it is not limited to this, For example, a paste-like anisotropic conductive resin (AC P) or a sheet-like non-conductive resin (NCF) may be used. Embodiment 3 describes the MC that installs a heat sink. Fig. 18 is a cross-sectional view illustrating a schematic structure of MC MM in Embodiment 3 of the present invention. Figs. 19 and 20 are the paper sizes of MCM in Fig. 18, and the Chinese National Standard (CNS) Α4 is applied. Specifications (210X297 mm) -25- 523839 A7 ____ B7 ___ 5. Description of the invention (23) Expanded view. In addition, in order to make the drawings easier to understand, the oblique lines showing the cross sections are omitted in FIG. 18. (Please read the precautions on the back before filling in this page.) As shown in Figures 18 to 20, the MC in this embodiment has a heat conductive sheet 30 and a heat sink 31. The heat conductive sheet 30 is formed of, for example, an elastic silicone rubber, and the heat sink 31 is formed of a flat plate made of, for example, aluminum. The thermally conductive sheet 30 is in contact with the back surface of the crimp-type electronic component, and is patterned so as not to contact the chip capacitors 17 and 18. The heat conductive sheet 30 of this shape is mounted on the back of the crimped electronic part, and a heat sink 31 is installed here. The thickness of the heat conductive sheet 30 can be used to compensate the crimped electronic part and chip. The height difference of the capacitors 17 and 18, therefore, as shown in FIG. 21, the contact between the crimp-type electronic part and the heat conductive sheet .3 0 will not be hindered by the relatively high chip capacitors 17 and 18. As a result, the heat generated during the operation of the crimp-type electronic component can be effectively transmitted to the heat conductive sheet 30, thereby improving the heat dissipation of the MCM. At the same time, it is printed by the Ministry of Economic Affairs, production, labor, labor, and labor, and it can cover most of the crimped electronic parts and most of the welded electronic parts, and its surface size is larger than that of the heat conductive sheet 30. Since the area of the heat sink 31 is increased, it is possible to further improve the heat dissipation of the MC. Furthermore, the heat conductive sheet 30 has a shape that can contact the chip resistor 19 A. This is because the height of the control chip 10 and the memory chip 12 on both sides of the chip resistor 19 A is 0.4 mm [mm], and the height of the chip resistor 19A is 0.45 [mm], which has a low quotient. The difference can be absorbed by the deformation of the heat conductive sheet 30. In this way, the paper size for welding this paper applies the Chinese National Standard (CNS) A4 specification (210X297 mm) -26- 523839 A7 B7 V. Description of the invention (24) The lower height of the electronic component after installation is selectively arranged in In the field of bonding of the heat conductive sheet 30, the field between the crimp type electronic parts can also be effectively used, and the MC Μ can be further miniaturized. In the above, the inventions made by the present inventors and the like have been specifically described based on the above embodiments, but the invention is not limited to the above embodiments, and various modifications can be made without departing from the scope of the invention. It is briefly explained that the effects obtained by the representative of the inventions disclosed in the present case are as follows. According to the present invention, the productivity of an electronic device can be improved. According to the present invention, miniaturization of an electronic device can be achieved. According to the present invention, the heat dissipation of the electronic device can be improved. Brief Description of the Drawings Fig. 1 is a schematic plan view of a MC (electronic device) according to the first embodiment of the present invention. Figure 2 is the bottom view of the MCM model in Figure 1. Fig. 3 is a cross-sectional view of the mounting state of the control wafer, buffer wafer and chip capacitor mounted on the MC of Fig. 1. Fig. 4 is a cross-sectional view for explaining the manufacture of MC in Embodiment 1 of the present invention. Fig. 5 is a cross-sectional view for explaining the manufacturing of MC in Embodiment 1 of the present invention. Fig. 6 is a cross-sectional view for explaining the manufacture of MC in Embodiment 1 of the present invention. This paper size applies to Chinese National Standard (CNS) A4 specification (210 × 297 mm) (Please read the precautions on the back before filling out this page) Order -27- 523839 A7 _________B7___ V. Description of the invention (2δ) Figure 7 illustrates this book A cross-sectional view for manufacturing MC MC according to the first embodiment of the present invention. Fig. 8 is a plan view for explaining the manufacture of MC in Embodiment 1 of the present invention. Fig. 9 is a plan view for explaining the manufacture of MC in Embodiment 1 of the present invention. Fig. 10 is a cross-sectional view for explaining the manufacture of MC in Embodiment 2 of the present invention. Fig. 11 is a cross-sectional view for explaining the manufacture of MC in Embodiment 2 of the present invention. Fig. 12 is a cross-sectional view for explaining the manufacturing of MC in Embodiment 2 of the present invention. Fig. 13 is a cross-sectional view for explaining the manufacture of MC in Embodiment 2 of the present invention. Fig. 14 is a cross-sectional view for explaining the manufacture of MC in Embodiment 2 of the present invention. Fig. 15 is a cross-sectional view for explaining the manufacture of MC in Embodiment 2 of the present invention. Fig. 16 is a plan view for explaining the manufacturing of MC in Embodiment 2 of the present invention. Figure 17 is a plan view for explaining the manufacture of MC in Embodiment 2 of the present invention. Fig. 18 is a cross-sectional view showing a schematic structure of MC in Embodiment 3 of the present invention. This paper size applies Chinese National Standard (CNS) A4 specification (210 × 297 mm) (Please read the precautions on the back before filling this page) Thread Qin-28- 523839 A7 B7 V. Description of the invention (26) Figure 19 This is an expanded view of the MCM in Figure 18. Figure 20 is an expanded view of MCM in Figure 18. Figure 21 is a cross-sectional view of the MCM when the present invention is not applied. Main component comparison table 1 MC Μ 2 Wiring board Wire substrate 3 Connection part continued 4 Electrode welding point electrode 5 Insulating film edge film 10 Control wafer 1 OA Electrode welding point electrode 11 Columnar bump 12 Memory chip 14 Buffer Chips for controllers 16 Chips for computing 1 7 1 8 Chip capacitors 1 9, 1 9 A Chip resistors 2 0, 2 0 A Anisotropic conductive resin Square conductive resin 2 1 Solder 2 1 A Solder paste material 2 2 Solder bump 23 Cover tape 25 Adhesive tool The paper size is applicable to Chinese National Standard (CNS) A4 (210X297 mm) (Please read the precautions on the back before filling this page) f The order is -29-523839 A 7 B7 V. Description of the invention (27) 2 6 A > 2 6 B 2 7 Nozzle for pressing the tool for thermocompression (please read the precautions on the back before filling this page) 2 8 Shield cover 2 9 Extrusion Roller 30 Heat conduction sheet conduction 31 Heat sink heat body The paper size applies to Chinese National Standard (CNS) A4 specification (210X 297 mm) -30-

Claims (1)

523839 瑕請委員明示ο年Θ月所提之 A8 B8 C8 D8 六、申請專利範圍 附件1 a : 第901 19799號專利申請案 中文申請專利範圍修正本 民國91年10月7日修正 1·一種電子裝置之製造方法，該電子裝置具備有： 與配線基板之一主面之第1領域之間夾有接合用樹脂 ，以熱壓接用工具加以熱壓接，藉此安裝在上述配線基板 之一主面上之第1電子零件；以及， 藉由溶融焊錫糊漿材料安裝在上述配線基板之一主面 之與第1領域不同之第2領域，且安裝後之高度較上述第 1電子零件高之第2電子零件；其特徵在於， ： 安裝上述第2電子零件之前，先安裝上述第1電子零 件。 2 .如申請專利範圍第1項之電子裝置之製造方法， 其中，上述接合用樹脂係熱硬化性樹脂。 3 ·如申請專利範圍第1或2項之電子裝置之製造方 法，其中，熱壓接上述第1電子零件時之上述熱壓接用工 具之溫度，較上述焊錫之融點爲高。 4 .如申請專利範圍第1或2項之電子裝置之製造方 法，其中，上述第1電子零件係內部設有電路之主動零件 ，上述第2電子零件係被動零件。 5 . —種電子裝置之製造方法，具備有： 介由接合用樹脂在配線基板之一主面之第1領域配置 第1電子零件，然後，以熱壓接用工具熱壓接上述第1電 本紙張尺度適用中國國家標準（CNS ) A4規格（210X297公釐） (請先聞讀背面之注意事項再填寫本頁) 經濟部智慧財產局員工消費合作社印製 523839 經濟部智慧財產局員工消費合作社印製 A8 B8 C8 D8 々、申請專利範圍 子零件，將上述第1電子零件接合固定在上述配線基板之 一主面上之第1領域，同時，以設在上述配線基扳之一主 面之第1領域之第1連接部，與設在上述第1電子零件之 電極焊接點之間之突起狀電極，電氣方式連接上述第1連 接部與上述電極焊接點之第1製程；以及， 向設在上述配線基板之一主面之與第1領域不同之第 2領域之第2連接部，供應焊錫糊漿材料，然後，在上述 第2連接部上介由上述焊錫糊漿、材料配置第2電子零件之 電極，然後，溶融上述焊錫糊漿材料，以電氣方式連接上 述配線基板之第2連接部與上述第2電子零件之電極之第 2製程；其特徵在於， 在實施上述第2製程之前，先實施上述第1製程。 6 _如申請專利範圍第5項之電子裝置之製造方法， 其中，上述第2電子零件之從上述配線基板之一主面至最 頂部之高度，較上述第1電子零件爲高。 7 .如申請專利範圍第5或6項之電子裝置之製造方 法，其中，上述接合用樹脂係熱硬化樹脂。 8 _如申請專利範圍第5或6項之電子裝置之製造方 法，其中，熱壓接上述第1安裝零件時之上述熱壓接用工 具之溫度較上述焊錫之融點爲高。 9 ·如申請專利範圍第5或6項之電子裝置之製造方 法，其中，上述焊錫糊漿材料之供應，係以撒布（dispense )法爲之。 10·—種電子裝置之製造方法，該電子裝置具備有 本紙張尺度適用中國國家標準（CNS ) A4規格（210X297公釐） -2 - --聋-- (請先閲讀背面之注意事項再填寫本頁) 古523839 Members are requested to indicate clearly A8, B8, C8, D8 mentioned in January Θ. VI. Patent Application Scope Annex 1 a: Patent Application No. 901 19799 Amendment to Chinese Application Patent Scope Amendment October 7, 1991 Amendment 1 · An electronic A method for manufacturing a device, the electronic device comprising: a bonding resin sandwiched with a first area of a main surface of one of the wiring substrates; and thermal compression bonding with a thermocompression tool so as to be mounted on one of the wiring substrates. The first electronic component on the main surface; and a second area that is different from the first area on the main surface of one of the above-mentioned wiring substrates by using a molten solder paste material, and the height after installation is higher than the first electronic component The second electronic component is characterized in that: before the second electronic component is mounted, the first electronic component is mounted first. 2. The method for manufacturing an electronic device according to item 1 of the application, wherein the bonding resin is a thermosetting resin. 3. If the method for manufacturing an electronic device according to item 1 or 2 of the scope of patent application, wherein the temperature of the above-mentioned thermocompression tool when thermocompression bonding the first electronic part is higher than the melting point of the solder. 4. The manufacturing method of the electronic device according to item 1 or 2 of the scope of patent application, wherein the above-mentioned first electronic part is an active part with an internal circuit, and the above-mentioned second electronic part is a passive part. 5. A method for manufacturing an electronic device, comprising: arranging a first electronic component in a first area of a main surface of a wiring substrate via a bonding resin, and then thermally crimping the first electrical component with a thermocompression tool. This paper size applies to Chinese National Standard (CNS) A4 (210X297 mm) (Please read the notes on the back before filling out this page) Printed by the Employees ’Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs 523839 Employees’ Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs Printed A8 B8 C8 D8 々, sub-parts for patent application, the first electronic part is bonded and fixed to the first area of one of the main surfaces of the wiring substrate, and at the same time, it is provided on one of the main surfaces of the wiring base plate. A first process for electrically connecting the first connection portion and the electrode welding point with a protruding electrode provided between the first connection portion in the first field and the electrode welding point of the first electronic component; and A solder paste material is supplied to the second connection portion of the second area that is different from the first area on the main surface of the wiring board, and then the second connection portion is passed through the solder The second process of disposing the electrode of the second electronic component with tin paste and materials, and then melting the solder paste material to electrically connect the second connection portion of the wiring board and the electrode of the second electronic component in a second process; Before implementing the above-mentioned second process, implement the above-mentioned first process. 6 _ If the method for manufacturing an electronic device according to item 5 of the scope of patent application, wherein the height of the second electronic component from the main surface to the top of the wiring board is higher than that of the first electronic component. 7. The method for manufacturing an electronic device according to claim 5 or 6, wherein the bonding resin is a thermosetting resin. 8 _ If the method for manufacturing an electronic device in the scope of the patent application is No. 5 or 6, the temperature of the above-mentioned thermocompression tool during the thermocompression bonding of the first mounting part is higher than the melting point of the solder. 9 · If the method of manufacturing an electronic device according to item 5 or 6 of the patent application scope, wherein the supply of the above solder paste material is based on the dispense method. 10 · —A method for manufacturing an electronic device, the electronic device has the paper size applicable to the Chinese National Standard (CNS) A4 specification (210X297 mm) -2---deaf-(Please read the precautions on the back before filling (This page) ancient 523839 經濟部智慧財產局員工消費合作社印製 A8 B8 C8 D8 々、申請專利範圍 :與配線基板之一主面之第1領域之間夾有接合用樹脂， 以熱壓接用工具加以熱壓接，藉此安裝在上述配線基板之 一主面上之第1電子零件；以及，藉由溶融焊錫糊漿材料 安裝在上述配線基板之一主面之與第1領域不同之第2領 域之第2電子零件，其特徵在於， 在安裝上述第1電子零件之前，先安裝上述第2電子 零件。 1 1 ·如申請專利範圍第1 〇項之電子裝置之製造方 法，其中，上述焊錫糊漿材料之供應，係以屏蔽（screien) 印刷法爲之。 1 2 .如申請專利範圍第1 〇項之電子裝置之製造方 法，其中，上述第2電子零件之安裝後之高度較上述第1 電子零件爲高。 1 3 ·如申請專利範圍第1 〇項之電子裝置之製造方 法，其中，上述第1電子零件係內部設有電路之主動零件 ，上述第2電子零件係被動零件。 14·一種電子裝置之製造方法，具有： 介由接合用樹脂在配線基板之一主面之第1領域配置 第1電子零件，然後，以熱壓接用工具熱壓接上述第1電 子零件，將上述第1電子零件接合固定在上述配線基板之 一主面上之第1領域，同時，以設在上述配線基板之一主 面之第1領域之第1連接部，與設在上述第1電子零件之 電極焊接點之間之突起狀電極，電氣方式連接上述第1連 接部與上述電極焊接點之第1製程； 本紙張尺度適用中國國家標準（CNS ) A4規格（210X297公釐） -3 _ ----^-- C請先閱讀背面之注意事項再填寫本頁} -售523839 Printed by A8, B8, C8, D8, Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economics. 々 Application scope of patent: A bonding resin is sandwiched with the first area of one of the main surfaces of the wiring board. Thus, the first electronic component mounted on one of the main surfaces of the above-mentioned wiring substrate; and the second area of the second field, which is different from the first area, is mounted on one of the main surfaces of the above-mentioned wiring substrate by melting solder paste material The electronic component is characterized in that the second electronic component is mounted before the first electronic component is mounted. 1 1 · According to the method for manufacturing an electronic device under the scope of application for patent No. 10, wherein the supply of the above solder paste material is based on a screien printing method. 1 2. According to the method for manufacturing an electronic device in the scope of application for patent No. 10, wherein the height of the second electronic component is higher than that of the first electronic component. 1 3. According to the method for manufacturing an electronic device in the scope of application for patent No. 10, wherein the above-mentioned first electronic part is an active part with an internal circuit, and the above-mentioned second electronic part is a passive part. 14. A method for manufacturing an electronic device, comprising: arranging a first electronic component in a first area of a main surface of a wiring substrate via a bonding resin, and then thermally crimping the first electronic component with a thermocompression tool, The first electronic component is bonded and fixed to the first area on one of the main surfaces of the wiring substrate, and a first connection portion provided on the first area of one of the main surfaces of the wiring substrate is connected to the first connection portion provided on the first surface. The protruded electrode between the electrode welding points of the electronic parts, the first process of electrically connecting the above-mentioned first connection portion and the above-mentioned electrode welding point; This paper size applies the Chinese National Standard (CNS) A4 specification (210X297 mm) -3 _ ---- ^-CPlease read the notes on the back before filling in this page} -Sale 經濟部智慧財產局員工消費合作社印製 523839 A8 B8 C8 D8 々、申請專利範圍 向設在上述配線基板之一主面之與第1領域不同之第 2領域之第2連接部，供應焊錫糊漿材料，然後，在上述 第2連接部上介由上述焊錫糊槳材料配置上述第2電子零 件之電極，然後，溶融上述焊錫糊漿材料，以電氣方式連 接上述配線基板之第2連接部與上述第2電子零件之電極 之第2製程；其特徵在於， 在實施上述第1製程之前，先實施上述第2製程。 15·—種電子裝置，其特徵在於，具備有：介由接 合用樹脂接合固定在配線基板之一主面之第1領域，且介 由突起狀電極，以電氣方式將電極焊接點連接於設在上述 配線基板之一主面之第1領域之第1連接部之第1電子零 件；以及， 介由焊錫材料以電氣方式將電極連接在，固定於上述 配線基板之一主面之與第1領域不同之第2領域，且設在 上述配線基板之一主面之第2領域之第2連接部之第2電 子零件。 16.—種電子裝置，其特徵在於，具備有： 配線基板； 安裝在上述配線基板之一主面之第1領域之多數第1 電子零件； 安裝在上述配線基板之一主面之與第1領域不同之第 2領域，且從上述配線基板之一主面至最頂部之高度，較 上述第1電子零件爲高之多數第2電子零件；以及， 裝設在上述多數第1電子零件，而上述多數第2電子 本紙張尺度適用中國國家標準（CNS ) A4規格（210X297公釐） ^4- ' (請先聞讀背面之注意事項再填寫本頁)Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs 523839 A8 B8 C8 D8 々 Application scope of patents Solder paste is supplied to the second connection part of the second area which is different from the first area on the main surface of the above wiring board Then, the electrode of the second electronic component is arranged on the second connection portion through the solder paste paddle material, and then the solder paste material is melted to electrically connect the second connection portion of the wiring substrate and the above. The second process of the electrode of the second electronic component is characterized in that the second process is performed before the first process is performed. 15 · An electronic device, comprising: a first area of a main surface of a wiring substrate bonded and fixed via a bonding resin; and an electrode soldering point is electrically connected to the device via a protruding electrode. The first electronic component of the first connection portion in the first area of the main surface of one of the wiring substrates; and the electrode is electrically connected via a solder material and fixed to the first surface of one of the wiring substrates. The second field is a second field in which the second connection part and the second electronic part are provided in the second field of one of the main surfaces of the wiring board. 16. An electronic device, comprising: a wiring substrate; a plurality of first electronic components in a first area mounted on one of the main surfaces of the wiring substrate; and a first component mounted on one of the main surfaces of the wiring substrate. The second field having a different field, and the height from one main surface to the top of the wiring board is higher than the first electronic part, and the second electronic part is higher than the first electronic part; Most of the above 2nd electronic paper sizes are applicable to the Chinese National Standard (CNS) A4 specification (210X297 mm) ^ 4- '(Please read the precautions on the back before filling this page) 523839 A8 B8 C8 D8 _ 六、申請專利範圍 零件未裝設之熱傳導片。 (請先閱讀背面之注意事項再填寫本頁) 1 7 .如申請專利範圍第1 6項之電子裝置，具備有 ，裝設於上述熱傳導片，且覆蓋上述多數第1電子零件上 及上述多數第2電子零件上之扁平形之散熱体。 1 8 .如申請專利範圍第1 6項之電子裝置，其中， 上述多數第2電子零件在動作時之發熱量較上述多數第1 電子零件之發熱量小。 1 9 .如申請專利範圍第1 6項之電子裝置，其中， 上述多數第1電子零件係內部設有電路之半導体晶片/上 述第2電子零件係被動零件。 2 0 .如申請專利範掘第1 〇項之電子裝置之製造方 法，其中，上述熱壓接用工具用以熱壓接上述第1電子零 件之面之寬度較上述第1電子零件之寬度小。 2 1 .如申請專利範圍第1 4項之電子裝置之製造方 法，其中，上述熱壓接用工具用以熱壓接上述第1電子零 件之面之寬度較上述第1電子零件之寬度小。 2 2 . —種電子裝置之製造方法，該電子裝置具備有 經濟部智慧財產局員工消費合作社印製 在配線基板之一主面上，以熱壓接用工具加以熱壓接 ，藉此安裝在上述配線基板之一主面上之第1電子零件； 以及， 藉由溶融焊錫糊漿材料安裝在上述配線基板之一主面 之與第1領域不同之第2領域，且安裝後之高度較上述第 1電子零件高之第2電子零件；其特徵在於， ^氏張尺度適用中國國家標準（CNS ) A4規格（210X297^^)-Γ5Τ---" 523839 A8 B8 C8 D8 六、申請專利範圍 安裝上述第2電子零件之前，先安裝上述第1電子零 件。 (請先閱讀背面之注意事項再填寫本頁) 2 3 .如申請專利範圍第2 2項之電子裝置之製造方 法，其中，熱壓接上述第1電子零件時之上述熱壓接用工 具之溫度，較上述焊錫之融點爲高。 2 4 .如申請專利範圍第2 2項之電子裝置之製造方 法，其中，上述第1電子零件係內部設有電路之主動零件 ，上述第2電子零件係被動零件。 2 5 · —種電子裝置之製造方法，該電子裝置具備有 :在配線基板之一主面上，以熱壓接用工具加以熱壓接， 藉此安裝在上述配線基板之一主面上之第1電子零件；以 及，藉由溶融焊錫糊漿材料安裝在上述配線基板之一主面 之與第1領域不同之第2領域之第2電子零件，其特徵在 於， 在安裝上述第1電子零件之前，先安裝上述第2電子 零件。 經濟部智慧財產局員工消費合作社印製 2 6 .如申請專利範圍第2 5項之電子裝置之製造方 法，其中，上述焊錫糊漿材料之供應，係以屏蔽（screen) 印刷法爲之。 2 7 ·如申請專利範圍第2 5項之電子裝置之製造方 法，其中，上述第1電子零件係內部設有電路之主動零件 ，上述第2電子零件係被動零件。 2 8 .如申請專利範圍第2 5項之電子裝置之製造方 法，其中，上述熱壓接用工具用以熱壓接上述第1電子零 本紙張尺度適用中國國家襟準（CNS ) A4規格（210X297公釐) -6 - ""~ 523839 A8 B8 C8 D8 六、申請專利範圍 件之面之寬度較上述第1電子零件之寬度小。 29 . —種電子裝置之製造方法，具有： (請先閲讀背面之注意事項再填寫本頁) 在配線基板之一主面之第1領域上配置第1電子零件 ，然後，以熱壓接用工具熱壓接上述第1電子零件，將上 述第1電子零件固定在上述配線基板之一主面上之第1領 域，同時，以設在上述配線基板之一主面之第1領域之第 1連接部，與設在上述第1電子零件之電極焊接點之間之 突起狀電極，電氣方式連接上述第1連接部與上述電極焊 接點之第1製程； · 向設在上述配線基板之一主面之與第1領域不同之第 2領域之第2連接部，供應焊錫糊漿材料，然後，在上述 第2連接部上介由上述焊錫糊漿材料配置上述第2電子零 件之電極，然後，溶融上述焊錫糊漿材料，以電氣方式連 接上述配線基板之第2連接部與上述第2電子零件之電極 之第2製程；其特徵在於， 在實施上述第1製程之前，先實施上述第2製程。 經濟部智慧財產局員工消費合作社印製 3 〇 ·如申請專利範圍第2 9項之電子裝置之製造方 法，其中，上述熱壓接用工具用以熱壓接上述第1電子零 件之面之寬度較上述第1電子零件之寬度小。 本紙張尺度適用中國國家標準（CNS ) A4規格（210X297公釐） -7 -523839 A8 B8 C8 D8 _ VI. Scope of patent application The heat conduction sheet is not installed on the part. (Please read the precautions on the back before filling out this page) 1 7. If the electronic device under the scope of patent application No. 16 is provided, it is installed on the above-mentioned thermally conductive sheet and covers most of the above-mentioned first electronic parts and above-mentioned most Flat heat sink on the second electronic component. 18. The electronic device according to item 16 of the scope of patent application, wherein the heat generated during operation of the majority of the second electronic components is smaller than the heat output of the majority of the first electronic components. 19. The electronic device according to item 16 of the scope of patent application, wherein most of the above-mentioned first electronic parts are semiconductor wafers with internal circuits / the above-mentioned second electronic parts are passive parts. 20. The method for manufacturing an electronic device according to item 10 of the patent application, wherein the width of the surface of the above-mentioned thermocompression tool used for thermocompression bonding of the first electronic component is smaller than the width of the first electronic component . 2 1. The method for manufacturing an electronic device according to item 14 of the scope of patent application, wherein the width of the surface of the above-mentioned thermocompression tool for thermocompression bonding of the first electronic component is smaller than that of the first electronic component. 2 2. A method for manufacturing an electronic device, which is provided with a consumer cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs and printed on one of the main surfaces of a wiring substrate, and is thermally crimped with a thermal crimping tool to install the electronic device. The first electronic component on one of the main surfaces of the wiring substrate; and, a second area different from the first area on one of the main surfaces of the wiring substrate by using a molten solder paste material, and the height after installation is higher than the above The 1st electronic part is the 2nd highest electronic part; it is characterized in that the ^ 's scale is applicable to the Chinese National Standard (CNS) A4 specification (210X297 ^^)-Γ5Τ --- " 523839 A8 B8 C8 D8 6. Scope of patent application Before mounting the second electronic component, first mount the first electronic component. (Please read the precautions on the back before filling out this page) 2 3. If the method of manufacturing an electronic device according to item 22 of the patent application scope, wherein the above-mentioned thermocompression tool for thermocompression bonding of the first electronic part The temperature is higher than the melting point of the above solder. 24. The method for manufacturing an electronic device according to item 22 of the scope of patent application, wherein the first electronic part is an active part with an internal circuit, and the second electronic part is a passive part. 2 5 · A method of manufacturing an electronic device, the electronic device comprising: a main surface of a wiring substrate, which is thermally crimped with a tool for thermal compression, thereby being mounted on a main surface of the above-mentioned wiring substrate. A first electronic component; and a second electronic component in a second area that is different from the first area and is mounted on one of the main surfaces of the wiring board by using a molten solder paste material, wherein the first electronic component is mounted Prior to this, the second electronic component was mounted. Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs 26. For the manufacturing method of the electronic device in the scope of application for patent No. 25, wherein the supply of the above solder paste material is screen printing method. 2 7 · According to the method for manufacturing an electronic device in the scope of claim 25, wherein the above-mentioned first electronic part is an active part with an internal circuit, and the above-mentioned second electronic part is a passive part. 28. If the method for manufacturing an electronic device according to item 25 of the scope of patent application, wherein the above-mentioned thermocompression tool is used for thermocompression bonding of the above-mentioned first electronic item paper standard, the Chinese National Standard (CNS) A4 specification ( 210X297 mm) -6-" " ~ 523839 A8 B8 C8 D8 6. The width of the surface of the patent application part is smaller than the width of the first electronic part. 29. —A method for manufacturing an electronic device, including: (Please read the precautions on the back before filling out this page) Place the first electronic component on the first area of one of the main surfaces of the wiring board, and then use thermocompression The first electronic component is thermally crimped with a tool, and the first electronic component is fixed to the first area on one of the main surfaces of the wiring substrate. At the same time, the first electronic component is provided to the first area on the first surface of the main surface of the wiring substrate. The first process of electrically connecting the first connection portion and the electrode welding point with the protruding electrode provided between the electrode welding point of the first electronic component and the connecting portion; The second connection part in the second field, which is different from the first field, supplies a solder paste material, and then the electrodes of the second electronic component are arranged on the second connection part through the solder paste material. Then, The second process of melting the solder paste material and electrically connecting the second connection portion of the wiring board and the electrode of the second electronic component is characterized in that before the first process is implemented, The second process. Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs. 3．If the method of manufacturing an electronic device according to item 29 of the patent application method, wherein the above-mentioned thermocompression tool is used to thermally press the width of the surface of the first electronic component It is smaller than the width of the first electronic component. This paper size applies to China National Standard (CNS) A4 (210X297 mm) -7-
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