TW515038B - Manufacturing method of shallow trench isolation - Google Patents

Manufacturing method of shallow trench isolation Download PDF

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Publication number
TW515038B
TW515038B TW90120151A TW90120151A TW515038B TW 515038 B TW515038 B TW 515038B TW 90120151 A TW90120151 A TW 90120151A TW 90120151 A TW90120151 A TW 90120151A TW 515038 B TW515038 B TW 515038B
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Taiwan
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oxide layer
scope
layer
patent application
item
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TW90120151A
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Chinese (zh)
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Jr-Yang Bai
Jr-Shing You
You-Luen Du
Jia-Shiung Tsai
Ming-Hua Ji
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Taiwan Semiconductor Mfg
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Publication of TW515038B publication Critical patent/TW515038B/en

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Abstract

The present invention discloses a manufacturing method of shallow trench isolation (STI) structure, in which a polysilicon layer is first formed on the pad oxide layer such as, for example, undoped polysilicon layer, and an upper oxide layer matching with silicon nitride spacer, or a silicon nitride layer matching with oxide spacer is formed. Therefore, the upper oxide layer/silicon nitride spacer or silicon nitride layer/oxide spacer can function as the hard mask without additional photoresist in the following definition of shallow trench isolation, and the upper corner edge of the shallow trench isolation region can be exposed by the pull-back effect of the spacer, so as to form a rounded shallow trench edge corner, and the generation of divot structure between the shallow trench isolation and the substrate can be avoided.

Description

經濟部智慧財產局員工消費合作社印製 515038 A7 B7 五、發明說明() 發明領域: 本發明係有關於一種淺溝渠隔離(Shallow Trench Isolation ; SΤΙ)結構之製造方法,特別是有關於一種利用間 隙壁(Spacer)以形成後拉(Pull-back)效果之淺溝渠隔離結 構之製造方法。 發明背景: 一個完整的積體電路,通常是由成千上萬個金氧半導 體(Metal Oxide Semiconductor; MOS)電晶體(Transistor) 所組成,為防止這些相鄰的電晶體之間發生閉鎖(Latch Up)、短路現象,因此必須在相鄰的電晶體間加入用以電性 隔絕的隔離結構。當元件尺寸逐漸縮小’積集度(Integration) 逐漸提高,元件間的隔離結構也須隨之縮小,因此元件隔 離技術的困難度也日益增高。 目前,已發展出的幾種元件隔離的技術中,由於淺溝 渠隔離技術所形成之隔離結構具有良好的元件隔離效果, 亦不會產生鳥嘴(Bird’s Beak)結構,而能提高元件密度及 手坦度’因此廣泛地應用於次半破米(Sub-quarter Micron) 的積體電路製程中。 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公釐) ------Μ 11 ------11---^ —------7 · I 5? (請先閱讀背面之注意事項再填寫本頁) 515038 經濟部智慧財產局員工消費合作社印製 A7 B7 五、發明說明() 請參照第1圖至第7圖,其所繪示為習知製造淺溝渠 隔離結構之剖面示意流程圖。習知淺溝渠隔離結構之成 型,首先在矽所組成之基材1 〇〇上,以例如熱爐管氧化的 方式形成一層氧化矽作為墊氧化層1 02,再以例如化學氣 相沉積(Chemical Vapor Deposition ; CVD)的方式在塾氧化 層102上形成氮化矽層1〇4。然後,在氮化矽層1〇4上形 成光阻106,並利用微影(photolithography)與姓刻製程,定 義出隔離區之開口 1 0 8,而形成如第1圖所示之結構。 當形成隔離區之開口 1 0 8後,利用乾式姓刻法以非等 向性(Anisotropy)方式,钱刻1化石夕層1〇4、塾氧化層1〇2、 以及基材100,而在基材1〇〇中形成淺溝渠110,如第2圖 所示。於淺溝渠1 1 0結構完成後’將光阻1 〇 6移除。在定 義出適當深度及形狀之淺溝渠1 1 0後,利用例如熱爐管氧 化方式形成襯氧化層(Liner Oxide Layer)112修補淺溝渠 1 1 0之蝕刻表層。此外,襯氧化層1 1 2尚可用以降低基材 1 0 0與淺溝渠隔離結構介面的接觸應力,並避免後續之高 密度電漿化學氣相沉積對淺溝渠1 1 0表面造成傷害。當適 當厚度之襯氧化層1 1 2形成後,以高密度電漿化學氣相沉 積(High Density Plasma CVD ; HDPCVD)的方式,形成氧化 矽層1 1 4而將淺溝渠1 1 〇填平,並覆蓋氮化矽層丨〇4以及 襯氧化層1 1 2,如第4圖所示之結構。 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公t ) --------^-----------^ ----------^ ^ (請先閱讀背面之注意事項再填寫本頁) 515038 A7Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs 515038 A7 B7 V. Description of the invention () Field of the invention: The present invention relates to a manufacturing method of a Shallow Trench Isolation (STI) structure, and in particular to a utilization gap A method for manufacturing a shallow trench isolation structure with a wall (spacer) to form a pull-back effect. Background of the Invention: A complete integrated circuit is usually composed of thousands of Metal Oxide Semiconductor (MOS) transistors. In order to prevent latching between these adjacent transistors (Latch) Up), short circuit phenomenon, so an isolation structure must be added between adjacent transistors for electrical isolation. When the component size is gradually reduced, the integration degree is gradually increased, and the isolation structure between the components must be reduced accordingly. Therefore, the difficulty of the component isolation technology is increasing. At present, among the several component isolation technologies that have been developed, the isolation structure formed by the shallow trench isolation technology has a good component isolation effect, and does not produce a bird's beak structure, which can improve component density and hand Tando is therefore widely used in Sub-quarter Micron's integrated circuit manufacturing process. This paper size applies to China National Standard (CNS) A4 (210 X 297 mm) ------ M 11 ------ 11 --- ^ -------- 7 · I 5? (Please read the precautions on the back before filling out this page) 515038 Printed by the Consumers ’Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs A7 B7 V. Description of the invention () Please refer to Figure 1 to Figure 7, which are shown as conventional manufacturing A schematic flow chart of a section of a shallow trench isolation structure. The formation of a shallow trench isolation structure is known. First, a layer of silicon oxide is formed as a pad oxide layer 102 on a substrate 100 made of silicon by, for example, a thermal furnace tube oxidation method, and then, for example, chemical vapor deposition (Chemical Vapor Deposition (CVD) is used to form a silicon nitride layer 104 on the hafnium oxide layer 102. Then, a photoresist 106 is formed on the silicon nitride layer 104, and a photolithography and a surname process are used to define the opening 108 of the isolation region to form a structure as shown in FIG. After the opening 108 of the isolation region is formed, the dry carving method is used to engrav the fossil evening layer 104, the hafnium oxide layer 102, and the substrate 100 in anisotropic (Anisotropy) manner. A shallow trench 110 is formed in the substrate 100, as shown in FIG. 2. After the shallow trench 1 10 structure is completed, the photoresist 106 is removed. After the shallow trenches 110 of an appropriate depth and shape are defined, a liner oxide layer 112 is formed by using, for example, a thermal furnace tube oxidation method to repair the etched surface layer of the shallow trenches 110. In addition, the liner oxide layer 12 can also be used to reduce the contact stress between the substrate 100 and the shallow trench isolation structure interface, and avoid the subsequent high-density plasma chemical vapor deposition to cause damage to the shallow trench 110 surface. After the liner oxide layer 1 12 of a proper thickness is formed, a silicon oxide layer 1 1 4 is formed by high density plasma chemical vapor deposition (High Density Plasma CVD; HDPCVD), and the shallow trenches 1 1 0 are filled. And cover the silicon nitride layer 〇 04 and the liner oxide layer 1 12, as shown in Figure 4 structure. This paper size applies to China National Standard (CNS) A4 specification (210 X 297 male t) -------- ^ ----------- ^ ---------- ^ ^ (Please read the notes on the back before filling this page) 515038 A7

五、發明說明() 經濟部智慧財產局員工消費合作社印制衣 •接者’利用化學機械研磨(Chemical Mechanical ing ’ CMP)製程,並以氮化矽層ι〇4為研磨終點,將 於氮化矽層1 04上不需要之氧化矽移除,僅留下淺溝渠 "〇内之氧化矽’形成如第5圖所示之結構。然後,以蝕 刻方式去除氮化矽層1〇4,而形成如第6圖所示之結構。 此時,同樣利用蝕刻法,並例如以氫氟酸Acid) 為钱刻劑來移除塾氧化層1〇2,而形成所需之淺溝渠隔離 結構1 16,如第7圖所示。 然而’請參照第6圖,由於氧化矽層1 1 4在淺溝渠π 0 上方的部分的寬度U 8小於淺溝渠π 〇之邊緣的寬度丨2〇, 且用以移除墊氧化層1 〇2之氫氟酸等蝕刻劑很容易匯聚在 塾氧化層102與氧化石夕層114介面的交角122’而使得交 角1 22處過度浸泡蝕刻劑,導致所形成之淺溝渠隔離結構 1 1 6與基材1 〇 〇之間產生凹陷結構丨2 4。在後續之沉積過程 中,一些半導體材料會填入凹陷結構1 24内,而使得電性 特性曲線上產生峰狀(Hump)現象,造成元件電性的不穩 定0 另一方面,雖然藉由襯氧化層1 1 2的形成’能增加淺 溝渠110(第3圖所示)之側壁上邊角的圓滑度’但所產生的 效果有限,不夠圓滑的淺溝渠1 1 0邊角還是會導致邊緣漏 電流(Leakage Current)產生。 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公餐) -------------^--------^-------- « Υ - (請先閱讀背面之注意事項再填寫本頁) 經濟部智慧財產局員工消費合作社印製 515038 A7 _B7_ 五、發明說明() 發明目的及概述: 鑒於上述習知淺溝渠隔離結構的製造過程中,所形成 之淺溝渠的側壁邊角圓滑度不夠,且經常會在淺溝渠隔離 結構與淺溝渠的上緣間形成凹陷結構,而產生漏電流現 象,並降低元件電性穩定度。 因此,本發明之主要目的之一為提供一種淺溝渠隔離 結構之製造方法,其係在隔離區之開口旁的堆疊材料層側 壁形成間隙壁,並在淺溝渠形成後,將此間隙壁移除,而 產生後拉效杲,以暴露出淺溝渠之上緣邊角。因此,在後 續形成襯氧化層的過程中,會使得淺溝渠之上緣邊角變得 更加地圓滑,進而可避免產生漏電流。 本發明之另一目的為提供一種淺溝渠隔離結構之製造 方法,藉由淺溝渠形成前,在隔離區之開口的側壁所形成 之間隙壁,而產生後拉效果。因此,後續所沉積之淺溝渠 隔離結構的材料所覆蓋的區域會大於淺溝渠之上緣,而防 止淺溝渠隔離結構與淺溝渠之上緣產生凹陷結構,進而提 升元件的電性穩定度。 本發明的再一目的為提供一種淺溝渠隔離結構之製造 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公釐) -------I--Η---裝----1---訂·1,------Γ ·線 7 (請先閱讀背面之¾意事項再填寫本頁) 經濟部智慧財產局員工消費合作社印製 515038 A7 ---- B7 五、發明說明() 方法,其係在墊氧化層與氮化矽層或上層氧化矽層間加入 多晶石夕,例如為未摻雜之多晶矽。因此,在後續之襯氧化 層的形成過程中,此多晶矽暴露在外處會同時形成一層由 氧化矽所構成之襯氧化層,不但使得後拉效果更為顯著, 且能增加淺溝渠外緣邊角的圓滑度。 根據以上所述之目的’本發明更提供了 一種淺溝渠隔 離結構之製造方法,至少包括··提供一基材;形成一墊氧 化層覆蓋基材;形成一多晶矽層覆蓋墊氧化層;形成一上 層氧化層覆蓋此多晶矽層,其中墊氧化層、多晶矽層、以 及上層氧化層構成一複合材料層;定義複合材料層,以形 成具有複數個側壁之開口,並約暴露出基材;形成複數個 由氮化矽組成之間隙壁這些側壁旁;形成一淺溝渠於基材 中,移除這些間隙壁,以約暴露出淺溝渠上緣之邊角,並 使得複合材料層之側壁與淺溝渠上緣之間具有一預設距 離;形成一襯氧化層覆蓋複合材料層之側壁以及基材;形 成一氧化矽層覆蓋襯氧化層以及上層氧化層,並填滿淺溝 渠;進行一_研磨製程,直至約暴露出多晶矽層以及襯氧化 層;移除多晶矽層,並約暴露出墊氧化層;以及移除墊氧 化層’並約暴露出基材。 根據以上所述之目的,本發明更提供了 一種淺溝渠隔 離結構之製造方法,至少包括··提供一基材;形成一墊氧 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公釐) -------M---0II I* ---- (請先閱讀背面之注意事項再填寫本頁) 訂------Τ-線 J, 515038 A7 五、發明說明() 化層覆蓋基材;形成一多晶矽層覆蓋墊氧化層;形成一氮 化矽層覆蓋多晶矽層,其中墊氧化層、多晶矽層、以及氮 化矽層構成一複合材料層;定義複合材料層,以形成具有 複數個側壁之開口,並約暴露出基材;形成複數個由氧化 矽組成之間隙壁位於這些側壁旁;形成一淺溝渠於基材 中;移除這些間隙壁以約暴露出淺溝渠上緣之邊角,並使 得塾氧化層之側壁與淺溝渠上緣之間具有一預設距離;形 成一襯氧化層覆蓋多晶矽層、墊氧化層、以及基材;形成 一氧化砍層覆蓋襯氧化層以及氮化矽層,並填滿淺溝渠; 進行一研磨製程,直至約暴露出氮化矽層以及襯氧化層; 移除氮化石夕層’並約暴露出多晶矽層以及襯氧化層之一部 份;移除多晶矽層,並約暴露出墊氧化層;以及移除墊氧 化層,並約暴露出基材。 圖式簡單說明·· 列 下 以 輔 中 字. 文 明 說 之 後 往 於: 將中 例其 施, 實述 佳闡 較的 的 細 明詳 發更 本做 形 圖 ------^---^1---裝--------訂 i,-----Τ·線 7 (請先閱讀背面之注意事項再填寫本頁) 經濟部智慧財產局員工消費合作社印製 剖 之 構 結 離 隔 渠 溝 淺 造 製 知 習 示 繪 為 圖 7 第 ; 至圖 圖程 1流 第意 示 面 製 之 例 施 實 佳 較及 一以 第., 之圖 明程 發流 本意 示示 繪面 為剖 圖 的 18構 第結 至離 圖隔 8 渠 第溝 淺 造 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公釐) 515038 A7 B7 五、發明說明() 第1 9圖至第2 6圖為繪示本發明之第二較佳實施例之 製造淺溝渠隔離結構的剖面示意流程圖。 經濟部智慧財產局員工消費合作社印製 圖號對照說明: 100 基 材 102 墊 氧 化 層 104 氮 化 矽 層 106 光 阻 108 隔 離 區 之 開口 110 淺 溝 渠 112 襯 氧 化 層 114 氧 化 矽 層 116 淺 溝 渠 隔 離結構 118 寬 度 120 寬 度 122 交 角 124 凹 陷 結 構 200 基 材 202 墊 氧 化 層 204 多 晶 矽 層 206 上 層 氧 化 層 207 複 合 材 料 層 208 開 π 209 側 壁 210 隔 離 區 212 氮 化 矽 層 214 間 隙 壁 216 淺 溝 渠 217 預 設 距 離 218 邊 角 220 襯 氧 化 層 221 寬 度 222 氧 化 矽 層 223 寬 度 224 交 角 226 淺 溝 渠 隔 離結構 300 基 材 302 墊 氧 化 層 304 多 晶 矽 層 306 氮 化 矽 層 307 複 合 材 料 層 308 開 σ -------------裝--------II--------^.-線*1 «>»- (請先閱讀背面之注意事項再填寫本頁) 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公釐) 經濟部智慧財產局員工消費合作社印製 515038 A7 B7 五、發明說明() 309 隔離區 3 10 側壁 3 11 間隙壁 3 12 淺溝渠 3 14 凹陷區 316 邊角 3 17 預設距離 318 襯氧化層 320 氧化矽層 322 寬度 324 寬度 326 寬度 328 淺溝渠隔離結構 發明詳細說明: 本發明揭露一種淺溝渠隔離結構之製造方法,其係利 用間隙壁結構來達到後拉效杲,進而增加淺溝渠上緣邊角 的圓滑度,以及避免淺溝渠隔離結構與淺溝渠間產生凹陷 結構。為了使本發明之敘述更加詳盡與完備,可參照下列 描述並配合第8圖至第26圖之圖示。 本發明之第一較佳實施例之淺溝渠隔離結構之成型流 程請參照第8圖至第1 8圖所繪示的剖面示意圖,首先提供 基材200,其材料例如為矽,再利用例如熱氧化製程形成 一層厚度介於約150A與約200A之間的氧化矽覆蓋在基材 200上,來當作墊氧化層202。然後,利用例如低壓化學氣 相沉積法(Low Pressure CVD ; LPCVD)沉積厚度介於約 1000A與約2000A之間的多晶矽層204覆蓋在墊氧化層202 本紙張&度適用中國國家標準(CNS)A4規格(210 X 297公釐) -------------裝--------訂--------Γ·線τ (請先閱讀背面之注意事項再填寫本頁) 經濟部智慧財產局員工消費合作社印製 515038 五、發明說明() 二多晶梦層204之材料可例如為未摻雜之多晶石夕, Π W雜之離子在後續的熱製程中h基材⑽,而 了::1電性的穩定度。完成多晶石夕層204之沉積後,對 二二A a 204進行氧化製程,以形成厚度約介於500A與約 q卜展之間的氡化矽覆蓋在多晶矽層204 i,來當作上層 2曰206,其中墊氧化層202、多晶矽層204、以及上層 氧化層206構成複合材料層2〇7,而形成 結構。 口 I心 接著,利用例如微影與蝕刻製程定義複合材料層207, 而約暴露出基材200,以定義出隔離區21〇,並在複合材料 層2〇7中形成開口 208,其中開口 2〇8具有複數個側壁 如第9圖所示之結構。當完成隔離區21〇的定義後, 利用例如低壓化學氣相沉積法共形沉積厚度介於約2 〇 〇 A 與約500A之間的氮化矽層2丨2,覆蓋在基材2〇〇、側壁 209以及上層氧化層206上,而形成如第1〇圖所示之結 構。隨後,利用例如非等向性蝕刻技術,並以上層氧化層 2〇6為蝕刻終點,回蝕氮化矽層212以在側壁2〇9旁形成 複數個間隙壁214。間隙壁2丨4結構形成之後,利用例如 乾式姓刻法,並以上層氧化層206以及氮化矽所組成之間 隙壁214為硬罩幕,進行非等向性蝕刻而在基材2〇〇中形 成所需深度及形狀的淺溝渠2 1 6。 10 本紙張尺度適用中國國家標準(CNS)A4規格(2i〇x 297公餐 ------麟---^----裝--------訂-------Ί線Γ (請先閱讀背面之注意事項再填寫本頁) 515038 A7V. Description of the invention () Printing of clothing and clothing by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs, using the “Chemical Mechanical ing 'CMP” process, and the silicon nitride layer ι04 as the end point of polishing. Unnecessary silicon oxide on the siliconized layer 104 is removed, leaving only silicon oxide within the shallow trench " 〇 to form a structure as shown in FIG. Then, the silicon nitride layer 104 is removed by etching to form a structure as shown in FIG. 6. At this time, the etching method is also used, and for example, hydrofluoric acid (Acid) is used as an etching agent to remove the hafnium oxide layer 102 to form the desired shallow trench isolation structure 116, as shown in FIG. However, please refer to FIG. 6, because the width U 8 of the silicon oxide layer 1 1 4 above the shallow trench π 0 is smaller than the width of the edge of the shallow trench π 〇 and is used to remove the pad oxide layer 1 〇 Etchants such as hydrofluoric acid can easily converge at the intersection angle 122 'of the interface between the hafnium oxide layer 102 and the oxide oxide layer 114, so that the etchant is soaked at the intersection angle 1 to 22, resulting in the formation of a shallow trench isolation structure 1 1 6 A recessed structure is generated between the substrates 100 and 24. During the subsequent deposition process, some semiconductor materials will fill the recessed structure 1 24, which will cause a peak (Hump) phenomenon on the electrical characteristic curve, which will cause the electrical instability of the device. On the other hand, although The formation of the oxide layer 1 1 2 'can increase the roundness of the corners on the side walls of the shallow trench 110 (shown in Figure 3)', but the effect is limited. The shallow corners of the shallow trench 1 1 0 still cause edge leakage. Current (Leakage Current) is generated. This paper size applies to China National Standard (CNS) A4 specification (210 X 297 meals) ------------- ^ -------- ^ -------- «Υ-(Please read the precautions on the back before filling out this page) Printed by the Intellectual Property Bureau of the Ministry of Economic Affairs, Employee Consumer Cooperative 515038 A7 _B7_ V. Description of the invention During the process, the corners of the side walls of the shallow trench formed are not smooth enough, and often a recessed structure is formed between the shallow trench isolation structure and the upper edge of the shallow trench, resulting in a leakage current phenomenon and reducing the electrical stability of the device. Therefore, one of the main objects of the present invention is to provide a method for manufacturing a shallow trench isolation structure, which forms a gap wall on the side wall of a stack of material layers next to an opening in an isolation area, and removes the gap wall after the shallow trench is formed. , And a post-pull effect is generated to expose the upper edge corners of the shallow trench. Therefore, in the subsequent formation of the lining oxide layer, the corners of the upper edges of the shallow trenches will be more rounded, thereby preventing leakage current. Another object of the present invention is to provide a method for manufacturing a shallow trench isolation structure, which generates a back-drawing effect by using a partition wall formed on the side wall of the opening of the isolation region before the shallow trench is formed. Therefore, the material deposited by the subsequent shallow trench isolation structure will cover an area larger than the upper edge of the shallow trench, and prevent the shallow trench isolation structure and the upper edge of the shallow trench from generating a recessed structure, thereby improving the electrical stability of the device. Another object of the present invention is to provide a shallow trench isolation structure. The paper size is applicable to the Chinese National Standard (CNS) A4 specification (210 X 297 mm). --- 1 --- Order · 1, ------ Γ · Line 7 (Please read the notice on the back and fill in this page first) Printed by the Intellectual Property Bureau Employee Consumer Cooperative of the Ministry of Economic Affairs 515038 A7 --- -B7 V. Description of the invention () The method is to add polycrystalline stone between the pad oxide layer and the silicon nitride layer or the upper silicon oxide layer, for example, undoped polycrystalline silicon. Therefore, in the subsequent formation of the lining oxide layer, when the polycrystalline silicon is exposed to the outside, a lining oxide layer composed of silicon oxide is formed at the same time, which not only makes the pull-back effect more significant, but also increases the outer edge corners of the shallow trench. Smoothness. According to the above-mentioned purpose, the present invention further provides a method for manufacturing a shallow trench isolation structure, which at least includes: providing a substrate; forming a pad oxide layer to cover the substrate; forming a polycrystalline silicon layer covering the pad oxide layer; forming a An upper oxide layer covers the polycrystalline silicon layer, wherein the pad oxide layer, the polycrystalline silicon layer, and the upper oxide layer constitute a composite material layer; the composite material layer is defined to form an opening having a plurality of side walls and approximately expose the substrate; forming a plurality of A spacer formed of silicon nitride is next to these sidewalls; a shallow trench is formed in the substrate, and these spacers are removed to expose the corners of the upper edge of the shallow trench and allow the sidewalls of the composite material layer and the shallow trench to There is a predetermined distance between the edges; forming a lining oxide layer covering the side wall and the substrate of the composite material layer; forming a silicon oxide layer covering the lining oxide layer and the upper oxide layer, and filling the shallow trench; and performing a grinding process, Until the polycrystalline silicon layer and the liner oxide layer are exposed; the polycrystalline silicon layer is removed and the pad oxide layer is exposed; and the pad oxide layer is removed The substrate is exposed. According to the above-mentioned purpose, the present invention further provides a method for manufacturing a shallow trench isolation structure, which at least includes: providing a substrate; forming a pad of oxygen. The paper size is applicable to the Chinese National Standard (CNS) A4 specification (210 X 297). Mm) ------- M --- 0II I * ---- (Please read the notes on the back before filling this page) Order ------ T-line J, 515038 A7 V. Description of the invention () Covering the substrate; forming a polycrystalline silicon layer covering the pad oxide layer; forming a silicon nitride layer covering the polycrystalline silicon layer, wherein the pad oxide layer, the polycrystalline silicon layer, and the silicon nitride layer constitute a composite material layer; defining composite A layer of material to form an opening with a plurality of side walls and to expose the substrate approximately; to form a plurality of spacers composed of silicon oxide beside the side walls; to form a shallow trench in the substrate; to remove these spacers to approximately The corners of the upper edge of the shallow trench are exposed, and a predetermined distance is formed between the sidewall of the hafnium oxide layer and the upper edge of the shallow trench; a liner oxide layer is formed to cover the polycrystalline silicon layer, the pad oxide layer, and the substrate; Cutting layer covers oxide layer and nitrogen Silicon layer and fill the shallow trenches; perform a grinding process until approximately the silicon nitride layer and the lining oxide layer are exposed; remove the nitrided layer and approximately expose a portion of the polycrystalline silicon layer and the lining oxide layer; Removing the polycrystalline silicon layer and exposing the pad oxide layer; and removing the pad oxide layer and exposing the substrate approximately. Brief explanation of the diagram ... Listed with supplementary Chinese characters. After the civilization, the following goes: Put the examples in practice, and explain the detailed details of the better illustrations and make more drawings ------ ^ --- ^ 1 --- Installation -------- Order i, ----- T · line 7 (Please read the precautions on the back before filling this page) Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs The structure of the separation from the canal trench is shown in Figure 7; Figure 1 shows the example of the flow of the first intentional display system. Shi Shijia compares the first and the first. Section 18 of the sectional view to section 8 of the second section of the drawing are shallow. The paper size is applicable to the Chinese National Standard (CNS) A4 (210 X 297 mm) 515038 A7 B7 V. Description of the invention () FIG. 26 is a schematic cross-sectional flowchart of a shallow trench isolation structure for manufacturing a second preferred embodiment of the present invention. Printed reference number printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs: 100 substrate 102 pad oxide layer 104 silicon nitride layer 106 photoresist 108 opening in the isolation area 110 shallow trench 112 lined with oxide layer 114 silicon oxide layer 116 shallow trench isolation Structure 118 width 120 width 122 intersection angle 124 recessed structure 200 substrate 202 pad oxide layer 204 polycrystalline silicon layer 206 upper oxide layer 207 composite material layer 208 open π 209 sidewall 210 isolation zone 212 silicon nitride layer 214 gap wall 216 shallow trench 217 preset Distance 218 Corner 220 Lined with oxide layer 221 Width 222 Silicon oxide layer 223 Width 224 Intersection angle 226 Shallow trench isolation structure 300 Substrate 302 Pad oxide layer 304 Polycrystalline silicon layer 306 Silicon nitride layer 307 Composite material layer 308 Open σ ----- -------- Install -------- II -------- ^ .- line * 1 «>»-(Please read the precautions on the back before filling this page) This paper size applies to China National Standard (CNS) A4 (210 X 297 mm) ) Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs 515038 A7 B7 V. Description of the invention () 309 Isolation area 3 10 Side wall 3 11 Space wall 3 12 Shallow ditch 3 14 Depression area 316 Corner 3 17 Preset distance 318 Lining oxide layer 320 silicon oxide layer 322 width 324 width 326 width 328 Shallow trench isolation structure Detailed description of the invention: The present invention discloses a manufacturing method of a shallow trench isolation structure, which uses a spacer structure to achieve post-drawing effect, thereby increasing the upper edge of the shallow trench. The smoothness of the corners and the avoidance of the depression structure between the shallow trench isolation structure and the shallow trench. In order to make the description of the present invention more detailed and complete, reference may be made to the following descriptions in conjunction with the diagrams of FIGS. 8 to 26. For the forming process of the shallow trench isolation structure of the first preferred embodiment of the present invention, please refer to the cross-sectional schematic diagrams shown in FIGS. 8 to 18. First, a substrate 200 is provided, and the material is, for example, silicon. The oxidation process forms a layer of silicon oxide with a thickness between about 150 A and about 200 A to cover the substrate 200 as the pad oxide layer 202. Then, for example, a low pressure chemical vapor deposition method (Low Pressure CVD; LPCVD) is used to deposit a polycrystalline silicon layer 204 having a thickness between about 1000 A and about 2000 A, and the pad oxide layer 202 is covered. The paper & degree is in accordance with Chinese National Standards (CNS) A4 size (210 X 297 mm) ------------- Installation -------- Order -------- Γ · Line τ (Please read the Note: Please fill in this page again.) Printed by the Intellectual Property Bureau of the Ministry of Economic Affairs, Consumer Cooperatives, 515038. 5. Description of the invention () The material of the second polycrystalline dream layer 204 can be, for example, undoped polycrystalline slab, and the ions of the heteropoly In the subsequent thermal process, the h substrate is ⑽, and the ratio of electrical stability is 1: 1. After the deposition of the polycrystalline silicon layer 204, an oxidation process is performed on the 222 A a 204 to form a silicon oxide layer having a thickness between about 500 A and about 300 Å. The poly silicon layer 204 i is used as an upper layer. 2 206, wherein the pad oxide layer 202, the polycrystalline silicon layer 204, and the upper oxide layer 206 constitute a composite material layer 207 to form a structure. Next, the composite material layer 207 is defined by, for example, lithography and etching processes, and the substrate 200 is exposed to define an isolation region 21o, and an opening 208 is formed in the composite material layer 207, where the opening 2 〇8 has a structure having a plurality of side walls as shown in FIG. After the definition of the isolation region 21 is completed, a silicon nitride layer 2 with a thickness of between about 2000 A and about 500 A is conformally deposited using, for example, a low pressure chemical vapor deposition method, covering the substrate 200. , The sidewall 209 and the upper oxide layer 206 to form a structure as shown in FIG. 10. Subsequently, using, for example, an anisotropic etching technique, and the upper oxide layer 206 is the etching end point, the silicon nitride layer 212 is etched back to form a plurality of spacers 214 beside the side wall 209. After the structure of the barrier ribs 2 and 4 is formed, the barrier ribs 214 composed of the upper oxide layer 206 and the silicon nitride are used as a hard mask by using a dry type engraving method, for example, and anisotropic etching is performed on the substrate 200. Form shallow trenches 2 1 6 of the desired depth and shape. 10 This paper size applies to China National Standard (CNS) A4 specification (2i〇x 297 public meals ------ Lin --- ^ ---- installed -------- order ----- --Ί 线 Γ (Please read the notes on the back before filling in this page) 515038 A7

^ '本發明在定義淺溝渠2 1 6時,可利用現有之J; 層氧化層2 0 6以及間隙辟2 1 4 A雜置复 、 糸土 2 1 4為硬罩幕,而不需使用額夕| 的光阻作為硬覃蓋。m i 硬罩幕。因此,不但能簡化製程步驟,且能遲 經濟部智慧財產局員工消費合作社印製 免使用光阻所造成的t八工,D r 4珉的间刀子(Polymer)殘留,而提升蝕刻f 程的均勻度’進而防止所需淺溝渠216形狀產生變形,更 進一步地降低製程負擔。 當淺溝渠216形成後’利用例如濕式蝕刻法,並例 以磷酸(h3p〇4)/過氧化氫(h2〇2)等混合溶液為姓刻劑,移 間隙壁214,而暴露出淺溝渠216上緣之邊角218,並使 複合材料層207之側壁209與淺溝渠216之上緣之間具 一預設距離217,而形成後拉的效果,如第13圖所示之 構。接著,利用例如熱氧化之爐管製程,在溫度介於約工〇 °C與約1100°C之間的環境下,使得基材200以及多晶矽 204暴露之表面因受熱而形成氧化矽,進而形成襯氧化 220覆蓋在複合材料層207之側壁、隔離區210之一部份 以及淺溝渠216上,其中襯氧化層22〇厚度介於約2〇〇a _ 約600A之-間,且多晶矽層204側壁旁之襯氧化層22〇的> 度較厚。此時,由於基材200以及多晶矽層204之暴露; 面氧化,因此使得淺溝渠2 1 6上緣之邊角2 1 8變得更加j 圓滑,如第1 4圖所示。隨著淺溝渠2丨6上緣之邊角2丨8 [ 滑程度的提升,可避免元件產生漏電流現象。 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公釐) ^ T ^-------------Ί 7- (請先閱讀背面之注意事項再填冩本頁) 515038 A7 B7 五、發明說明() 隨後,請參照第1 5圖,利用例如高密度電漿化學氣相 沉積法沉積氧化矽層222,填滿淺溝渠2 1 6,並覆蓋在襯氧 化層220以及上層氧化層206上。再利用例如化學機械研 磨製程,直至約暴露出多晶矽層204以及襯氧化層220, 以去除多餘之氧化矽,而留下位於淺溝渠2 1 6内之氧化 矽,形成之結構如第1 6圖所示’其中研磨製程之研磨終點 可藉由例如時間的設定或選用對多晶石夕與氧化矽不具有選 擇比(Selectivity)之研磨漿(Slurry)來控制。 接著’利用例如#刻方式,以對多晶石夕與氧化石夕具有 咼選擇比之水/氫氧化銨(NHaOH)/過氧化氫等混合溶液為 钱刻劑’移除多晶石夕層204’並暴露出塾氧化層202,而形 成如第1 7圖所示之結構。再利用例如蝕刻法,並例如以氫 氟酸為蝕刻劑來移除墊氧化層202,而形成所需之淺溝渠 隔離結構226,如第18圖所示。 ------^---dl!裝--------訂- (請先閱讀背面之注意事項再填寫本頁) 經濟部智慧財產局員工消費合作社印製 由第17圖可知,由於位於基材200上方之氧化石夕層222 加上襯氧化層220之寬度221大於淺溝渠2丨6之上緣的寬 度22〇,因此易匯聚在概氧化層220與塾氧化層202之交 角2 2 4的鼠氟酸等钱刻劑,並不會在淺溝渠2 1 6與淺溝渠 隔離結構226之間產生如同習知之凹陷結構,而能避免影 響元件的電性穩定度。 12 本紙張又度適用中國國家標準(CNS)A4規格(210 X 297公餐) 線 515038 經濟部智慧財產局員工消費合作社印製 A7 五、發明說明( 本發明之第二較佳實施例之淺溝渠隔離 程請參照第19圖至第26圖馎之成型流 口至弟26圖所繪示的剖面示意圖。 在材料例如為石夕之美姑3 π Θ ’之基材’ i,利用例如熱 一層氧切覆蓋在基材3⑽上 ^形成 302,盆士轨〆 此層巩化矽為墊氧化層 ,'中塾氧化層302之厚度介於約150A與約200入之 用例如低厂堅化學氣相沉積法,沉積多晶…。4 覆盍在塾氣化層302上,其中多晶石夕層3〇4之厚 3 00A與約ιοοοΑ之間,且多曰 、力 夕 之間且夕日日矽層304之材料可例如為未 二之夕晶矽’以避免所摻雜之離子在後續的熱製程中滲 入基材300,而對元件電性的穩定度造成影響。當多晶梦 二沉積 '成後,利用例如低壓化學氣相沉積法沉:氮 石曰3 06覆盍在多晶石夕層3〇4上,其中氮化秒層$⑽之 ΓΓ約觸人與約购A之間,且塾氧化層如、多 曰B矽層304、以及氮化矽層3〇6構成複合材料層…。 接著’利用例如微影舆#刻製程定義複合材料層, 而在複合材料層307中形成開α 3〇8,且約暴露曰出基材 3〇〇,以定義出隔離區3G9,其中開D3Q8具有複數個側壁 310’而形成如第19圖所示之結構。定義出隔離區則之 後,利用例如低壓化學氣相沉積法或電㈣益化學氣相沉 積法(Plasma Enhanced CVD; PECVD)共形沉積厚度介於約 200A與約500A之間的氧化矽層(未繪示), 300、側壁310、以及氮化矽層3〇6上。 土 1 上再利用例如非等向 ^ ^----^-------------Ί Μ (請先閱讀背面之注意事項再填寫本頁) 13 515038 A7 B7 經濟部智慧財產局員工消費合作社印製 五、發明說明( 性蝕刻技術,並以氮化矽層3 06為蝕刻終點,回蝕氧化矽 層以在開口 3 〇 8之側壁3丨〇旁形成複數個間隙壁3 1 1,而 形成如第20圖所示之結構。完成間隙壁3 1 1結構之後,利 用例如乾式蝕刻技術,並以氮化矽層3 〇6以及氧化矽所組 成之間隙® 3 1 1為硬罩幕,進行非等向性蝕刻,而在基材 300中形成具有所需深度及形狀的淺溝渠312,如第21 所示。 圍 進行本發明之淺溝渠312的定義時,不需使用額外的 光阻作為硬罩幕,現有結構之氮化矽層3 〇6以及間隙壁3 η 即具有硬罩幕之功用。目此,可簡化製程步驟,並可避免 使用光阻所導致之高分子殘留,不但能降低製程負擔,並 月匕提冋蝕刻製程的均勻度,進而能防止所需之淺溝渠3 1 2 的形狀產生變形。 當具適當深度及形狀之淺溝渠3丨2成型後,利用例如 濕式蝕刻法,並例如以氫氟酸為蝕刻劑,移除氧化矽所組 成之間隙壁3 1 1,在此同時一部份之墊氧化層3 02也會一 併被移除’而在複合材料層3 〇 7中形成複數個凹陷區3丨4, 且暴露出淺溝渠3 1 2上緣之邊角3 1 6,並使得墊氧化層3 〇2 之側壁與淺溝渠3 1 2之上緣之間具有一預設距離3 1 7,而 形成後拉的效果,而形成如第22圖所示之結構。 本纸張尺度適用中國國家標準(CNS)A4規格(210 X 297公釐) -------7---7----裝--------訂 ------Ί線Γ (請先閱讀背面之注意事項再填寫本頁) 515038 經濟部智慧財產局員工消費合作社印製 A7 五、發明說明( 隨後’利用例如埶量化、隨发 …、虱化之爐s製私,在溫度介於約1000 C與約1 1 0 0 C之間的環境下,使得 衣兄r 1之侍基材J 0 〇以及多晶矽層 304暴露之表面因受執而备外太 又熟而乳化產生一層氧化矽,覆蓋在墊 氧化層3 0 2之側壁、多晶# | ^ 日日/層j〇4之側壁、隔離區3〇9之 一部份、以及淺溝渠 m , , L, a ^ 1 -上 此層氧化矽即為襯氧化層 3 18,其中襯氧化層318犀声介於的A a , 予度;I於約200Α與約600Α之間。 在襯氧化層318形成的问^主 山# # μ 風的同時,由於基材300以及多晶矽層 304之暴露表面產/ψ氧乂μ 生乳化作用,因此使得淺溝渠3 i 2上緣 之邊角316變得更加地圓滑, U 111⑺ 如弟2j)圖所不。當淺溝渠 3 1 2上緣之邊角〕1 6的圓、、普链存但止 ,,,, 幻_ α私度提升,會減少兀件的漏電 流現象,而增加元件的可靠度。 此時’便可利用例如高密度電漿化學氣相沉積法沉積 隔離用之氧化碎層3 2 〇,使氧化矽層3 2 〇填滿淺溝渠3丨2, 並覆蓋在襯氧化層3 1 8以及氮化矽層3 〇6上。再利用例如 化學機械研磨製程,直至約暴露出氮化矽層3〇6,以去除 氮化矽層3 06上多餘之氧化矽,而留下位於淺溝渠3 1 2内 之氧化矽,如第24圖所示。 接著’利用例如姓刻方式,以例如水/磷酸/過氧化氫等 混合 >谷液為姓刻劑,移除氮化矽層3 〇 6,而暴露出多晶矽 層3 04以及一部份之襯氧化層3丨8。再利用例如蝕刻方式, 並例如以對多晶石夕與氧化矽具有高選擇比之水/氫氧化銨/ 15 本紙張尺度適用中國國家標準(CNS)A4規格(21^¾公§- -----丨^-------裝--------訂 *.|-----*--線 Μ (請先閱讀背面之注意事項再填寫本頁) A7^ 'When defining shallow trench 2 16 in the present invention, the existing J can be used; the oxide layer 2 0 6 and the gap 2 2 4 A hybrid complex, and the earth 2 1 4 are hard covers, without the use of Forehead | Photoresistor as a hard cover. m i hard cover. Therefore, not only the process steps can be simplified, but also the t-worker and D r 4 珉 residues caused by the use of photoresist can be printed by the consumer cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs, which can improve the etching process. The 'uniformity' further prevents the shape of the desired shallow trench 216 from being deformed, and further reduces the process load. When the shallow trench 216 is formed, for example, a wet etching method is used, and a mixed solution such as phosphoric acid (h3po4) / hydrogen peroxide (h2O2) is used as an etching agent, and the spacer 214 is moved to expose the shallow trench. The corner 218 of the upper edge of 216 makes a predetermined distance 217 between the side wall 209 of the composite material layer 207 and the upper edge of the shallow trench 216, so as to form a back-drawing effect, as shown in FIG. 13. Then, using a furnace oxidation process such as thermal oxidation, in an environment with a temperature between about 0 ° C and about 1100 ° C, the exposed surfaces of the substrate 200 and the polycrystalline silicon 204 are heated to form silicon oxide, thereby forming The lining oxide 220 covers the sidewall of the composite material layer 207, a part of the isolation region 210, and the shallow trench 216. The thickness of the lining oxide layer 22 is between about 200a and 600A, and the polycrystalline silicon layer 204 The > degree of the lining oxide layer 22o next to the sidewall is thick. At this time, due to the exposed surface of the substrate 200 and the polycrystalline silicon layer 204, the corner 2 1 8 of the upper edge of the shallow trench 2 1 6 becomes smoother, as shown in FIG. 14. As the corner 2 丨 8 [of the upper edge of the shallow trench 2 丨 6 increases, the leakage current of the component can be avoided. This paper size is in accordance with China National Standard (CNS) A4 (210 X 297 mm) ^ T ^ ------------- Ί 7- (Please read the notes on the back before filling in the transcript Page) 515038 A7 B7 5. Description of the invention () Then, referring to FIG. 15, a silicon oxide layer 222 is deposited using, for example, a high-density plasma chemical vapor deposition method, filling the shallow trench 2 1 6, and covering the liner oxide. On the layer 220 and the upper oxide layer 206. Then, a chemical mechanical polishing process is used until the polycrystalline silicon layer 204 and the lining oxide layer 220 are exposed to remove excess silicon oxide, leaving silicon oxide in the shallow trench 2 1 6, and the structure formed is as shown in FIG. 16 As shown in the figure, the polishing end point of the grinding process can be controlled by, for example, setting the time or selecting a slurry having no selectivity for polycrystalline stone and silicon oxide. Next, 'the polycrystalline stone layer is removed by using, for example, #etching method, using a mixed solution of water / ammonium hydroxide (NHaOH) / hydrogen peroxide with a ratio of 咼 to polycrystalline stone and oxidized stone as a money engraving agent'. 204 'and expose the hafnium oxide layer 202 to form a structure as shown in FIG. 17. Then, for example, an etching method is used, and for example, hydrofluoric acid is used as an etchant to remove the pad oxide layer 202 to form a desired shallow trench isolation structure 226, as shown in FIG. ------ ^ --- dl! Install -------- Order- (Please read the notes on the back before filling out this page) Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs It can be known that since the width 221 of the oxidized stone layer 222 and the lining oxide layer 220 above the substrate 200 is larger than the width 22 of the upper edge of the shallow trench 2 丨 6, it is easy to converge on the approximate oxide layer 220 and the hafnium oxide layer 202 Money engraving agents such as fluoric acid at a crossing angle of 2 2 4 will not generate a conventional depression structure between the shallow trench 2 16 and the shallow trench isolation structure 226, and can avoid affecting the electrical stability of the device. 12 This paper is again applicable to the Chinese National Standard (CNS) A4 specification (210 X 297 meals) line 515038 Printed by the Consumers ’Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs A7 V. Description of the invention (the second preferred embodiment of the invention For the trench isolation process, please refer to the cross-sectional diagrams shown in Figure 19 to Figure 26 (i.e., the molding orifices to Figure 26). For the material such as Shi Xi's beauty girl 3 π Θ 'substrate' i, use, for example, one layer of heat Oxygen cut covers the substrate 3⑽ to form 302. This layer of sclerosis silicon is a pad oxide layer. The thickness of the intermediate oxide layer 302 is between about 150A and about 200. For example, low chemical gas Phase deposition method, depositing polycrystalline ... 4 overlaid on the tritium gasification layer 302, in which the polycrystalline layer is between 300A and 300m thick, and more than 30% thick The material of the silicon layer 304 may be, for example, crystalline silicon, which prevents the doped ions from penetrating into the substrate 300 in the subsequent thermal process, which affects the electrical stability of the device. When polycrystalline silicon is deposited 'After the completion, using, for example, low pressure chemical vapor deposition: On the spar evening layer 304, ΓΓ of the nitrided second layer is approximately between the contact and the purchase of A, and the oxide layer is composed of a silicon layer 304, a silicon layer 304, and a silicon nitride layer 306. Composite material layer ... Then, a composite material layer is defined by, for example, a micro-image processing process, and an opening α 3 08 is formed in the composite material layer 307, and a substrate 300 is exposed to define an isolation area. 3G9, where D3Q8 has a plurality of sidewalls 310 'to form the structure shown in Figure 19. After the isolation area is defined, for example, low pressure chemical vapor deposition or electro-chemical chemical vapor deposition (Plasma Enhanced CVD) is used. PECVD) conformally deposited on a silicon oxide layer (not shown) with a thickness between about 200A and about 500A, 300, sidewall 310, and silicon nitride layer 306. Reuse on soil 1 such as anisotropic ^ ^ ---- ^ ------------- Ί Μ (Please read the notes on the back before filling out this page) 13 515038 A7 B7 Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs Description of the invention (Sexual etching technology, with silicon nitride layer 3 06 as the end point of etching, etch back the silicon oxide layer to the side wall 3 of the opening 3 08 A plurality of spacers 3 1 1 are formed next to the structure shown in FIG. 20. After the structure of the spacers 3 1 1 is completed, for example, a dry etching technique is used, and a silicon nitride layer 3 06 and silicon oxide are used. Gap ® 3 1 1 is a hard mask, which is anisotropically etched, and a shallow trench 312 having a desired depth and shape is formed in the substrate 300, as shown in Figure 21. The shallow trench 312 surrounding the present invention is performed. In the definition, there is no need to use an additional photoresist as a hard cover. The existing structure of the silicon nitride layer 306 and the spacer 3 η has the function of a hard cover. For this reason, the process steps can be simplified, and the use of polymer residues caused by photoresist can be avoided, which can not only reduce the process burden, but also improve the uniformity of the etching process, and can prevent the required shallow trenches 3 1 2 Deformed shape. After the shallow trenches 3 and 2 having a proper depth and shape are formed, for example, a wet etching method is used, and for example, hydrofluoric acid is used as an etchant to remove the partition wall 3 1 1 composed of silicon oxide. The part of the pad oxide layer 3 02 will also be removed together, and a plurality of recessed areas 3 丨 4 are formed in the composite material layer 307, and the corner 3 1 6 of the upper edge of the shallow trench 3 1 2 is exposed. A predetermined distance 3 1 7 is formed between the sidewall of the pad oxide layer 3 02 and the upper edge of the shallow trench 3 1 2 to form a post-drawing effect, and a structure as shown in FIG. 22 is formed. This paper size applies to China National Standard (CNS) A4 specification (210 X 297 mm) ------- 7 --- 7 ---- installation -------- order ---- --Ί 线 Γ (Please read the notes on the back before filling this page) 515038 Printed by A7, Consumer Cooperatives, Intellectual Property Bureau, Ministry of Economic Affairs V. Invention Description Under the environment of temperature between about 1000 C and about 1 1 0 0 C, the exposed surface of the clothing substrate J 0 〇 and the polycrystalline silicon layer 304 are subject to external protection due to enforcement. It matures and emulsifies to produce a layer of silicon oxide, covering the sidewalls of the pad oxide layer 302, the polycrystalline # | ^ day / layer j04 side wall, a part of the isolation area 309, and the shallow trench m, , L, a ^ 1-The upper layer of silicon oxide is the lining oxide layer 3 18, in which the lining oxide layer 318 is between A a and I; I is between about 200A and about 600A. In the lining oxide layer 318 的 问 ^ 主 山 # # μ At the same time, due to the emulsification of the exposed surface of the substrate 300 and the polycrystalline silicon layer 304, the upper corner 316 of the shallow trench 3 i 2 becomes Even smoother, U 111⑺ As brother 2j) does not. When the angle of the upper edge of the shallow trench 3 1 2] 16 is round, and the general chain exists, the magical degree of alpha will increase, which will reduce the leakage current phenomenon of the component and increase the reliability of the component. At this time, a high-density plasma chemical vapor deposition method can be used to deposit an isolation oxide layer 3 2 0, so that the silicon oxide layer 3 2 0 fills the shallow trench 3 2 and covers the oxide layer 3 1 8 and a silicon nitride layer 306. Then, for example, a chemical mechanical polishing process is used until the silicon nitride layer 306 is exposed to remove excess silicon oxide on the silicon nitride layer 306, and the silicon oxide in the shallow trench 3 1 2 is left, as in the first Figure 24 shows. Then, using a method such as last name engraving, using a mixture of water / phosphoric acid / hydrogen peroxide, etc. > Valley liquid as the last name remover, the silicon nitride layer 306 is removed, and the polycrystalline silicon layer 304 and a part of it are exposed. Lining oxide layer 3 丨 8. Reuse, for example, etching, and for example, water / ammonium hydroxide / 15 which has a high selection ratio for polycrystalline stone and silicon oxide. This paper size is applicable to China National Standard (CNS) A4 specification (21 ^ ¾public §-- --- 丨 ^ ------- install -------- order *. | ----- *-line M (Please read the precautions on the back before filling this page) A7

515038 五、發明說明() 過氧化氫等混合溶液為蝕刻劑,移除多晶矽層3 〇4,並暴 露出塾氧化層302,而形成如第25圖所示之結構。再利用 例如蝕刻法,並例如以氫氟酸為蝕刻劑來移除墊氧化層 3 02,而形成所需之淺溝渠隔離結構328,如第26圖所示曰。 請參照第25圖,在基材300上方,無論是氧化矽層 之寬度322,或是氧化矽層320加上襯氧化層318之寬度 324,皆大於淺溝渠312之上緣的寬度326。因此,用以移 除塾氧化層3 0 2之氫氟酸等蝕刻劑,並不會在淺溝渠3 i 2 與淺溝渠隔離結構328之間產生凹陷結構,而達到提升元 件電性穩定度之目的。 本發明之一優點就是在提供一種淺溝渠隔離結構之製 造方法’其係利用間隙壁來達成後拉的效果,因此可避免 淺溝渠與淺〉冓渠隔離結構之間產生凹陷結構,而提升元件 電性可靠度。 本發明之另一優點就是因為間隙壁所形成的後拉效果 可將淺溝渠上緣之邊角暴露出來,因此在襯氧化層形成 時’淺溝渠上緣之邊角的圓滑度會提高,而防止漏電流的 產生。 本發明之再一優點就是在提供一種淺溝渠隔離結構之 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公釐) mmm mmem memt mmm mmm mrnm mmm mmm mmm mmm mmt · · t n I an n n n^*OJ* n n ϋ n n n n I I if 一 \ ' (請先閱讀背面之注意事項再填寫本頁) 經濟部智慧財產局員工消費合作社印製 515038 A7 B7_ 五、發明說明() 製造方法,其在定義淺溝渠時,可利用上層氧化層及氮化 矽間隙壁,或氮化矽層及氧化矽間隙壁,來當作硬罩幕, 而不需使用額外之光阻。因此,可避免因使用光阻所導致 的高分子殘留,而提高蝕刻製程的均勻度,進而增加製程 穩定度,降低製程負擔。 本發明之再一優點就是在提供一種淺溝渠隔離結構之 製造方法,其在墊氧化層上形成多晶矽層,因此當利用例 如熱氧化製程成長襯氧化層的同時,多晶矽層之裸露的部 分亦會成長一層襯氧化層,而使得後拉的效果更為顯著, 進而提升製程的可靠度。 如熟悉此技術之人員所瞭解的,以上所述僅為本發明 之較佳實施例而已,並非用以限定本發明之申請專利範 圍;凡其它未脫離本發明所揭示之精神下所完成之等效改 變或修飾,均應包含在下述之申請專利範圍内。 ϋ UBi ΛΜΜ§ i t—· n 11 n· I n —9 I · n n I— a— —B_i *1··· m ^ ^ I flu n m n i i I n i · ·矣 * (請先閱讀背面之注意事項再填寫本頁) 經濟部智慧財產局員工消費合作社印製 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公釐)515038 5. Description of the invention () A mixed solution such as hydrogen peroxide is used as an etchant, the polycrystalline silicon layer 300 is removed, and the hafnium oxide layer 302 is exposed to form a structure as shown in FIG. 25. Then, for example, an etching method is used, and for example, hydrofluoric acid is used as an etchant to remove the pad oxide layer 302 to form a desired shallow trench isolation structure 328, as shown in FIG. 26. Please refer to FIG. 25. Above the substrate 300, whether the width 322 of the silicon oxide layer or the width 324 of the silicon oxide layer 320 plus the liner oxide layer 318 is greater than the width 326 of the upper edge of the shallow trench 312. Therefore, the etchant used to remove the hydrofluoric acid such as the hafnium oxide layer 3 2 will not generate a recessed structure between the shallow trench 3 i 2 and the shallow trench isolation structure 328, thereby improving the electrical stability of the device. purpose. One advantage of the present invention is to provide a method for manufacturing a shallow trench isolation structure, which uses a gap wall to achieve a back-drawing effect. Therefore, a recessed structure can be avoided between a shallow trench and a shallow> slug trench isolation structure, and components can be lifted. Electrical reliability. Another advantage of the present invention is that because the back-drawing effect formed by the gap wall can expose the corners of the upper edge of the shallow trench, the smoothness of the corners of the upper edge of the shallow trench will be improved when the liner oxide layer is formed, and Prevent leakage current. Another advantage of the present invention is that the paper size provided for a shallow trench isolation structure is applicable to the Chinese National Standard (CNS) A4 specification (210 X 297 mm) mmm mmem memt mmm mmm mrnm mmm mmm mmm mmm mmt · · tn I an nnn ^ * OJ * nn ϋ nnnn II if a \ '(Please read the precautions on the back before filling this page) Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs 515038 A7 B7_ 5. Description of the invention () Manufacturing method, When defining shallow trenches, the upper oxide layer and the silicon nitride spacer wall, or the silicon nitride layer and the silicon oxide spacer wall can be used as a hard mask without the need for additional photoresist. Therefore, the polymer residue caused by the use of photoresist can be avoided, and the uniformity of the etching process can be improved, thereby increasing the process stability and reducing the process load. Another advantage of the present invention is to provide a method for manufacturing a shallow trench isolation structure, which forms a polycrystalline silicon layer on a pad oxide layer. Therefore, when a liner oxide layer is grown using, for example, a thermal oxidation process, the exposed portion of the polycrystalline silicon layer will also be exposed. Grow a layer of lining oxide layer, so that the effect of post-pulling is more significant, thereby improving the reliability of the process. As will be understood by those familiar with this technology, the above is only a preferred embodiment of the present invention, and is not intended to limit the scope of the patent application for the present invention; all others completed without departing from the spirit disclosed by the present invention, etc. Effective changes or modifications should be included in the scope of patent application described below. Bi UBi ΛΜΜ§ it— · n 11 n · I n —9 I · nn I— a— —B_i * 1 ·· m ^ ^ I flu nmnii I ni · · 矣 * (Please read the precautions on the back before (Fill in this page) Printed on the paper by the Consumers' Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs, the paper size applies to the Chinese National Standard (CNS) A4 (210 X 297 mm)

Claims (1)

515038 A8 B8 C8 D8 經濟部智慧財產局員工消費合作社印製 六、申請專利範圍 1. 一種淺溝渠隔離(STI)結構之製造方法,至少包括: 提供一基材; 形成一墊氧化層覆蓋在該基材上; 形成一多晶石夕層覆蓋在該塾氧化層上; 形成一上層氧化層覆蓋在該多晶矽層上,其中該墊氧 化層、該多晶矽層、以及該上層氧化層構成一複合材料層; 定義該複合材料層而約暴露出該基材,並於該複合材 料層中形成一開口,其中該開口具有複數個側壁; 形成複數個間隙壁位於該些側壁旁; 形成一淺溝渠於該基材中; 移除該些間隙壁,以暴露出該淺溝渠之上緣的複數個 邊角; 形成一襯氧化層覆蓋該複合材料層之該些側壁以及該 基材; 形成一氧化矽層覆蓋該襯氧化層以及該上層氧化層, 並使得該氧化矽層填滿該淺溝渠; 進行一研磨製程,直至約暴露出該多晶矽層以及該襯 氧化層; 移除該多晶矽層,並約暴露出該墊氧化層;以及 移除該墊氧化層,並約暴露出該基材。 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公釐) In HI ϋ n- Bn tl> n· n· i m I · If HI Hi ϋν I n νϋ 訂---------線 -··*s··· (請先閱讀背面之注意事項再填寫本頁) 515038 經濟部智慧財產局員工消費合作社印製 AB B8 C8 D8 f、申請專利範圍 2.如申請專利範圍第1項所述之方法,其中該基材之 材料為$夕。 3 .如申請專利範圍第1項所述之方法,其中形成該塾 氧化層之步驟係利用一熱氧化法。 4 ·如申請專利範圍第1項所述之方法,其中該墊氧化 層之厚度介於約1 5 0 A與約2 0 0 A之間。 5 ·如申請專利範圍第1項所述之方法,其中形成該多 晶矽層之步驟係利用一低壓化學氣相沉積法(LPCVD)。 6. 如申請專利範圍第1項所述之方法,其中該多晶矽 層之厚度介於約1 000A與約2000A之間。 7. 如申請專利範圍第1項所述之方法,其中形成該上 層氧化層之步驟係利用一熱氧化法。 8. 如+請專利範圍第1項所述之方法,其中該上層氧 化層之厚度介於約5 0 0 A與約1 0 0 0 A之間。 9 ·如申請專利範圍第1項所述之方法,其中定義該複 合材料層之步驟係利用一微影與蝕刻製程。 19 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公釐) -------------裝·-------訂·--------線 秦 * - (請先閱讀背面之注意事項再填寫本頁) 515038 經濟部智慧財產局員工消費合作社印製 A8 B8 C8 D8 、申請專利範圍 1 〇.如申請專利範圍第1項所述之方法,其中形成該些 間隙壁之步驟更包括共形沉積一氮化矽層。 1 1 .如申請專利範圍第1 0項所述之方法,其中共形沉 積該氮化矽層之步驟係利用一低壓化學氣相沉積法。 1 2.如申請專利範圍第1 0項所述之方法,其中形成該 些間隙壁之步驟更包括定義該氮化矽層。 1 3.如申請專利範圍第1 0項所述之方法,其中該氮化 矽層之厚度介於約200A與約500A之間。 1 4.如申請專利範圍第1項所述之方法,其中該些間隙 壁之材料為氮化矽。 1 5.如申請專利範圍第1項所述之方法,其中形成該淺 溝渠之步驟更包括以該上層氧化層以及該些間隙壁為一硬 罩幕。_ 1 6.如申請專利範圍第1項所述之方法,其中形成該淺 溝渠之步驟係利用一微影與蝕刻製程。 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公t ) W τ n an n m flu Mmm9 i n fn i n aa§ I ^ · m n If n I m m-· f— n Hi nt n HI n I (請先閱讀背面之注意事項再填寫本頁) 515038 經濟部智慧財產局員工消費合作社印製 A8 B8 C8 D8 、申請專利範圍 1 7 ·如申請專利範圍第1項所述之方法,其中移除該些 間隙壁之步驟所採用之蝕刻劑至少包括磷酸(H3PO4)以及 過氧化氫(H2〇2)。 1 8 ·如申請專利範圍第1項所述之方法,其中形成該襯 氧化層之步驟係利用一熱氧化製程。 1 9 ·如申請專利範圍第1項所述之方法,其中形成該襯 氧化層之步驟之溫度係控制在介於約 1 000°C與約1 100°C 之間。 2 0 ·如申請專利範圍第1項所述之方法,其中該襯氧化 層之厚度介於約200A與約600A之間。 2 1.如申請專利範圍第1項所述之方法,其中形成該氧 化矽層之步驟係利用一高密度電漿化學氣相沉積法 (HDPCVD)。 22.如 > 請專利範圍第1項所述之方法,其中進行該研 磨製程之步驟係利用一化學機械研磨法(CMP)。 23 .如申請專利範圍第1項所述之方法,其中移除該多 晶矽層之步驟所採用之蝕刻劑至少包括水、氫氧化銨 21 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公釐) ---------------------訂.-------I *5^ *»* (請先閱讀背面之注意事項再填寫本頁) 515038 經濟部智慧財產局員工消費合作社印製 A8 B8 C8 D8 t、申請專利範圍 (NH4〇H)、以及過氧化氫。 2 4.如申請專利範圍第1項所述之方法,其中移除該墊 氧化層之步驟所採用之蝕刻劑為氫氟酸。 25. —種淺溝渠隔離(STI)結構之製造方法,至少包 括: 提供一基材; 形成一墊氧化層覆蓋在該基材上; 形成一多晶梦層覆蓋在該墊氧化層上; 形成一氮化矽層覆蓋在該多晶矽層上,其中該墊氧化 層、該多晶石夕層、以及該氮化石夕層構成一複合材料層; 定義該複合材料層而約暴露出該基材,並於該複合材 料層中形成一開口 ,其中該開口具有複數個側壁; 形成複數個間隙壁位於該些側壁旁; 形成一淺溝渠於該基材中; 移除該些間隙壁,以暴露出該淺溝渠之上緣的複數個 邊角; 形成一襯氧化層覆蓋該多晶矽層之側壁、該墊氧化層 之側壁以及該基材; 形成一氧化矽層覆蓋該襯氧化層以及該氮化矽層,並 使得該氧化矽層填滿該淺溝渠; 進行一研磨製程,直至約暴露出該氮化矽層; 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公釐) - -------* ---------1^ ---------"5^ * » \ # (請先閱讀背面之注意事項再填寫本頁) 515038 經濟部智慧財產局員工消費合作社印制衣 A8 B8 C8 D8 f、申請專利範圍 移除該氮化矽層,並約暴露出該多晶矽層以及該襯氧 化層之一部份; 移除該多晶矽層,並約暴露出該墊氧化層;以及 移除該墊氧化層,並約暴露出該基材。 2 6.如申請專利範圍第25項所述之方法,其中該基材 之材料為矽。 2 7.如申請專利範圍第25項所述之方法,其中形成該 墊氧化層之步驟係利用一熱氧化法。 2 8.如申請專利範圍第25項所述之方法,其中該墊氧 化層之厚度介於約150A與約200A之間。 2 9.如申請專利範圍第25項所述之方法,其中形成該 多晶矽層之步驟係利用一低壓化學氣相沉積法。 3 〇.如申請專利範圍第2 5項所述之方法,其中該多晶 矽層之厚度介於約300A與約1 000A之間。 3 1.如申請專利範圍第25項所述之方法,其中形成該 氮化矽層之步驟係利用一低壓化學氣相沉積法。 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公釐) i m flu emamt 1 «ϋ SI HI an flu tn an 1 a I ϋ US flu n I (n 一.I «an n ·βϋ Bn n In naa I (請先閱讀背面之注意事項再填寫本頁) 經濟部智慧財產局員工消費合作社印製 515038 A8 B8 C8 D8 f、申請專利範圍 3 2.如申請專利範圍第2 5項所述之方法,其中該氮化 矽層之厚度介於約1 0 0 0 A與約2 0 0 0人之間。 3 3.如申請專利範圍第2 5項所述之方法,其中定義該 複合材料層之步驟係利用一微影與蝕刻製程。 3 4.如申請專利範圍第2 5項所述之方法,其中該些間 隙壁之材料為氧化矽。 35.如申請專利範圍第25項所述之方法,其中形成該 些間隙壁之步驟更包括共形沉積一氧化矽層。 3 6.如申請專利範圍第3 5項所述之方法,其中共形沉 積該氧化矽層之步驟係利用一低壓化學氣相沉積法。 3 7.如申請專利範圍第3 5項所述之方法,其中共形沉 積該氧化矽層之步驟係利用一電漿增益化學氣相沉積法 (PECVD)。 3 8.如申請專利範圍第3 5項所述之方法,其中形成該 些間隙壁之步驟更包括定義該氧化矽層。 3 9.如申請專利範圍第3 5項所述之方法,其中該氧化 24 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公釐) n m i an n n 1 n νϋ I l MMmt I 」M/ _ · m m fen i l In I— J I n tmt n n n ·1 n I un^口 * . ... * (請先閱讀背面之注意事項再填寫本頁) 經濟部智慧財產局員工消費合作社印製 515038 A8 B8 C8 D8 f、申請專利範圍 矽層之厚度介於約200A與約500A之間。 4 0.如申請專利範圍第2 5項所述之方法,其令形成該 淺溝渠之步驟更包括以該氮化矽層以及該些間隙壁為一硬 罩幕。 4 1 ·如申請專利範圍第2 5項所述之方法,其中形成該 淺溝渠之步驟係利用一微影與蝕刻製程。 42 ·如申請專利範圍第2 5項所述之方法,其中移除該 些間隙壁之步驟係採用氫氟酸。 43 .如申請專利範圍第25項所述之方法,其中形成該 襯氧化層之步驟係利用一熱氧化製程。 44. 如申請專利範圍第25項所述之方法,其中形成該 襯氧化層之步驟之溫度係控制在介於約1 000 °C與約1 100 t之間。 45. 如申請專利範圍第25項所述之方法,其中該襯氧 化層之厚度介於約200A與約600A之間。 4 6.如申請專利範圍第25項所述之方法,其中形成該 25 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公釐) II «^1 i am i l 11 —I. —1 Hi HI i I · I ja m I— n VK -in 一口、I fi i —1· i n Hi n I * , N , (請先閱讀背面之注意事項再填寫本頁) 經濟部智慧財產局員工消費合作社印釗衣 515038 A8 B8 C8 D8 t、申請專利範圍 氧化矽層之步驟係利用一高密度電漿化學氣相沉積法。 4 7 ·如申請專利範圍第2 5項所述之方法,其中進行該 研磨製程之步驟係利用一化學機械研磨法。 4 8 ·如申請專利範圍第2 5項所述之方法,其中移除該 氮化矽層之步驟所採用之蝕刻劑至少包括水、磷酸、以及 過氧化氫。 4 9.如申請專利範圍第25項所述之方法,其中移除該 多晶矽層之步驟所採用之蝕刻劑至少包括水、氫氧化銨、 以及過氧化氫。 5 0.如申請專利範圍第2 5項所述之方法,其中移除該 墊氧化層之步驟所採用之蝕刻劑為氫氟酸。 5 1. —種淺溝渠隔離(STI)結構之製造方法,至少包 括: 提供/基材; 形成一塾氧化層覆蓋在該基材上; 形成一氮化矽層覆蓋在該墊氧化層上,其中該墊氧化 層以及該氮化矽層構成一複合材料層; 定義該複合材料層而約暴露出該基材,並於該複合材 26 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公釐) -------------裝·-------訂·:--------線 一, \ r (請先閱讀背面之注意事項再填寫本頁) 515038 ABB8C8D8 經濟部智慧財產局員工消費合作社印製 、申請專利範圍 料層中形成一開口 ,其中該開口具有複數個側壁; 形成複數個間隙壁位於該些側壁旁; 形成一淺溝渠於該基材中; 移除該些間隙壁,以暴露出該淺溝渠之上緣的複數個 邊角; 形成一襯氧化層覆蓋該墊氧化層之側壁以及該基材; 形成一氧化矽層覆蓋該襯氧化層以及該氮化矽層,並 使得該氧化矽層填滿該淺溝渠; 進行一研磨製程,直至約暴露出該氮化矽層; 移除該氮化矽層,並約暴露出該襯氧化層之一部份以 及該墊氧化層;以及 移除該墊氧化層,並約暴露出該基材。 5 2 ·如申請專利範圍第5 1項所述之方法,其中形成該 墊氧化層之步驟係利用一熱氧化法。 5 3.如申請專利範圍第51項所述之方法,其中形成該 氮化矽層之步驟係利用一低壓化學氣相沉積法。 5 4.如申請專利範圍第5 1項所述之方法,其中形成該 些間隙壁之步驟更包括共形沉積一氧化矽層。 55·如申請專利範圍第54項所述之方法,其中共形沉 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公釐) m til n —ai n n K— In I HI n I 0 n —J 2·— I— n« fi m 訂---------線 *·-** (請先閱讀背面之注意事項再填寫本頁) 515038 經濟部智慧財產局員工消費合作社印制衣 A8 B8 C8 D8 、申請專利範圍 積該氧化叾夕層之步驟係利用一低壓化學氣相沉積法。 5 6.如申請專利範圍第5 4項所述之方法,其中共形沉 積該氧化矽層之步驟係利用一電漿增益化學氣相沉積法。 5 7.如申請專利範圍第5 1項所述之方法,其中形成該 淺溝渠之步驟更包括以該氮化矽層以及該些間隙壁為一硬 罩幕。 5 8.如申請專利範圍第5 1項所述之方法,其中移除該 些間隙壁之步驟係採用氫氟酸。 5 9.如申請專利範圍第5 1項所述之方法,其中形成該 襯氧化層之步驟係利用一熱氧化製程。 6 0.如申請專利範圍第5 1項所述之方法,其中形成該 襯氧化層之步驟之溫度係控制在介於約1 000°C與約1 1〇〇 °C之間。 6 1.如申請專利範圍第5 1項所述之方法,其中形成該 氧化矽層之步驟係利用一高密度電漿化學氣相沉積法。 62.如申請專利範圍第5 1項所述之方法,其中進行該 28 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公釐) i^i nf HI In m flavi 1·1 IV— ί i In n I · n Hi fi 1— m It n 一I flu n 11 n mmi tmt In I 一鬌 * (請先閱讀背面之注意事項再填寫本頁) 515038 A8 B8 C8 D8 、申請專利範圍 研磨製程之步驟係利用一化學機械研磨法。 第 圍 範 利 專 請 申 如 法水 方括 之包 述少 所至 項劑 51刻 蝕 之 用 採 所 驟 步 之。 層氫 63矽化 化氧 氮過 該及 除以 移、 中酸 其磷 氧 塾 如 . 層 64化 第 圍 範 利 專 請 申 採 所 驟 步 之 法 。 方酸 之氟 述氩 所為 項劑 11 ίηΊ 5 安 # 之 用 該 除 移 中 其 ------1---------- Μ » (請先閱讀背面之注意事項再填寫本頁) 訂: .線- 經濟部智慧財產局員工消費合作社印製 29 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公釐)515038 A8 B8 C8 D8 Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs 6. Application for patent scope 1. A method for manufacturing a shallow trench isolation (STI) structure, including at least: providing a substrate; forming a pad oxide layer covering the On the substrate; forming a polycrystalline stone layer covering the hafnium oxide layer; forming an upper oxide layer covering the polycrystalline silicon layer, wherein the pad oxide layer, the polycrystalline silicon layer, and the upper oxide layer constitute a composite material Layer; defining the composite material layer to expose the substrate, and forming an opening in the composite material layer, wherein the opening has a plurality of side walls; forming a plurality of gap walls beside the side walls; forming a shallow trench at In the substrate; removing the spacers to expose a plurality of corners of the upper edge of the shallow trench; forming a lining oxide layer covering the sidewalls of the composite material layer and the substrate; forming silicon oxide Layer covering the lining oxide layer and the upper oxide layer, so that the silicon oxide layer fills the shallow trench; a grinding process is performed until the polycrystalline silicon is exposed approximately Liner layer and the oxide layer; removing the polysilicon layer and the pad oxide layer to expose about; and removing the pad oxide layer, and exposing the substrate about. This paper size applies the Chinese National Standard (CNS) A4 specification (210 X 297 mm) In HI ϋ n- Bn tl > n · n · im I · If HI Hi ϋν I n νϋ Order -------- -Line- ·· * s ··· (Please read the precautions on the back before filling out this page) 515038 Printed by the Consumers' Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs AB B8 C8 D8 f. Patent application scope 2. The method according to 1, wherein the material of the substrate is $ X. 3. The method as described in item 1 of the scope of patent application, wherein the step of forming the samarium oxide layer uses a thermal oxidation method. 4. The method according to item 1 of the scope of the patent application, wherein the thickness of the pad oxide layer is between about 150 A and about 200 A. 5. The method according to item 1 of the scope of patent application, wherein the step of forming the polycrystalline silicon layer uses a low pressure chemical vapor deposition method (LPCVD). 6. The method according to item 1 of the scope of patent application, wherein the thickness of the polycrystalline silicon layer is between about 1000A and about 2000A. 7. The method according to item 1 of the scope of patent application, wherein the step of forming the upper oxide layer is performed by a thermal oxidation method. 8. The method described in item 1 of the patent scope, wherein the thickness of the upper oxide layer is between about 500 A and about 100 A. 9. The method as described in the first item of the patent application scope, wherein the step of defining the composite material layer uses a lithography and etching process. 19 This paper size is applicable to China National Standard (CNS) A4 (210 X 297 mm) ------------- Installation ------- Order ------- --Xin Qin *-(Please read the notes on the back before filling out this page) 515038 Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs A8 B8 C8 D8, patent application scope 1 〇 As described in item 1 of patent application scope In the method, the step of forming the spacers further includes conformally depositing a silicon nitride layer. 11. The method as described in item 10 of the scope of the patent application, wherein the step of conformally depositing the silicon nitride layer uses a low pressure chemical vapor deposition method. 1 2. The method as described in item 10 of the scope of patent application, wherein the step of forming the spacers further comprises defining the silicon nitride layer. 1 3. The method according to item 10 of the scope of patent application, wherein the thickness of the silicon nitride layer is between about 200A and about 500A. 1 4. The method according to item 1 of the scope of patent application, wherein the material of the spacers is silicon nitride. 15. The method according to item 1 of the scope of patent application, wherein the step of forming the shallow trench further comprises using the upper oxide layer and the partition walls as a hard mask. _ 1 6. The method according to item 1 of the scope of patent application, wherein the step of forming the shallow trenches uses a lithography and etching process. This paper size applies to China National Standard (CNS) A4 (210 X 297 g t) W τ n an nm flu Mmm9 in fn in aa§ I ^ · mn If n I m m- · f— n Hi nt n HI n I (Please read the precautions on the back before filling out this page) 515038 Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs A8 B8 C8 D8, applying for the scope of patent 1 7 · The method described in item 1 of the scope of patent application, where The etchant used in the step of removing these spacers includes at least phosphoric acid (H3PO4) and hydrogen peroxide (H202). 1 8. The method according to item 1 of the scope of patent application, wherein the step of forming the liner oxide layer is performed by a thermal oxidation process. 19 · The method according to item 1 of the scope of patent application, wherein the temperature of the step of forming the lining oxide layer is controlled between about 1 000 ° C and about 1 100 ° C. 2 0. The method according to item 1 of the scope of the patent application, wherein the thickness of the liner oxide layer is between about 200A and about 600A. 2 1. The method according to item 1 of the scope of the patent application, wherein the step of forming the silicon oxide layer is performed by a high-density plasma chemical vapor deposition (HDPCVD) method. 22. The method as described in item 1 of the patent scope, wherein the step of performing the grinding process uses a chemical mechanical polishing method (CMP). 23. The method as described in item 1 of the scope of the patent application, wherein the etchant used in the step of removing the polycrystalline silicon layer includes at least water and ammonium hydroxide. 21 This paper applies the Chinese National Standard (CNS) A4 specification (210 X 297 mm) --------------------- Order .------- I * 5 ^ * »* (Please read the precautions on the back before (Fill in this page) 515038 Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs A8 B8 C8 D8 t, patent application scope (NH4〇H), and hydrogen peroxide. 2 4. The method according to item 1 of the scope of patent application, wherein the etchant used in the step of removing the pad oxide layer is hydrofluoric acid. 25. A method for manufacturing a shallow trench isolation (STI) structure, at least comprising: providing a substrate; forming a pad oxide layer overlying the substrate; forming a polycrystalline dream layer overlying the pad oxide layer; forming A silicon nitride layer covers the polycrystalline silicon layer, wherein the pad oxide layer, the polycrystalline layer, and the nitride layer constitute a composite material layer; defining the composite material layer to expose the substrate, An opening is formed in the composite material layer, wherein the opening has a plurality of side walls; a plurality of gap walls are formed beside the side walls; a shallow trench is formed in the substrate; the gap walls are removed to expose A plurality of corners on the upper edge of the shallow trench; forming a liner oxide layer covering the sidewall of the polycrystalline silicon layer, the sidewall of the pad oxide layer and the substrate; forming a silicon oxide layer covering the liner oxide layer and the silicon nitride Layer, so that the silicon oxide layer fills the shallow trench; a grinding process is performed until the silicon nitride layer is approximately exposed; this paper size applies the Chinese National Standard (CNS) A4 specification (210 X 297 mm) -------- * --------- 1 ^ --------- " 5 ^ * »\ # (Please read the notes on the back before filling this page) 515038 Printing of clothing A8 B8 C8 D8 by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs, applying for a patent to remove the silicon nitride layer, and approximately exposing the polycrystalline silicon layer and a portion of the liner oxide layer; removing the polycrystalline silicon Layer, and approximately expose the pad oxide layer; and removing the pad oxide layer, and approximately expose the substrate. 2 6. The method as described in claim 25, wherein the material of the substrate is silicon. 2 7. The method according to item 25 of the scope of patent application, wherein the step of forming the pad oxide layer uses a thermal oxidation method. 2 8. The method according to item 25 of the scope of patent application, wherein the thickness of the pad oxidation layer is between about 150A and about 200A. 29. The method as described in claim 25, wherein the step of forming the polycrystalline silicon layer uses a low-pressure chemical vapor deposition method. 30. The method according to item 25 of the scope of patent application, wherein the thickness of the polycrystalline silicon layer is between about 300A and about 1,000A. 3 1. The method according to item 25 of the scope of patent application, wherein the step of forming the silicon nitride layer uses a low pressure chemical vapor deposition method. This paper size applies to China National Standard (CNS) A4 (210 X 297 mm) im flu emamt 1 «ϋ SI HI an flu tn an 1 a I ϋ US flu n I (n 一 .I« an n · β · Bn n In naa I (Please read the notes on the back before filling out this page) Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs 515038 A8 B8 C8 D8 f. Application for patent scope 3 2. As described in item 25 of patent application scope Method, wherein the thickness of the silicon nitride layer is between about 100 A and about 2000 people. 3 3. The method according to item 25 of the scope of patent application, wherein the composite material is defined The step of the layer uses a lithography and etching process. 3 4. The method as described in item 25 of the scope of patent application, wherein the material of the spacers is silicon oxide. 35. As described in item 25 of the scope of patent application The method, wherein the steps of forming the spacers further include conformally depositing a silicon oxide layer. 3 6. The method according to item 35 of the scope of patent application, wherein the step of conformally depositing the silicon oxide layer uses a Low pressure chemical vapor deposition method 3 7. The method described in item 35 of the scope of patent application The step of conformally depositing the silicon oxide layer is a plasma gain chemical vapor deposition method (PECVD). 3 8. The method according to item 35 of the patent application scope, wherein the steps of forming the spacers It also includes the definition of the silicon oxide layer. 3 9. The method as described in item 35 of the scope of the patent application, wherein the paper size of this paper applies to the Chinese National Standard (CNS) A4 specification (210 X 297 mm) nmi an nn 1 n νϋ I l MMmt I "M / _ · mm fen il In I— JI n tmt nnn · 1 n I un ^ 口 *. ... * (Please read the notes on the back before filling this page) Ministry of Economy Printed by the Intellectual Property Bureau's Consumer Cooperatives 515038 A8 B8 C8 D8 f. Patent application scope The thickness of the silicon layer is between about 200A and about 500A. 4 0. The method described in item 25 of the scope of patent application, its order The step of forming the shallow trench further includes using the silicon nitride layer and the spacers as a hard cover. 4 1 · The method described in item 25 of the scope of patent application, wherein the step of forming the shallow trench is using A lithography and etching process. 42. If the scope of patent application is No. 25 The above method, wherein the step of removing the plurality of spacers system using hydrofluoric acid. 43. The method of claim 25 application patents range, wherein the step of forming the liner-based oxide layer using a thermal oxidation process. 44. The method as described in item 25 of the scope of patent application, wherein the temperature of the step of forming the lining oxide layer is controlled between about 1 000 ° C and about 1 100 t. 45. The method of claim 25, wherein the thickness of the lining oxide layer is between about 200A and about 600A. 4 6. The method as described in item 25 of the scope of patent application, wherein the 25 paper sizes are formed in accordance with Chinese National Standard (CNS) A4 (210 X 297 mm) II «^ 1 i am il 11 —I. — 1 Hi HI i I · I ja m I— n VK -in, I fi i —1 · in Hi n I *, N, (Please read the notes on the back before filling this page) Consumption cooperative Yinzhaoyi 515038 A8 B8 C8 D8 t, the patent application process is a silicon oxide layer using a high-density plasma chemical vapor deposition method. 47. The method according to item 25 of the scope of patent application, wherein the step of performing the grinding process uses a chemical mechanical grinding method. 48. The method according to item 25 of the scope of patent application, wherein the etchant used in the step of removing the silicon nitride layer includes at least water, phosphoric acid, and hydrogen peroxide. 49. The method as described in claim 25, wherein the etchant used in the step of removing the polycrystalline silicon layer includes at least water, ammonium hydroxide, and hydrogen peroxide. 50. The method as described in item 25 of the scope of patent application, wherein the etchant used in the step of removing the pad oxide layer is hydrofluoric acid. 5 1. —A method for manufacturing a shallow trench isolation (STI) structure, including at least: providing / substrate; forming an oxide layer to cover the substrate; forming a silicon nitride layer to cover the pad oxide layer, The pad oxide layer and the silicon nitride layer constitute a composite material layer; the composite material layer is defined to approximately expose the substrate, and the paper size of the composite material is in accordance with Chinese National Standard (CNS) A4 specification (210 X 297 mm) ------------- Installation ------- Order ·: -------- line one, \ r (Please read the note on the back first (Please fill in this page again for matters) 515038 ABB8C8D8 An opening is formed in the material layer printed and patented by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs, wherein the opening has a plurality of side walls; a plurality of gap walls are formed beside the side walls; forming a Shallow trenches in the substrate; removing the spacers to expose the corners of the upper edge of the shallow trench; forming a liner oxide layer covering the sidewalls of the pad oxide layer and the substrate; forming an oxide A silicon layer covers the liner oxide layer and the silicon nitride layer, and makes The silicon oxide layer fills the shallow trench; a grinding process is performed until the silicon nitride layer is approximately exposed; the silicon nitride layer is removed, and a portion of the liner oxide layer and the pad oxide layer are approximately exposed And removing the pad oxide layer and exposing the substrate approximately. 5 2 The method according to item 51 of the scope of patent application, wherein the step of forming the pad oxide layer uses a thermal oxidation method. 5 3. The method according to item 51 of the scope of patent application, wherein the step of forming the silicon nitride layer uses a low pressure chemical vapor deposition method. 54. The method of claim 51, wherein the step of forming the spacers further comprises conformally depositing a silicon oxide layer. 55. The method as described in item 54 of the scope of the patent application, wherein the conformal sink paper size is in accordance with China National Standard (CNS) A4 (210 X 297 mm) m til n —ai nn K— In I HI n I 0 n —J 2 · — I— n «fi m Order --------- line * ·-** (Please read the precautions on the back before filling out this page) 515038 Staff Consumption of Intellectual Property Bureau, Ministry of Economic Affairs The cooperative prints clothes A8, B8, C8, D8, and patents. The steps for applying the oxide layer are a low-pressure chemical vapor deposition method. 56. The method according to item 54 of the scope of patent application, wherein the step of conformally depositing the silicon oxide layer is by a plasma gain chemical vapor deposition method. 5 7. The method according to item 51 of the scope of patent application, wherein the step of forming the shallow trench further comprises using the silicon nitride layer and the spacers as a hard mask. 5 8. The method according to item 51 of the scope of patent application, wherein the step of removing the spacers uses hydrofluoric acid. 5 9. The method according to item 51 of the scope of patent application, wherein the step of forming the liner oxide layer is performed by a thermal oxidation process. 60. The method according to item 51 of the scope of patent application, wherein the temperature of the step of forming the lining oxide layer is controlled between about 1,000 ° C and about 110 ° C. 6 1. The method according to item 51 of the scope of patent application, wherein the step of forming the silicon oxide layer is performed by a high-density plasma chemical vapor deposition method. 62. The method as described in item 51 of the scope of patent application, wherein the 28 paper sizes are applied to the Chinese National Standard (CNS) A4 (210 X 297 mm) i ^ i nf HI In m flavi 1 · 1 IV — Ί i In n I · n Hi fi 1— m It n one I flu n 11 n mmi tmt In I one * (please read the precautions on the back before filling this page) 515038 A8 B8 C8 D8, scope of patent application The grinding process uses a chemical mechanical polishing method. Fan Li specially requested that the application of the etch method should include the steps required for the etching of item 51. Layered hydrogen 63 silicided oxygen and nitrogen should be divided by shifted, medium acid and its phosphorus and oxygen. For example, layer 64 of the perimeter Fan Li specifically requested to apply the step method. Fluorine and argon of squaric acid are used as an agent 11 ίηΊ 5 # This page) Order: .Line-Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs 29 This paper size applies to China National Standard (CNS) A4 (210 X 297 mm)
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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN100474555C (en) * 2005-12-15 2009-04-01 上海华虹Nec电子有限公司 Solution method of metal silicide deposit extension by STI edge

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN100474555C (en) * 2005-12-15 2009-04-01 上海华虹Nec电子有限公司 Solution method of metal silicide deposit extension by STI edge

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