TW513747B - Method to remove inorganic bottom anti-reflection coating layer - Google Patents

Abstract

This invention discloses a method to remove inorganic bottom anti-reflection coating (BARC) layer, suitable for damascene process of semiconductor integrated circuit. A double layer structure of a dielectric layer and a stop layer or a triple layer structure of a stop layer, a dielectric layer and a stop layer are sequentially formed on a semiconductor substrate to function as a composite etching stop layer. The BARC layer containing silicon oxynitride (SiON) can be completely removed before entire removal of the etching stop layer so as to avoid any particle contamination in the subsequent processes and noise during defect inspection.

Description

W3747

Field of the Invention: The present invention relates to a method for manufacturing a semiconductor integrated circuit, and more particularly, to a method for removing an inorganic anti-reflection layer (BARC), which will not cause particles when the residue is left (partic 1). e) Contamination and prevention of noise during defect detection. Relevant technical description: In today's semiconductor integrated circuit manufacturing processes, the photolithography process can be said to be a very critical step. Whether it can accurately transfer the designed circuit pattern to the semiconductor substrate is a matter of determining the properties of the product. One of the important factors. Generally, the lithography process includes several main steps: coating photoresist, exposure (eXposure), development, and removal of photoresist. In recent years, with the continuous reduction in the size of components (dimension), optical interference phenomena, such as standing wave phenomena, which were not obvious in the past in larger size processes, have gradually emerged and become a must. Right subject. At present, the commonly used method in the industry is to add an anti-reflection layer (ARC) with a good light absorption property under or on the photoresist layer to improve it. Among them, the silicon oxynitride (S i ON) layer has been successfully used as an anti-reflection layer at the time of definition, especially in a process with a line width of 0.25 micrometers (from m) and even a size of 〃. Ruler In general, in today's damascene process, after a photoresist layer is used as a mask to etch a defined pattern, a silicon oxide (SI ON) anti-reflection layer must usually be removed to facilitate subsequent deposition of metal materials. Of course

513747 V. Description of the invention (2) However, if a hydrofluoric acid (HF) solution is used as the lower etching, it must be performed for a long time, because the etching rate of the liquid is changed to dry etching to remove the efficiency. 1-In aspect, the termination layer in the embedded structure is thinner than the anti-^: anti-: layer. When the terminating layer and the anti-reflection layer are removed, the remaining layer is left, so the pollution and inconvenience in the simultaneous discontinuation process . If the injection layer is added, the thickness of the termination layer is increased after the increase 4: = = raw residual stomach ', but). θ Γ time delay effect (RC delay In order to further understand the conventional method diagram, the detailed description of the conventional single-mosaic process inverse = according to questions 1A, jlC. First, please refer to Figure 1A, the question generated after the == layer is interconnected Line (not shown), such as steel or Shao 'on which a gold system is formed to form a termination layer 12, which is used to separate the f and then according to the known semiconductor

Electric layer H. Next, the temple screen 连线, which is connected to the dielectric sound 14: K, followed by the formation of 介, only thinks about it, and U says that nitrogen-containing silicon oxide (SION ί ϊ ϊΐ) is sequentially formed: u. "Rc, BARC" 16 and Photoresist layer 18. ia # 18,2 i # μ ·, patterned light is formed by the conventional lithographic etching process-trench 15 and exposed = reflective layer 16 and dielectric layer; ρ ΐ: t according to Figure 1C 'Dry etching is used to remove the bottom anti-reflection layer 16 and the upper path: the termination layer 12 to form a contact window 15a and expose the surface of the substrate 10. Due to the thick room of the anti-reflection layer $ 古 + ώ The optimization of the first process is usually thicker than the termination layer 12 and the two are not at a high rate. Therefore, when the termination layer 12 is completely removed and the surface of the substrate 1G is exposed, it still remains on the dielectric channel.

513747 V. Description of the invention (3) The bottom anti-reflection layer 16 is shown in Figure lc. Please also refer to FIG. Κ, and then perform plasma treatment to remove the etching residue, because the underlying anti-reflection layer 16 has not been completely removed, at this time, the residual silicon oxynitride will form particles and contaminate it. A film was formed on the inner wall of the reaction chamber (not shown). Therefore, preventive maintenance (PM) is often required in the reaction chamber, which leads to increased costs and poor production efficiency. On the other hand, when comparing die with grain defect detection, these particles can cause noise (defect inspectiono no se), causing the test equipment to misjudge or fail to judge at all. In view of this, the present invention proposes a method for removing an inorganic bottom anti-reflection layer. A dual-layered composite termination layer is formed by depositing a dielectric layer under the termination layer, or a dielectric layer and a termination are deposited under the termination layer. In order to completely remove the bottom anti-reflective layer without completely removing the composite anti-reflection layer, it will not cause pollution and inconvenience caused by the residual silicon oxynitride. It can be further applied in the damascene process. Summary of the invention: The purpose of the present invention is to provide a method for removing an inorganic anti-reflection layer, which can completely remove the underlying anti-reflection layer without cleaning the etching residues without causing particulate pollution and forming a film on the inner wall of the reaction chamber to prolong the reaction. Preventive maintenance (PM) cycle of the room. Another object of the present invention is to provide a method for removing an inorganic bottom anti-reflection layer, so that when detecting and comparing defects between crystal grains and crystal grains, noise will not be generated and the test equipment may make false judgments or cannot judge.

0503-6227TW; TSMC2000-0905; SPIN. Ptd 513747 V. Description of the invention (4) According to the above method, including the following termination layer, the first reflective layer, the first dielectric, and the removal of the underlying anti-substrate surface, wherein the first dielectric After the surface of the layer, it also includes a method of cleaning the terminating layer, a first terminating layer and a root. The plate is on the base reflective layer; the contoured projection layer and the surface of the re-removal process layer; cleaning the trench, and the second applies according to the above The bottom of the board is sequentially exposed during the combined termination of the trench. The steps are: the dielectric layer is removed by a reflective layer, and the bottom layer of the dielectric layer is removed to form a etched bottom layer for the purpose of removing the bottom of the trench. Multiple layers are exposed to expose the above-mentioned base layer to resist etching of the first dielectric layer, the first termination layer is a second termination layer, the third dielectric layer, and the present invention provides a base and bottom layer to resist formation of trenches and composite In the final process, the etching of the bottom resistive part and the second interposer and the second interposer are exposed. In the process of the present invention, the composite termination antireflection layer is terminated to form a reflective layer on the surface of the composite interposer. The remaining step layer and the second and third intermediate and third terminations remove the inorganic base plate's reflective layer on the substrate; in turn, the composite stop layer is exposed to expose the reflective layer of the substrate surface and the stepped layer of the complex residue and the double stop layer. The three layers of inorganic removal include the following steps, composite dielectric, and composite dielectric surface; and the composite termination layer has been exposed before the electrical layer and the substrate. Among them, the three layers of the dielectric layer, the three layers of the double layer, and the three layers of the junction layer are anti-reversely formed in order and the first dielectric layer of the termination layer is engraved to form a complex bottom surface. The electrical layer and the first exposed layer have been combined before. Termination step. Wherein the composite layer structure or a first structure. Bottom anti-reflection layer: Provide a base layer and layer to remove the bottom surface. After the above complex, the dielectric layer structure or structure is formed. And a simple explanation of compound one and second schema:

O5O3-6227TW; TSMC2000-0905; SPIN.ptd Page 7 J 丄 J / Η · / V. Description of the invention (5) In order to make the above-mentioned object of the present invention, what is <Ding Ling Du Ban >> and &gt; The characteristics and advantages of η 2 can be more obvious and easy. The following is a better example, and it is accompanied by the figure of the person π · G σ for detailed description. Knowledge Society &gt; ^ W &gt; A cross-sectional view of removing the anti-reflection layer of the bottom layer according to the prior art; Figs. 2A to 2D show the rooting father ^ t according to the first embodiment of the present invention Sectional method of layer method; FIGS. 3A to 3D are cross-sectional views of the method for removing the bottom anti-reflection layer according to the second embodiment of the present invention; FIGS. 4A to 4D are drawings FIG. 5A to 5D are cross-sectional views showing a method for removing a bottom anti-reflection layer according to a fourth embodiment of the present invention. Explanation of symbols] 10 &gt; 20 &gt; 30 12 ~ stop layer; 14 ~ dielectric layer 15 ^ 25 ^ 35 40, 50 ~ substrate; 45 5 5 ~ trench; 15a, 25a, 35a ~ contact window; 16, 26 , 36, 46, 56 ~ bottom anti-reflection layer; 18, 28, 38, 48, 58 ~ photoresist layer; 22, 32, 42 ~ composite termination layer; 22a, 32a, 44a, 54a ~ first termination layer; 0503 -6227TWF; TSMC2000O905; SPIN. Ptd page 8

513747 V. Description of the invention (6) 22b, 32b, 44c, 54c ~ second dielectric layer; 24, 34, 44b, 54b ~ first dielectric layer; 32c, 42a, 52a ~ second termination layer; 42b, 52b ~ Third dielectric layer; 44, 54 ~ composite dielectric layer; 4, 3, 5 3 ~ dielectric hole; 43a, 53a ~ contact window; 52c ~ third termination layer. Detailed description of the preferred embodiment: The method of removing the anti-reflection layer of the bottom layer according to the first embodiment of the present invention will be described below with reference to FIGS. 2A to 2D.

Baixian sentence refers to FIG. 2A, and provides a substrate 20, for example, a stone evening crystal circle 'on which a semiconductor element (not shown) is formed. Next, a two-layer structure of a second dielectric layer 22b and a first termination layer 22a is sequentially formed on the substrate 20 as a composite termination layer 22, which is the second most different from the conventional technology. This is explained later in this article. The second dielectric layer 22b is a low-dielectric material, such as fluorine-doped silicon dioxide (FSG) or black diamond (Mack diamond, BD), and the material of the second termination layer 22a is siliconized silicon (siN). Thereafter, a first dielectric layer, a bottom anti-reflection layer (BARC) 26, and a photoresist layer 28 are sequentially formed on the composite termination layer 22. Among them, the same is a low-dielectric material, such as FSG4BD, and / 24 is an inorganic material. For example, the thickness of the second layer s; = the thickness design of the second layer 26 is related to the optimization of the optical process.

M3747 V. Description of invention (7) Πί 生 ί Wave effect. Here, the thickness is about 1200 to 130 Angstroms (QA). In addition, the thickness of the first stop layer 22a containing silicon nitride is thick to avoid increasing the time delay effect. Here, the thickness is about 300 to 5000. The thickness of the second dielectric layer 22b is similar to that of the silicon oxynitride layer. The thickness of 26 is right off, here is 20 to 300 Angstroms. Its role is to make the ratio of the first termination layer $ 2a degrees to the etching rate itself plus the thickness of the second dielectric layer 22b ^ and ί = ί: the rate must be greater than the thickness of the silicon oxynitride layer 26 and the etching rate The reason for 'ratio' will be explained later in this article. ^ Referring to FIG. 2β, the conventional photolithographic etching process is used to pattern the photoresist layer 28, and then the bottom anti-reflection layer 26 and the first dielectric layer are etched to form a trench 25 to expose the surface of the composite termination layer 22. Referring to FIG. 2C, after removing the photoresist 28, an etching device such as Super-E MX + is used to dry-remove the bottom anti-reflection layer 26 and the composite termination layer 22 to form a contact window 25a to expose the substrate. 20 surface and the first dielectric layer 24 surface. As mentioned before, because the ratio of the thickness of the first stop layer 2 &lt; and its own etching rate plus the thickness of the second dielectric layer 22b θ to its own etching rate is greater than the thickness of the silicon oxynitride layer 26 and its own etching rate Ratio, so the surface of the first dielectric layer 24 has been exposed before the surface of the substrate 20 is exposed during the removal process. That is, the underlying anti-reflection layer 26 of the silicon oxide containing nitrogen does not remain. Because the second dielectric layer 22b is a low-dielectric material, compared with the method of increasing the thickness of the first termination layer (silicon nitride) 22a of a non-low-dielectric material, the former has the advantage of avoiding an increase in the time delay effect. . Finally, please refer to Figure 2D, using argon (Ar) and ammonia (Nh3) as the reaction gas in the dry etching process to perform the plasma treatment to clean up the above dry 513747

The etching residue generated by the engraving right at the bottom of the contact window 25a (not shown at this time, because there is no residual silicon oxynitride, no particles are generated and formed on the inner wall of the reaction chamber, so it can be extended The preventive maintenance (PM) cycle of production equipment reduces production costs. On the other hand, since no particles are generated, there will be no defect detection and comparison between grains (d 丨 e) and grains. Noise is generated, so test equipment, such as KLA, can correctly determine defects in the die. The method of removing the bottom anti-reflection layer in the second embodiment of the present invention will be described below with reference to FIGS. 3A to 3D. First, please refer to FIG. 3A Provide a substrate 30, such as a silicon crystal φ circle, on which a semiconductor element, an internal dielectric layer, and a metal interconnect, such as copper or aluminum metal, are formed in order. A flat substrate 30 is shown. Next, a three-layer structure of a second termination layer "ο, a second dielectric layer 32b, and a first termination layer 32a is sequentially formed on the substrate 30 as a composite termination layer 32 'here Different from the first embodiment, its function is Metal atoms free of metal interconnects are directly diffused to the second dielectric layer 32b and cause the semiconductor device to fail. Thereafter, a first dielectric layer 34, a bottom anti-reflection layer (BARC) 36, and light are sequentially formed on the composite termination layer 32. Resistive layer 38. In this embodiment, the materials of the dielectric layers 32b, 34, the termination layers 32a, 32c, and the anti-reflection layer 36 are the same as in the first embodiment; in terms of the thickness of each layer, the first and second termination layers 32a The thicknesses of 3 and 2c are in the range of 150 to 250 Angstroms, respectively. The thicknesses of the other layers are also the same as those of the first embodiment, and will not be repeated here. Next, please refer to FIGS. 3B to 3D, which are the same as the procedures of the first embodiment. After the trench 35 is formed, as shown in FIG. 3B, the photoresist 38 and the bottom are then removed.

0503-6227TWF; TSMC2000.0905; SPIN.ptd Page 11 513747 V. Description of the invention (9) The anti-reflection layer 36 and the composite termination layer 32 form a contact window 35a to expose the surface of the substrate 30, as shown in FIG. 3C . Similarly, in FIG. 3D, after the plasma treatment is performed on the bottom of the contact window 35a to remove the etching residue, the advantages of the first embodiment can also be obtained. That is, it can extend the PM cycle of production equipment and prevent noise during defect detection. The method for removing the anti-reflective layer of the bottom layer according to the third embodiment of the present invention is described below with reference to FIGS. 4A to 4D, which is applicable to a dual damascene process. First, referring to FIG. 4A, a substrate 40 is provided, for example, a stone evening sphere, on which a semiconductor element (not shown) is formed. Next, a double-layered structure of the third dielectric layer 42 b and the second termination layer 42 a is sequentially formed on the substrate 40 ψ as a composite termination layer 42. Next, a first dielectric layer 44c, a first termination layer 44a, and a first dielectric layer 44b are sequentially formed on the composite termination layer 42 as a composite dielectric layer 44. Thereafter, a bottom anti-reflection layer 46 and a photoresist layer 48 are sequentially formed on the composite dielectric layer 44. The materials of the dielectric layers 42b, 44b, and 44c, the termination layers 42a, 44a, and the bottom anti-reflection layer 46 are the same as those of the first embodiment, and descriptions thereof are omitted here. Similarly, the thickness of the third dielectric layer 42b is related to the thickness of the bottom anti-reflection layer 46. The ratio of the thickness of the second termination layer 42a to its own etch rate plus the ratio of the thickness of the third dielectric layer 42b to its own #etch rate It must be greater than the ratio of the thickness of the oxynitride layer 46 to the engraving speed &lt; Next, referring to FIG. 4B, the underlying anti-reflection layer 46 and the composite dielectric layer 44 are sequentially etched in a conventional lithographic etching process to form a trench having a stepped profile of the trench 45 and the dielectric hole 43.

0503.6227TW; TSMC2000.0905; SPIN.ptd Page 12 513747 V. Description of the invention (10) Next, referring to Figure 4C, using the method of the first embodiment, after removing the photoresist 48, the bottom anti-reflection layer is removed. 46 and the composite termination layer 42 to form a contact window 43a. In FIG. 4D, when the surface of the substrate 40 is exposed, the surface of the first dielectric layer 44b has been exposed first, for the same reason as described in the first embodiment, so plasma treatment is performed to clean and etch the bottom of the contact window 43a. Residues and residues will not cause particulate pollution. Therefore, this embodiment has the same advantages as the first embodiment. -The method for removing the anti-reflection layer of the bottom layer according to the fourth embodiment of the present invention is described below with reference to FIGS. 5A to 5D, which is applicable to a dual damascene process. First, please refer to FIG. 5A, and provide a substrate 50, for example, a silicon wafer, on which a semiconductor element, an internal dielectric layer, and a metal interconnect are sequentially formed, such as copper or aluminum metal. Here is The illustration is simplified and only one flat substrate 50 is shown. Next, a three-layer structure of a third termination layer 52c, a third dielectric layer 52b, and a second termination layer 52a is sequentially formed on the substrate 50 as a composite termination layer 52. Its function is also to avoid metal interconnections. Direct diffusion of metal atoms to the second dielectric layer 52b causes the semiconductor device to fail. Next, a second dielectric layer 54c, a first termination layer 54a, and a first dielectric layer 54b 'are sequentially formed on the composite termination layer 52 as a composite dielectric layer 54. Thereafter, a bottom anti-reflection layer 56 and a photoresist layer 58 are sequentially formed on the composite dielectric layer 54. The materials of the dielectric 0 layers 52b, 54b, and 54c, the termination layers 52a, 52c, and 54a, and the bottom anti-reflection layer 56 are the same as those of the first embodiment, and descriptions thereof are omitted here. Similarly, the thickness of the third dielectric layer 52b is related to the thickness of the underlying antireflection layer 56. That is, the ratio of the etching rate of the second stop layer 52a to itself plus the first

1. 513747 5. Description of the invention (11) — The ratio of the etching rate of the electrical layer 52b to itself plus the third termination layer 52c is greater than the ratio of the bottom anti-reflection layer 56 to the etching rate of itself. And then #Refer to Figs. 5B to 5D, and use the same method of the third embodiment.

: Form a groove with a stepped outline of the groove 55 and the interlayer hole 53, such as the 5B person 2 does not. After the photoresist 58 is stripped off, the underlying anti-reflection layer 56 and the second to fifth layer 52 are removed to form a contact window 53a, as shown in FIG. In the first figure, the bottom anti-reflection layer 56 of silicon oxynitride is removed completely, so when it is removed to clean the etching residue at the bottom of the contact window 53a, it will not produce particulate contamination.之 相 ⑽ #. # Therefore, this embodiment has the same advantages as the third embodiment FT ^ The invention has been disclosed in the preferred embodiment as above, but it is not intended to be a divine craftsman, and the patent application model attached without departing from the essence of the invention : All = = the scope of protection of the present invention

Page 14

Claims (1)

The scope of the patent application: 1. A method for removing an inorganic anti-reflection layer including the following steps: a substrate, and sequentially forming a composite termination layer, a dielectric layer, and an anti-reflection layer on the domain substrate; V sequentially etches the above-mentioned bottom layer and the private wall. The exposed layers ψ μ, +, 4 A ^ y, the first dielectric layer, and the first dielectric layer are formed to form a trench, which leads to the surface of the composite termination layer; and the dielectric ίΐίϊί: The anti-emissive layer and the composite termination layer are exposed to the above-mentioned: the surface of the fii board, where the surface of the substrate is exposed during the removal process, and the first dielectric layer surface has been routed out first. 2. The method according to item 丨 in the scope of the patent application, wherein the above-mentioned ~ stop layer is a first termination layer and a first dielectric layer 屛 Han Diyi; 丨 the electric layer and the double-layer structure. The method described in Item 1 above, wherein the above-mentioned compound; the three layers of the first stop layer, the second dielectric layer, and the second stop layer of the structure ... 4. The method described in item 1 of the scope of patent application, wherein After removing the bottom anti-reflection layer and the composite termination layer, the steps of engraving the residue at the bottom are further included. Month J 5. The method described in item 丨 of the scope of patent application, the dielectric layer is at least one of FSG and BD. The method described in item 1 of Le Yi Er Yi Li Yi Li, wherein the above-mentioned bottom anti-reflection layer is oxynitride. -7. The method described in item 丨 of the scope of patent application for the straight composite termination layer and the bottom anti-reflection layer is a dry rice engraving process. ',; 8. The method described in item 2 of the scope of patent application / wherein the first 0503-6227IW; TSMC2000-0905; SPIN.ptd Page 15 513747 The termination layer is silicon nitride. 9. The method according to item 2 of the scope of patent application, wherein the dielectric layer is at least one of FSG and BD. Second I 0. The method as described in item 3 of the scope of the patent application, wherein the upper and second termination layers are nitride nitride. Article II. The method as described in item 3 of the scope of patent application, wherein the dielectric layer is at least one of FSG and BD. 2. The method described in item 4 of the scope of patent application, wherein the etching residue at the bottom of the trench is cleaned by a dry etching process. 13. · A method for removing the inorganic bottom anti-reflection layer, which is suitable for the embedding process, includes the following steps: Provide a substrate, and sequentially form a composite termination layer, a composite dielectric layer and a bottom anti-reflection layer on the substrate; ; Sequentially etching the above-mentioned bottom anti-reflection layer and the composite dielectric layer to form a stepped profile groove to expose the surface of the above composite termination layer; and removing the above-mentioned bottom anti-reflection layer and the composite termination layer to expose the above-mentioned composite dielectric layer and The surface of the substrate, wherein the surface of the composite dielectric layer has been exposed before the substrate surface is exposed during the removal process. 14. The method as described in item 13 of the scope of patent application, wherein the composite dielectric layer is a three-layer structure of a first dielectric layer, a first termination layer, and a second dielectric layer. 15. The method according to item 13 of the scope of patent application, wherein the above-mentioned composite termination layer is a two-layer structure of a second termination layer and a third dielectric layer. 16. The method as described in item 13 of the scope of patent application, wherein the above-mentioned repetition 0503 -6227TW; TSMC2000-0905; SPIN, ptd page 16 513747 6. The scope of patent application and termination layer is the first layer of the structure stop layer, the third dielectric layer and the third termination layer. The method according to the above item, wherein after removing the above-mentioned bottom anti-reflection layer and the composite stop layer, the method further includes a step of cleaning the residues on the bottom of the trench. 1 8. The method as described in item 3 of the scope of patent application, wherein the above-mentioned anti-reflection layer of the bottom layer is oxynitride. 19 · The method as described in item 3 of the scope of patent application, wherein the removal of the composite termination layer and the bottom anti-reflection layer is performed by a dry etching process. 20. The method according to item 14 of the scope of patent application, wherein the first and second dielectric layers are at least one of FSG and BD. Wherein the above (wherein the above) (wherein the above) (wherein the upper stomach is the upper part of the stomach) 21 · The method described in item 4 of the scope of patent application-terminating the layer nitriding; May 22 · as described in the scope of patent application No. 15 The second method described is the termination layer of silicon nitride. 23. The method described in item 15 of the scope of patent application. The three dielectric layers are at least one of FSG and BD. 24. The second and third termination layers as described in item 16 of the scope of patent application are silicon nitride. 2 5 · The method described in item 16 of the scope of patent application. The three dielectric layers are at least one of FSG and BD. 2 6 · The method as described in item 17 of the scope of patent application, wherein the etching residue at the bottom of the trench is used, and the dry-etching process is used. 0503-6227IW; TSMC2000-0905; SPIN.ptd Page 17