TW511333B - Method for manufacturing time-frequency element and product thereof - Google Patents

Method for manufacturing time-frequency element and product thereof Download PDF

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Publication number
TW511333B
TW511333B TW90133385A TW90133385A TW511333B TW 511333 B TW511333 B TW 511333B TW 90133385 A TW90133385 A TW 90133385A TW 90133385 A TW90133385 A TW 90133385A TW 511333 B TW511333 B TW 511333B
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Taiwan
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oscillator
substrate
frequency
time
bottom wall
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TW90133385A
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Chinese (zh)
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Wen-Cheng Yan
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Taitien Electronics Co Ltd
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Abstract

The present invention provides a method for manufacturing time-frequency element. Firstly, flip-chip package method is applied in a substrate to electrically connect the contact points on a chip with the pins on the substrate. Then, in a vacuum environment, a conductive adhesive is applied to adhere one end of an oscillating unit onto the side wall of the substrate and a mass trimming procedure is also applied to adjust the oscillation frequency of the oscillating unit. Finally, the substrate is encapsulated to complete the packaging process. Besides, the present invention also provides a time-frequency element product including an open substrate, a sealing cap to seal the opening of the open substrate, a chip, an oscillation unit, and a frequency trimming particle layer. The chip and the oscillation unit are equipped on the substrate and the frequency trimming particle layer is formed on the surface of the oscillation unit.

Description

511333511333

發明説明( 【創作領域】 本創作是在提供一種時頻元件,特別是指一種體積小 • 且具精確頻率之時頻元件。 - 【習知技藝說明】 5 時頻元件,亦即所謂的晶體振盪器(crystal oscillator),在許多電子裝置及通訊裝置中常被廣泛用作 _ 提供參考頻率(reference freqUenCy)及參考時間(reference time)之元件’近年來,-更由於可攜式裝置(如行動電話、 PDA)的興起’使得時頻元件之體積因配合可攜式裝置而 1〇更趨精細,另方面,除了體積小的要求以外,時頻元件之 頻率及時間的精確度上更不能忽略,因此,極需要能兼顧 上述一者之製程’方能得到品質良妤的時頻元件。 參閱第一圖,為一時頻元件7之電路示意圖,通常一 個時頻元件7包含了 一晶片71,及一振|子72,由於振 盪子72係以壓電(石英)材質所製成,無法整合入晶片71 中’因此通常以外接之方式出現,而晶片71中則包含了 諸如反相器、電阻等電子元件所組成之振盪電路73。 15 一般時頻元件,如第二圖所示,是在具有一開口 81 (請先閲讀背面之注意事項再填窝本頁) 訂丨 :線丨 20 之基板82内,並列放置已封裝之振盪子83及晶片84, 且基板82上形成有具有複數接腳之電路佈局(圖未示), 並將已封裝之振盈子83及晶片84以線接合(wire-bonding) 之方法使其與該等接腳電性連接,接著在基板82内填入 膠體85,藉由膠體85保護自該封裝後之振盪子及晶 片84延伸出之金屬導線,最後以一上蓋86將該基板82 第 頁 本紙張尺度適用中國國家標準(CNS) A4規格(210X297公釐) 511333 A7 _B7_ 五、發明説明(2 ) 封蓋後製成一時頻元件8。然而,上述之製造方法,卻存 在下面幾個缺點: 1. 以線接合之方法分別將振盪子及晶片電性連接至 基板之電路佈局上,需要填入大量膠體方能防止 5 濕氣由外部入侵,以避免金屬導線氧化。 2. 將振盪子先封裝後再置入基板内,製造成本較高, 且經封裝後之振盪子無法調整其質量及頻率,使 - 得時頻元件之精確度較低。 _ 3. 由於振盪子係與晶片水平並列放置,使得時頻元 10 件整體之體積較大,無法達到體積最小化的要求。 【創作概要】 因此,本發明之目的在提供一種可微調校準震盪頻率 之時頻元件製造方法。 本發明之另一目的在提供一種震盪頻率精確之時頻元 15 件。 本發明之再一目的在提供一種體積小且僅需填入部分 膠體之時頻元件。 於是,本發明製造時頻元件之方法,其中該時頻元件具有 一基板,該基板包括形成有一電路佈局之一底壁、及環繞 20 該底壁周緣並向上延伸之一侧壁,且該底壁與該侧壁相龙 合界定出具有一開口之一容覃空間,該電路佈局在該底壁 面對該容置空間之一頂面上形成有複數接腳,該方法包含 步驟:(a)將一具有複數接點之晶片由該開口置入該容置 空間,且將該晶片之各該複數接點與該基板底壁之各該對 第5頁 本紙張尺度適用中國國家標準(CNS) A4規格(210X 297公釐) (請先閲讀背面之注意事項再填寫本頁) 訂· 線· 511333 五、發明説明(3 ) 應接腳電性連接;⑻在-真空環境下,將—振盪子之一 端與該晶片相對應且電性連接地設置在該基板之侧壁上; 及⑷在該真空環境下,以一封蓋封閉已設置該振盪子及 該晶片之該基板的上述開口,藉此保持該容置空間於一真 空氣密狀態。 ’ 【圓式之簡單說明】 本發明之技術内容、特徵及優點,在以下配合參考圖 式之較佳實施例的詳細說明中,將可清楚的呈現,在圖式 中: 10 第一圖是一習知之時頻元件的電路示意圖; 第二圖是一立體圖,說明該習知之時頻元件的結構; 第三圖是一流程圖,說明本發明時頻元件之製造方 法 第四圖是一剖面圖,說明將一晶片置入一基板内之情 15 況; 第五圖是一部分放大圖,說明晶片之接點與基板上之 接腳藉由一凸塊相互連接的情況; 第六圖是一剖面圖,說明在該基板被置入該晶片後, 在該基板之一侧壁上連接一振盪子的情況; 20 第七圖是一剖面圖,說明沈積複數粒子在該振盪子上 的情況;尽 第八圖是一剖面圖,說明以一封蓋封閉該基板以製成 一時頻元件的情況。 【較佳實施例之詳細說明】 頁 奉 (請先閲讀背面之注意事項再填窝本頁) •線丨 第 本紙張尺度適用中國國家標準(CNS) A4規格(210X297公爱〉 川333 A7 ^^-----— 37 _ 五、發明説明(4 ) 一 ---:---- 參閱第三圖,本發明時頻元件i之較佳實施例的製造 流程,包含下列步驟: 配合第四、五圖,其中第五圖為第四圖中A區域之 部分放大圖,該時頻元件1具有-基板u,該基板η包 5括形成有-電路佈局15(圖未示)之—底㉟12、及環繞該 錢12胃緣並向上延伸之一侧| 13,且該底壁12與該 侧壁13相配合界定出具有一開口 14之一容置空間16, 該電路佈局15在該底壁·12面對該容置空間16之一頂面 上形成有複數接腳17。步驟31,是將一内部具有一振盪 1〇電路(圖未示)晶片2由該開口 14置入該容置空間16,且 該晶片2之表面上形成有複數與該振盪電路相連接之接點 21,並將該各該接點21與該底壁12上之各該對應接腳17 電性連接’而為說明起見,步称31更包含下列次步驟: (al)以覆晶方法將該等晶片2之接點21與該等接腳17 15 電性連接。 (a2)在該晶片2與該基板11間填入一膠體3。 此處不以線接合(wire-bonding)之方法,而改採覆晶 (flip-chip)方法將晶片2上之接點21與基板11之接腳17 電性連接’其係在晶片2上之各該接點21上形成一銲錫 20 (solder)或金(Au)凸塊(bump)22,並再以熱處理方式將此 凸塊22連接於晶_片2之接點21及其相對應之接腳17上, 而藉由此覆晶方法可降低晶片2與基板11間的電子訊號 傳輸距離,增加訊號傳輸速度,且可縮小晶片2封裝後的 尺寸,使得晶片2封裝前後大小相差無幾,可達到體積最 第7頁 本纸張尺度適用中國國家標準(CNS) A4規格(210X297公爱) ...................釋裝:… - - (請先閲讀背面之注意事項再填窝本頁) •、句丨 ►•線丨 511333 A7 ____ B7 _ 五、發明説明(5 ) 小化之要求。另一方面,由於採用覆晶方法,因此僅需在 晶片2之接點21及接腳17間填入膠體3,而不需在容置 ^ 空間16内填充滿膠體3,即可加強其整體結構之可靠度, - 因此可節省製造成本。在本實施例中,此膠體3可是低黏 5度之液狀環氧基板樹脂(epoxy)與苯酚(phenol)、或酐 (anhydride)等材料之一或其組合物,而此膠體3中更具有 複數小粒徑的球狀二氧化矽粒子來作為填充料。 配合第六圖’步驟32是在一真空環境下,將一振盪 子4之一端藉由一導電膠(conductive adhesive)5將該振靈 10 子4連接在該基板11之侧壁13上,並使該振盪子4能該 晶片2内部之振盪電路電性連接,而該振盪子4未連接之 ^端則可使該振盪子4上下振盪,且該振盪子4係與該晶 片2上下相應而垂直放置,如此,相較於習知之時頻元件, 自可維持其電路設計並縮小封裝後之體積;而由於是在真 15 空環境下操作,因此振盪子4及晶片2毋需先行封裝,僅 φ 需以裸晶(bare chip)之型式置於該基板11内,即可避免 空氣中之濕度影響線路,並節省製造成本。 步驟33,輸入一測試信號至該晶片2,使其驅動該振 盪子4振盪; 20 配合第七-圖,步驟34是測量該振盪子4之振盈頻率, 、 並與一預定振盪頻率比較,依測量結果沈積複數粒子6至 振盪子4之曝露表面,在本實施例中,為說明起見,是以 物理氣相沈積(PVD)法為例,以增加晶片22之質量,藉 此,由於沈積複數粒子6使振盪子4表面處之質量略增, __ 第8頁 本紙張尺度適用中國國家標準(CNS) A4規格(210X297公爱) ^ - ..................裝..................、可..................線. (請先閲讀背面之注意事項再填寫本頁) 511333 A7 _— —_B7_ 五、發明説明(6 ) 由此微調降低振盪子4振盪時之頻率,當然,此處例舉之 物理氣相沈積法可為蒸鍍,亦可為濺鍍。而此物理氣相沈 積法所採用的材料,可為下列習用材質,包括:金、銀、 鉻、銘、及其他等效物質、或上述金屬之合金、或與其他 5 物質之化合物。且當振盪頻率符合預期時終止沈積的步 驟,由此獲得最準確之振盪頻率。當然,因所增加之粒子 數目極少,不致亦不容許彼此連結成導通之電路,故振盪 子4上既有之電路並無短路之虞。 · 另一方面,若欲提高振蘯子4之振盪頻率,在步驟34 10 中亦亦可同步量測振盪頻率並採一乾式蝕刻法(圖未示), 略為蝕去振盪子4上該曝露表面之既有粒子,以減少振盪 子4之質量,並增加振盪子4之振盪頻率,而當振盪頻率 到達該預定振盪頻率時即停止蝕刻,而因為此種蝕刻法所 去除之粒子極少,亦不致分斷原有元件間之連結線路而破 15 壞原有之電路。而藉由上述質量微調之步驟,即使得此振 盪子4之頻率精確度提高,並提升此時頻元件1之良率。 配合第八圖,步驟35是在一真空環境下,以一封蓋 18封閉該開口 14,且該基板11内設置有經覆晶構裝後之 晶片2,而基板11之侧壁13上設置有經質量微調後之振 20 盪子4,並將該容置空間16保持於一真空氣密肤態,即 製成時頻元件1。 _ 綜合上述,本發明時頻元件之製造方法藉由採覆晶構 裝法,並將振盪子及晶片上下平行設置而縮小時頻元件之 體積,而由於是在一真空環境中操作,故可減少線路被氧 第Θ頁 本紙張尺度適用令國國家標準(CNS) A4規格(210X297公爱) (請先閲讀背面之注意事項再填寫本頁) 訂· ►線丨 511333 A7 B7 五、發明説明(7 ) 化破壞的機會,而在封蓋前更加以一質量微調步驟來準確 控制振盪子之振盪頻率,使本發明確達體積小、良率高, _ 及具精確振盪頻率之目的。 惟以上所述者,僅為本發明之較佳實施例而已,當不 5 能以此限定本發明實施之範圍,即大凡依本發明申請專利 範圍及發明說明書内容所作之簡單的等效變化與修飾,皆 應仍屬本發明專利涵蓋之範圍内。 (請先閲讀背面之注意事項再填寫本頁) 訂丨 •線丨 第10頁 本紙張尺度適用中國國家標準(CNS) A4規格(210X 297公釐) 511333 A7 B7 五、發明説明(8 ) 【元件標號對照】 1 時頻元件 2 晶片 11 基板 21 接點 12 底壁 22 凸塊 13 侧壁 3 膠體 14 開口 4 振盪子 15 電路佈局 5 導電膠 16 容置空間‘ 6 粒子 17 接腳 18 封蓋 (請先閲讀背面之注意事項再填寫本頁) 第11頁 本紙張尺度適用中國國家標準(CNS) A4規格(210X297公釐)[Explanation of the invention] [Creation area] This creation is to provide a time-frequency element, especially a small-sized time-frequency element with a precise frequency.-[Known technical description] 5 Time-frequency element, also known as a crystal Crystal oscillator, which is widely used in many electronic devices and communication devices. _ Provides the reference frequency (reference freqUenCy) and reference time (reference time) components' in recent years,-even more because of portable devices (such as mobile The rise of telephones, PDAs) has made the volume of time-frequency components more refined due to the cooperation with portable devices. On the other hand, in addition to the small size requirements, the frequency and time accuracy of time-frequency components cannot be ignored. Therefore, it is extremely necessary to take into account the above-mentioned process to obtain a good quality time-frequency component. See the first figure for a circuit diagram of a time-frequency component 7, usually a time-frequency component 7 includes a chip 71, And a vibrator | zig 72, because the vibrator 72 is made of piezoelectric (quartz) material and cannot be integrated into the chip 71 ', so it usually appears externally, and Chip 71 contains an oscillating circuit 73 composed of electronic components such as inverters and resistors. 15 General time-frequency components, as shown in the second figure, have an opening 81 (please read the precautions on the back before Fill in this page) Order 丨: In the substrate 82 of line 丨 20, the packaged oscillator 83 and wafer 84 are placed side by side, and a circuit layout with a plurality of pins is formed on the substrate 82 (not shown), and The packaged vibrator 83 and the chip 84 are electrically connected to these pins by wire-bonding, and then a colloid 85 is filled in the substrate 82. The colloid 85 protects the The oscillator and the metal wire extending from the wafer 84, and finally the substrate 82 with an upper cover 86. The paper size of this paper applies the Chinese National Standard (CNS) A4 specification (210X297 mm) 511333 A7 _B7_ V. Description of the invention (2) A time-frequency component 8 is made after covering. However, the above-mentioned manufacturing method has the following disadvantages: 1. Electrically connect the oscillator and the chip to the circuit layout of the substrate by wire bonding, which needs to be filled in a large amount. Colloid can prevent 5 The gas is invaded from the outside to avoid oxidation of the metal wires. 2. The oscillator is first packaged and then placed in the substrate, the manufacturing cost is high, and the packaged oscillator cannot adjust its quality and frequency, so that-time-frequency components The accuracy is low. _ 3. Because the oscillator system is placed side by side with the wafer, the overall volume of the 10 time-frequency elements is large, and it cannot meet the minimum volume requirement. [Creation Summary] Therefore, the purpose of the present invention is to Provided is a method for manufacturing a time-frequency component capable of fine-tuning and calibrating an oscillation frequency. Another object of the present invention is to provide 15 time-frequency elements with accurate oscillation frequency. Yet another object of the present invention is to provide a time-frequency component which is small in size and only needs to be filled with a part of colloid. Therefore, the method for manufacturing a time-frequency element according to the present invention, wherein the time-frequency element has a substrate, the substrate includes a bottom wall formed with a circuit layout, and a side wall extending around a periphery of the bottom wall and extending upward, and the bottom The wall and the side wall are connected together to define an accommodating space with an opening, and the circuit layout has a plurality of pins formed on the top surface of the bottom wall facing the accommodating space. The method includes the steps: (a ) Place a wafer with a plurality of contacts into the accommodation space through the opening, and each pair of the plurality of contacts of the wafer and each of the bottom wall of the substrate. Page 5 This paper applies the Chinese national standard (CNS) ) A4 specification (210X 297 mm) (Please read the precautions on the back before filling out this page) Order · Thread · 511333 V. Description of the invention (3) The pins should be electrically connected; ⑻ Under-vacuum environment, will- One end of the oscillator is disposed on the side wall of the substrate corresponding to the wafer and is electrically connected; and ⑷ under the vacuum environment, a cover is used to close the opening of the substrate on which the oscillator and the wafer have been placed So as to keep the accommodation space A vacuum air-tight state. '[Simple description of the round form] The technical content, features, and advantages of the present invention will be clearly presented in the following detailed description of the preferred embodiment with reference to the drawings, in the drawings: 10 The first figure is A schematic circuit diagram of a known time-frequency element; a second diagram is a perspective view illustrating the structure of the conventional time-frequency element; a third diagram is a flowchart illustrating a method of manufacturing the time-frequency element of the present invention; the fourth diagram is a cross-section Fig. 15 illustrates a case where a wafer is placed in a substrate. Fig. 5 is an enlarged view of a portion of the wafer and contacts on the substrate are connected to each other by a bump. The sixth diagram is a A cross-sectional view illustrating a situation where an oscillator is connected to one of the side walls of the substrate after the substrate is placed in the wafer; 20 The seventh diagram is a cross-sectional view illustrating the situation where a plurality of particles are deposited on the oscillator; The eighth figure is a cross-sectional view illustrating a case where the substrate is closed with a cover to make a time-frequency element. [Detailed description of the preferred embodiment] Pages (please read the precautions on the back before filling in this page) • Lines 丨 This paper size applies the Chinese National Standard (CNS) A4 specification (210X297 public love) Chuan 333 A7 ^ ^ -----— 37 _ V. Description of the invention (4) I ---: Referring to the third figure, the manufacturing process of the preferred embodiment of the time-frequency component i of the present invention includes the following steps: The fourth and fifth figures, of which the fifth figure is a partially enlarged view of the area A in the fourth figure. The time-frequency element 1 has a -substrate u, and the substrate n includes a circuit layout 15 (not shown). -The bottom 12 and one side surrounding the stomach edge of the money 12 and extending upward | 13, and the bottom wall 12 cooperates with the side wall 13 to define an accommodation space 16 having an opening 14, the circuit layout 15 is in A plurality of pins 17 are formed on the top surface of the bottom wall 12 facing the accommodating space 16. In step 31, a chip 2 with an oscillating circuit 10 (not shown) is inserted through the opening 14 The accommodating space 16 is formed on the surface of the chip 2 with a plurality of contacts 21 connected to the oscillating circuit, and each of the contacts 21 is formed. The corresponding pins 17 on the bottom wall 12 are electrically connected. For the sake of explanation, the step number 31 further includes the following steps: (al) the chip 21 contacts 21 and the The pins 17 15 are electrically connected. (A2) A gel 3 is filled between the chip 2 and the substrate 11. Here, instead of wire-bonding, a flip-chip is used instead. Method to electrically connect the contact 21 on the wafer 2 with the pin 17 on the substrate 11 'It is formed on each of the contacts 21 on the wafer 2 to form a solder 20 or a bump of gold (Au) 22, and then this bump 22 is connected to the contact 21 of the wafer 2 and the corresponding pin 17 by heat treatment, and the electronic signal between the wafer 2 and the substrate 11 can be reduced by the flip-chip method. The transmission distance increases the signal transmission speed, and can reduce the size of the chip 2 after packaging, so that the size of the chip 2 before and after the packaging is almost the same, which can reach the volume. Page 7 This paper applies the Chinese National Standard (CNS) A4 specification (210X297). Love) ......... Release: ...--(Please read the notes on the back before filling in this page) •, sentence 丨 ► • line 511333 A7 ____ B7 _ V. Description of the invention (5) Requirements for miniaturization. On the other hand, because the flip-chip method is used, it is only necessary to fill the colloid 3 between the contact 21 and the pin 17 of the wafer 2 without the need to fill it. Filling the accommodating space 16 with colloid 3 can enhance the reliability of the overall structure, and thus can save manufacturing costs. In this embodiment, the colloid 3 can be a liquid epoxy substrate resin with a low viscosity of 5 degrees. (Epoxy) and phenol (anhydride) and other materials or a combination thereof, and the colloid 3 has a plurality of spherical silica particles having a small particle diameter as a filler. In accordance with the sixth figure, step 32 is to connect one end of an oscillator 4 to the side wall 13 of the substrate 11 through a conductive adhesive 5 under a vacuum environment, and Enabling the oscillator 4 to be electrically connected to the oscillation circuit inside the chip 2, and the unconnected terminal of the oscillator 4 can cause the oscillator 4 to oscillate up and down, and the oscillator 4 corresponds to the up and down of the chip 2. Compared with the conventional time-frequency components, it can maintain its circuit design and reduce the volume after packaging. Because it is operated in a true 15-air environment, the oscillator 4 and chip 2 do not need to be packaged first. Only φ needs to be placed in the substrate 11 as a bare chip, which can avoid the humidity in the air from affecting the circuit and save manufacturing costs. Step 33, input a test signal to the chip 2 to drive the oscillator 4 to oscillate; 20 In accordance with the seventh figure, step 34 is to measure the oscillation frequency of the oscillator 4 and compare it with a predetermined oscillation frequency. According to the measurement results, the exposed surfaces of the plurality of particles 6 to the oscillator 4 are deposited. In this embodiment, for the sake of illustration, the physical vapor deposition (PVD) method is used as an example to increase the mass of the wafer 22, thereby, because Deposition of a plurality of particles 6 slightly increases the mass at the surface of the oscillator 4, __ page 8 This paper size applies the Chinese National Standard (CNS) A4 specification (210X297 public love) ^-............ ... install ........., available ............ line. (Please first Read the notes on the back and fill in this page) 511333 A7 _ — —_B7_ V. Description of the invention (6) The frequency of the oscillator 4 will be reduced by fine tuning. Of course, the physical vapor deposition method exemplified here can be steam Plating can also be sputtering. The materials used in this physical vapor deposition method can be the following conventional materials, including: gold, silver, chromium, Ming, and other equivalent materials, or alloys of the above metals, or compounds with other 5 substances. And when the oscillation frequency meets the expectations, the step of depositing is terminated, thereby obtaining the most accurate oscillation frequency. Of course, because the number of particles increased is extremely small, it is not allowed or allowed to be connected to each other to form a conductive circuit, so the existing circuit on the oscillator 4 does not risk short-circuiting. · On the other hand, if you want to increase the oscillation frequency of vibrator 4, in step 34 10, you can also measure the oscillation frequency simultaneously and adopt a dry etching method (not shown) to slightly etch the exposure on the vibrator 4. There are existing particles on the surface to reduce the mass of the oscillator 4 and increase the oscillation frequency of the oscillator 4. When the oscillation frequency reaches the predetermined oscillation frequency, the etching is stopped, and because this etching method removes very few particles, Do not break the connection between the original components and break the original circuit. And through the quality fine-tuning steps described above, the frequency accuracy of the oscillator 4 is improved, and the yield of the frequency component 1 is improved. In accordance with the eighth figure, step 35 is to close the opening 14 with a cover 18 in a vacuum environment, and the substrate 11 is provided with a wafer 2 after being flip-chip mounted, and a side wall 13 of the substrate 11 is provided. After the quality is finely adjusted, the oscillator 20 oscillates 4 and maintains the accommodating space 16 in a vacuum airtight skin state. _ To sum up, the manufacturing method of the time-frequency component of the present invention reduces the volume of the time-frequency component by adopting the overlying crystal structure method and placing the oscillator and the wafer in parallel up and down, and because it is operated in a vacuum environment, it can be used. Reduce circuit oxygen. Page Θ This paper size applies the national standard (CNS) A4 specification (210X297 public love) (Please read the precautions on the back before filling out this page) Order · ► 丨 511333 A7 B7 V. Description of the invention (7) The opportunity for destruction is reduced, and a quality fine-tuning step is used to accurately control the oscillation frequency of the oscillator before capping, so that the present invention does achieve the purpose of small volume, high yield, and precise oscillation frequency. However, the above are only the preferred embodiments of the present invention, and the scope of implementation of the present invention can not be limited by this, that is, the simple equivalent changes made according to the scope of the patent application and the content of the invention specification of the present invention. Modifications should still fall within the scope of the invention patent. (Please read the precautions on the back before filling this page) Order 丨 • Line 丨 Page 10 This paper size applies the Chinese National Standard (CNS) A4 specification (210X 297 mm) 511333 A7 B7 V. Description of the invention (8) 【 Comparison of component numbers] 1 Time-frequency component 2 Chip 11 Substrate 21 Contact 12 Bottom wall 22 Bump 13 Side wall 3 Gel 14 Opening 4 Oscillator 15 Circuit layout 5 Conductive glue 16 Receiving space '6 Particles 17 Pins 18 Cap (Please read the precautions on the back before filling out this page) Page 11 The paper size applies to Chinese National Standard (CNS) A4 (210X297 mm)

Claims (1)

511333 A8 B8 C8 D8 六、申請專利範圍 1. 一種製造時頻元件的方法,其中該時頻元件 具有一基板,該基板包括形成有一電路佈局: 之一底壁、及環繞該底壁周緣並向上延伸之 一側壁,且該底壁與該侧壁相配合界定出具 5 有一開口之一容置空間,該電路佈局在該底 壁面對該容置空間之一頂面上形成有複數接 腳,該方法包含步驟:. (a) _將一具有複數接點之晶片由該開口 置入該容置空間,且將該晶片之各 該複數接點與該基板底壁之各該對 應接腳電性連接; (b) 在一真空環境下,將一振盪子之一 端與該晶片相對應且電性連接地設 置在該基板之侧壁上;511333 A8 B8 C8 D8 VI. Patent application scope 1. A method for manufacturing a time-frequency element, wherein the time-frequency element has a substrate, the substrate includes a circuit layout formed: a bottom wall, and a periphery surrounding the bottom wall and upwards One of the side walls is extended, and the bottom wall cooperates with the side wall to define an accommodation space with an opening 5, and the circuit layout has a plurality of pins formed on a top surface of the bottom wall facing the accommodation space. The method includes the steps of: (a) _ placing a wafer having a plurality of contacts into the accommodation space through the opening, and electrically connecting the plurality of contacts of the wafer to the corresponding pins of the bottom wall of the substrate (B) in a vacuum environment, one end of an oscillator is correspondingly connected to the wafer and is electrically connected to a side wall of the substrate; (請先閲讀背面之注意事項再填寫本頁) (C)在該真空環境下,以一封蓋封閉已 設置該振盪子及該晶片之該基板的 上述開口 ,藉此保持該容置空間於 一真空氣密狀態。 2. 如申請專利範圍第1項所述之製造時頻元件 20 的方法,其t,該步驟(b)與步驟(c)間,更包 含下列步驟: • (d) 輸入一測試信號至該晶片,棱其驅 . 動該振盪子振盪;及 (e) 測量該振盪子之振盪頻率,並與一 第12頁 本纸張尺度適用中國國家標準(CNS) A4規格(210X297公爱)· 511333 A8 B8 C8 D8 六、申請專利範圍 Γ 請先閲讀背面之注意事項再填寫本頁) 預定振盪頻率比較,依測量結果沈 積至/蝕刻自該振盪子曝露於該開口 之一曝露表面,以微調該振盪子之 質量。 5 3.依據申請專利範圍第2項所述之製造時頻元 件的方法,其中該步驟(e)係以物理氣相沈積 (PVD)法,沈積複教粒子至該振盪子之該曝露 表面以增加該振盪子之質量,藉此降低該振 盪子之振盪頻率。 10 4.依據申請專利範圍第2項所述之製造時頻元 件的方法,其中該步驟(e)係以乾式蝕刻法, 蝕去該曝露表面之複數粒子,減少該振盪子 之質量,藉此提高該振盪子之振盪頻率。 5 ·如申請專利範圍第1項所述之製造時頻元件 15 的方法,其中,該步驟(a)更包含下列次步驟: (al)以覆晶方法將該等晶片之接點與該 等基板之接腳電性連接; (a2)在該晶片與該基板間填入一膠體。 6. —種時頻元件,包含: 20 —基板,具有一底壁及一自該廣壁之一 周緣向上延伸之侧壁,該底壁與該侧壁相配 合界定出具有一開口之一容置空間,且談底 壁形成有一電.路佈局,該電路佈局在該底壁 面對該容置空間之一頂面上形成有複數接 第13頁 本紙張尺度逋用中國國家標準(CNS) A4規格(210X297公釐) 511333 A8 B8 C8 D8 六、申請專利範圍 腳; (請先閲讀背面之注意事項再填寫本頁) 一封蓋,連接於該側壁上遠離該底壁之 一端且封閉該容置空間之開口 ,該容置空間 内係一大約真空或真空之氣密狀態; 5 一晶片,設置在該容置空間内,該晶片 具有一振盪電路,及複數與該等接腳相對應 之接點; φ 一振盪子,與該晶片上下相對應地設置 在該容置空間内,且該振盪子是與該晶片之 10 振盪電路互相電性連接;及 一頻率微調粒子層,形成在該振盪子之 表面上,該頻率微調粒子層包含複數彼此間 隔之粒子,以增加該振·盈子之質量,藉此降 低該振盪子之振盪頻率。 15 7.如申請專利範圍第6項所述之時頻元件,其 中,該頻率微調粒子層材料,係選自下列之 一金屬:金、銀、絡及IS或上述兩個以上金 屬之組合物。 第14頁 本紙張尺度適用中國國家標準(CNS) A4規格(210X297公釐)(Please read the precautions on the back before filling this page) (C) Under the vacuum environment, close the above opening of the substrate on which the oscillator and the wafer have been set with a cover, thereby keeping the accommodation space in A vacuum-tight state. 2. The method for manufacturing a time-frequency component 20 as described in item 1 of the scope of patent application, wherein t, between steps (b) and (c), further includes the following steps: (d) input a test signal to the Drive the oscillator; and (e) measure the oscillation frequency of the oscillator and apply the Chinese National Standard (CNS) A4 (210X297 public love) to the paper size on page 12 · 511333 A8 B8 C8 D8 6. Scope of patent application Γ Please read the precautions on the back before filling in this page) Scheduled oscillation frequency comparison, deposited / etched from the exposed surface of the oscillator exposed to the opening according to the measurement results, to fine-tune the The mass of the oscillator. 5 3. The method for manufacturing a time-frequency device according to item 2 of the scope of the patent application, wherein step (e) is a method of physical vapor deposition (PVD), which deposits retrenchment particles onto the exposed surface of the oscillator to Increase the mass of the oscillator, thereby reducing the oscillation frequency of the oscillator. 10 4. The method for manufacturing a time-frequency component according to item 2 of the scope of the patent application, wherein step (e) is to dry out the plurality of particles on the exposed surface by dry etching, thereby reducing the mass of the oscillator, thereby Increase the oscillation frequency of the oscillator. 5 · The method for manufacturing a time-frequency component 15 as described in item 1 of the scope of patent application, wherein step (a) further includes the following sub-steps: (al) the contacts of these wafers and the The pins of the substrate are electrically connected; (a2) A gel is filled between the chip and the substrate. 6. —A kind of time-frequency component, including: 20 —A substrate having a bottom wall and a side wall extending upward from a peripheral edge of the wide wall. The bottom wall cooperates with the side wall to define an opening having a capacity. Installation space, and the bottom wall is formed with an electrical circuit layout. The circuit layout is formed on the top surface of the bottom wall facing the accommodation space. A4 specification (210X297 mm) 511333 A8 B8 C8 D8 VI. Patent application feet; (Please read the precautions on the back before filling this page) A cover connected to one end of the side wall away from the bottom wall and closing the An opening in the accommodating space, the accommodating space is in a state of vacuum or airtightness; 5 a chip is disposed in the accommodating space, the chip has an oscillating circuit, and a plurality of corresponding to the pins A contact point; φ an oscillator is disposed in the accommodation space corresponding to the upper and lower sides of the chip, and the oscillator is electrically connected to the 10 oscillation circuit of the chip; and a frequency fine-tuning particle layer is formed in The On the surface of the oscillator, the frequency fine-tuning particle layer includes a plurality of particles spaced apart from each other to increase the mass of the oscillator and the oscillator, thereby reducing the oscillation frequency of the oscillator. 15 7. The time-frequency component according to item 6 of the scope of patent application, wherein the material of the frequency fine-tuning particle layer is selected from one of the following metals: gold, silver, network, IS, or a combination of two or more of the above metals . Page 14 This paper size applies to China National Standard (CNS) A4 (210X297 mm)
TW90133385A 2001-12-31 2001-12-31 Method for manufacturing time-frequency element and product thereof TW511333B (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103018561A (en) * 2012-11-30 2013-04-03 上海斐讯数据通信技术有限公司 Detection circuit and detection method of negative impedance of chip

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103018561A (en) * 2012-11-30 2013-04-03 上海斐讯数据通信技术有限公司 Detection circuit and detection method of negative impedance of chip

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