CN103018561A - Detection circuit and detection method of negative impedance of chip - Google Patents

Detection circuit and detection method of negative impedance of chip Download PDF

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Publication number
CN103018561A
CN103018561A CN2012105016308A CN201210501630A CN103018561A CN 103018561 A CN103018561 A CN 103018561A CN 2012105016308 A CN2012105016308 A CN 2012105016308A CN 201210501630 A CN201210501630 A CN 201210501630A CN 103018561 A CN103018561 A CN 103018561A
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China
Prior art keywords
chip
detected
crystal oscillator
impedance
negativity
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CN2012105016308A
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Chinese (zh)
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鲁灿
王玉娟
谢车
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Shanghai Feixun Data Communication Technology Co Ltd
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Shanghai Feixun Data Communication Technology Co Ltd
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Priority to CN2012105016308A priority Critical patent/CN103018561A/en
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Abstract

The invention relates to the technical field of electronic equipment and particularly relates to a detection circuit and a detection method of negative impedance of a crystal oscillator. A variable resistor and a detection crystal oscillator are connected between an input end and an output end of a chip to be detected with a preset frequency deviation in series, wherein the inner resistance of the detection crystal oscillator is less than a negative impedance absolute value of the chip to be detected; after the chip to be detected is electrified, the resistance value of the variable resistor can be changed from small to big; when the condition that the chip to be detected cannot work normally from normal work is detected, the resistance value of the variable resistor is recorded at the moment; the inner resistance of the detection crystal oscillator is utilized to obtain the negative impedance of the chip to be detected, namely the driving capability of the chip to be detected is accurately detected so as to select the optimal crystal oscillator to improve the stability of the follow-up operation of the system.

Description

Testing circuit and the method for the impedance of a kind of chip negativity
Technical field
The present invention relates to technical field of electronic equipment, relate in particular to testing circuit and the method for a kind of chip negativity impedance.
Background technology
At present, along with improving constantly of modern electronic equipment manufacturing process and technical merit, the IC chip integration is also more and more higher, and corresponding power consumption is also more and more lower, and then so that the driving force of chip also progressively weaken; And in the circuit that is provided with crystal oscillator (XTAL), the negativity resistance value of circuit board assemblies (Printed Circuit Board Assembly is called for short PCBA) is an important parameter, can determine the work that can PCBA stable.
(R) referring to that PCBA drives the ability of XTAL, is R such as the internal resistance of setting XTAL in the negativity impedance x, the negativity impedance of PCBA is-R; Only have and work as |-R|>R xThe time, XTAL just works, be that PCBA could work, and because SMT(Surface Mount Technology in the actual use procedure), the factors such as PCB oxidation, environment temperature, humidity all can produce on the negativity impedance of PCBA certain impact, so when design, require |-R|>5R d(R dResonance impedance for the crystal oscillator maximum), the so stable work of guarantee PCBA.
In the prior art, when carrying out circuit design, usually can not consider the factor of relevant negativity impedance, when carrying out circuit debugging, owing to also not detecting the method for negativity impedance, the slip-stick artist can only be rule of thumb by repeatedly attempting changing the XTAL of different model to look for the XTAL that " adapts " with the PCBA circuit characteristic; Owing to being rule of thumb to test, can confirm as long as can start XTAL |-R|>R xGet final product, but can't further confirm and can satisfy |-R|>5R dCondition, so so that in the use procedure of reality, can cause the stability of system's follow-up operation greatly to reduce, and then cause the decline of product yield.
Summary of the invention
For the problems referred to above that exist in the design of existing crystal oscillating circuit, testing circuit and the method for a kind of chip negativity impedance now is provided, detecting accurately the driving force of chip, and then select more excellent external crystal oscillator, to improve the stability of system's follow-up operation.
The objective of the invention is to be achieved through the following technical solutions:
The invention discloses the testing circuit of a kind of chip negativity impedance, wherein, comprise chip to be detected, variable resistor, detection crystal oscillator, the first electric capacity and the second electric capacity;
The output terminal of described chip to be detected is by described the first capacity earth, and the input end of described chip to be detected is by described the second capacity earth;
The output terminal of described chip to be detected successively by described variable resistor be connected the detection crystal oscillator and be connected with the input end of described chip to be detected.
The testing circuit of above-mentioned chip negativity impedance wherein, also comprises an oscillograph, and described oscillograph is connected with input end or the output terminal of described chip to be detected.
The testing circuit of above-mentioned chip negativity impedance, wherein, described variable-resistance maximum value is made as Rmax, Rmax ∈ (0,1 ] k Ω.
The testing circuit of above-mentioned chip negativity impedance, wherein, described chip to be detected is the circuit board assemblies of the good frequency deviation of adjusted.
The invention also discloses the detection method of a kind of chip negativity impedance, wherein, be applied to the testing circuit of chip negativity described above impedance, may further comprise the steps:
In connect successively variable resistor and detect crystal oscillator to the output terminal of described chip to be detected of an output terminal that sets the chip to be detected of frequency deviation;
Variable resistor is set after smallest end, gives described chip power to be detected;
If described chip cisco unity malfunction to be detected is then changed the less detection crystal oscillator of another internal resistance, until described chip to be detected can work;
If described chip to be detected normal operation then progressively increases by regulating the variable resistor resistance, until described chip to be detected can not work the time till, and write down described variable resistor resistance R this moment v, and then obtain this moment described chip to be detected the negativity impedance satisfy condition: |-R|=R v+ R r
Wherein, R vBe variable resistor resistance, R rThe actual internal resistance of the detection crystal oscillator that connects during for described chip normal operation to be detected, the negativity impedance when-R is described chip to be detected.
According to the formula of chip stable operation to be detected 1. the detection method of above-mentioned chip negativity impedance wherein, also comprises |-R|>5R dWith formula 2. |-R|=R v+ R rAs can be known:
If
Figure BDA0000249971841
, this detection crystal oscillator coincidence circuit characteristic demand then is described, can be used as the external crystal oscillator in this chip actual motion to be detected that sets frequency deviation;
Otherwise, illustrate that then this detection crystal oscillator does not meet the circuit characteristic demand, need to change the maximum resonance impedance less than
Figure BDA0000249971842
Crystal oscillator set external crystal oscillator in the chip actual motion to be detected of frequency deviation as this;
Wherein, R vBe variable resistor resistance, R rThe actual internal resistance of the detection crystal oscillator that connects during for described chip normal operation to be detected, R dThe maximum resonance impedance of the detection crystal oscillator that connects during for described chip normal operation to be detected ,-R is the described negativity impedance that sets the chip to be detected of frequency deviation.
The detection method of above-mentioned chip negativity impedance, wherein, if when detecting not starting of oscillation of crystal oscillator or described chip cisco unity malfunction to be detected, by adjusting the frequency deviation of described detection crystal oscillator, so that
Figure BDA0000249971843
The detection method of above-mentioned chip negativity impedance, wherein, the output terminal of described chip to be detected and input end are also respectively by the first electric capacity and the second capacity earth.
The detection method of above-mentioned chip negativity impedance, wherein, the input end of described chip to be detected or output terminal are connected with an oscillograph, to be used for showing the input end of described detection crystal oscillator or the electric signal of output terminal.
The detection method of above-mentioned chip negativity impedance, wherein, described variable-resistance maximum value is made as Rmax, Rmax ∈ (0,1 ] k Ω.
In sum, testing circuit and the method for a kind of crystal oscillator negative impedance of the present invention, by series connection variable resistor and internal resistance between the output terminal of the chip to be detected that sets frequency deviation and input end less than the detection crystal oscillator of this chip negativity impedance absolute value to be detected, after giving chip power to be detected, process is from little to the large variable resistor resistance that changes, when detecting chip to be detected from normal operation during to cisco unity malfunction, record variable-resistance resistance this moment, and utilization detects the internal resistance of crystal oscillator, draw this chip to be detected negativity impedance at this moment, namely detect accurately the driving force of this chip to be detected, and then select more excellent external crystal oscillator, to improve the stability of system's follow-up operation.
Description of drawings
Electrical block diagram when Fig. 1 is the detection of crystal oscillator negative impedance in the embodiment of the invention.
Embodiment
Below in conjunction with accompanying drawing the specific embodiment of the present invention is further described:
Electrical block diagram when Fig. 1 is the detection of crystal oscillator negative impedance in the embodiment of the invention.
As shown in Figure 1, a kind of testing circuit of crystal oscillator negative impedance, comprise chip IC to be detected, variable resistor VR, detect crystal oscillator Y1, the first capacitor C 1 and the second capacitor C 2, the output terminal OUT of this chip IC to be detected is by the first capacitor C 1 ground connection, input end IN is by the second capacitor C 2 ground connection, and output terminal OUT connect successively variable resistor VR be connected crystal oscillator Y1 after be connected with input end IN; Wherein, can connect an oscillograph at output terminal OUT or input end IN place, whether the output signal or the output signal that detect crystal oscillator Y1 with detection be normal, and then judge the duty of this chip IC to be detected.
Further, the maximum value scope of variable resistor VR is made as Rmax, and Rmax ∈ (0,1 ] k Ω, such as 500 Ω or 1k Ω etc.
When detecting, because the negativity impedance that the first capacitor C 1 that connects and C2 can affect chip IC to be detected, so need to be before detecting, adjust first the frequency deviation of this chip IC to be detected, and with the end end that places the resistance minimum of variable resistor VR, namely this moment variable resistor VR resistance be 0; Wherein, the detection crystal oscillator Y1 that is connected with chip IC to be detected this moment can rule of thumb select internal resistance less than the crystal oscillator of chip IC negativity impedance absolute value to be detected.
Secondly, power on for this chip IC to be detected after, observe the duty of this chip IC to be detected, can by the RST that inputs or outputs of the oscillograph detection crystal oscillator that arranges, also can directly check the running status of this chip IC to be detected; If chip IC work to be detected this moment is undesired, illustrate that then the detection crystal oscillator internal resistance of rule of thumb selecting does not meet the circuit requirement of this moment, need to reselect the detection crystal oscillator of a less internal resistance, until chip IC to be detected normal operation.
If chip IC normal operation to be detected, then (avoid on hand other factors such as static to touch resistance by non-conductive instrument such as nonmetal tweezers or nonmetal screwdriver etc., and then affect testing result) from little resistance to slowly adjusting greatly variable resistor VR, and observe simultaneously the duty of chip IC to be detected, when observing chip IC cisco unity malfunction to be detected, stop immediately adjusting variable resistor VR action, and record the resistance R of variable resistor VR this moment v
Then, according to circuit characteristic as can be known this moment this chip IC to be detected the negativity impedance condition that should satisfy be |-R|=R v+ R r, R wherein rThe actual internal resistance of the detection crystal oscillator that connects during for described chip to be detected normal operation, and then draw comparatively accurately the driving force of this chip to be detected of setting frequency deviation.
Afterwards, further according to chip IC to be detected can stable operation the circuit characteristic formula 1. |-R|>5R dWith formula 2. |-R|=R v+ R rJudge:
If
Figure BDA0000249971844
, this detection crystal oscillator Y1 coincidence circuit characteristic demand then is described, can be used as the external crystal oscillator of this chip IC to be detected that sets frequency deviation in actual motion;
Otherwise, illustrate that then this detection crystal oscillator Y1 does not meet the circuit characteristic demand, need to change the maximum resonance impedance less than
Figure BDA0000249971845
Crystal oscillator set external crystal oscillator in the chip actual motion to be detected of frequency deviation as this, also can be by adjusting the frequency deviation that detects crystal oscillator Y1 so that its frequency deviation reduces, reducing the negativity impedance-R of chip to be detected, and then satisfy
Figure BDA0000249971846
, and with the detection crystal oscillator after adjusting as the external crystal oscillator in this chip actual motion to be detected.
So, by the driving force (negativity impedance) according to detected this chip IC to be detected, and then adjust and detect crystal oscillator or select the maximum resonance impedance
Figure BDA0000249971847
Crystal oscillator, with the external crystal oscillator as this chip IC to be detected, to improve the stability of system's follow-up operation.
Further, if
Figure BDA0000249971848
, then behind the power supply that disconnects chip IC to be detected, when needing to change crystal oscillator, cut off chip IC to be detected and detect being connected of crystal oscillator Y1, satisfy condition by being replaced by the maximum resonance impedance
Figure BDA0000249971849
Crystal oscillator, stability that so can this chip IC follow-up operation to be detected of Effective Raise; Wherein, above-mentioned R vResistance during for the detecting of variable resistor VR during chip cisco unity malfunction to be detected, R rThe actual internal resistance of the detection crystal oscillator Y1 that connects during for chip IC normal operation to be detected ,-R is the negativity impedance that sets the chip IC to be detected of frequency deviation, R dBe the maximum resonance impedance.
Preferably, chip IC to be detected is the circuit board assemblies (PCBA) of the good frequency deviation of adjusted.
In sum, testing circuit and the method for a kind of crystal oscillator negative impedance of the present invention, by series connection variable resistor and internal resistance between the output terminal of the chip to be detected that sets frequency deviation and input end less than the detection crystal oscillator of this chip negativity impedance absolute value to be detected, after giving chip power to be detected, process is from little to the large variable resistor resistance that changes, when detecting chip to be detected from normal operation during to cisco unity malfunction, record variable-resistance resistance this moment, and utilization detects the internal resistance of crystal oscillator, draw this chip to be detected negativity impedance at this moment, namely detect accurately the driving force of this chip to be detected, and then select more excellent external crystal oscillator, to improve the stability of system's follow-up operation.
By explanation and accompanying drawing, provided the exemplary embodiments of the ad hoc structure of embodiment, based on the present invention's spirit, also can do other conversion.Although foregoing invention has proposed existing preferred embodiment, yet these contents are not as limitation.
For a person skilled in the art, read above-mentioned explanation after, various changes and modifications undoubtedly will be apparent.Therefore, appending claims should be regarded whole variations and the correction of containing true intention of the present invention and scope as.Any and all scope of equal value and contents all should be thought still to belong in the intent of the present invention and the scope in claims scope.

Claims (10)

1. the testing circuit of chip negativity impedance is characterized in that, comprises chip to be detected, variable resistor, detection crystal oscillator, the first electric capacity and the second electric capacity;
The output terminal of described chip to be detected is by described the first capacity earth, and the input end of described chip to be detected is by described the second capacity earth;
The output terminal of described chip to be detected successively by described variable resistor be connected the detection crystal oscillator and be connected with the input end of described chip to be detected.
2. the testing circuit of chip negativity according to claim 1 impedance is characterized in that, also comprises an oscillograph, and described oscillograph is connected with input end or the output terminal of described chip to be detected.
3. the testing circuit of chip negativity according to claim 1 impedance is characterized in that, described variable-resistance maximum value is made as Rmax, and Rmax ∈ (0,1 ] k Ω.
4. the testing circuit of chip negativity according to claim 1 impedance is characterized in that, described chip to be detected is the circuit board assemblies of the good frequency deviation of adjusted.
5. the detection method of chip negativity impedance is characterized in that, is applied to the testing circuit of the chip negativity impedance described in claim 1-4, may further comprise the steps:
In connect successively variable resistor and detect crystal oscillator to the output terminal of described chip to be detected of an output terminal that sets the chip to be detected of frequency deviation;
Variable resistor is set after smallest end, gives described chip power to be detected;
If described chip cisco unity malfunction to be detected is then changed the less detection crystal oscillator of another internal resistance, until described chip to be detected can work;
If described chip to be detected normal operation then progressively increases by regulating the variable resistor resistance, until described chip to be detected can not work the time till, and write down described variable resistor resistance R this moment v, and then obtain this moment described chip to be detected the negativity impedance satisfy condition: |-R|=R v+ R r
Wherein, R vBe variable resistor resistance, R rThe actual internal resistance of the detection crystal oscillator that connects during for described chip normal operation to be detected, the negativity impedance when-R is described chip to be detected.
6. the detection method of chip negativity according to claim 5 impedance is characterized in that, also comprises according to the formula of chip stable operation to be detected 1. |-R|>5R dWith formula 2. |-R|=R v+ R rAs can be known:
If , this detection crystal oscillator coincidence circuit characteristic demand then is described, can be used as the external crystal oscillator in this chip actual motion to be detected that sets frequency deviation;
Otherwise, illustrate that then this detection crystal oscillator does not meet the circuit characteristic demand, need to change the maximum resonance impedance less than
Figure FDA0000249971832
Crystal oscillator set external crystal oscillator in the chip actual motion to be detected of frequency deviation as this;
Wherein, R vBe variable resistor resistance, R rThe actual internal resistance of the detection crystal oscillator that connects during for described chip normal operation to be detected, R dThe maximum resonance impedance of the detection crystal oscillator that connects during for described chip normal operation to be detected ,-R is the described negativity impedance that sets the chip to be detected of frequency deviation.
7. the detection method of chip negativity according to claim 5 impedance is characterized in that, if when detecting not starting of oscillation of crystal oscillator or described chip cisco unity malfunction to be detected, and by adjusting the frequency deviation of described detection crystal oscillator, so that
Figure FDA0000249971833
8. the detection method of chip negativity according to claim 5 impedance is characterized in that, the output terminal of described chip to be detected and input end are also respectively by the first electric capacity and the second capacity earth.
9. the detection method of chip negativity according to claim 5 impedance is characterized in that, the input end of described chip to be detected or output terminal are connected with an oscillograph, to be used for showing the input end of described detection crystal oscillator or the electric signal of output terminal.
10. the detection method of chip negativity according to claim 5 impedance is characterized in that, described variable-resistance maximum value is made as Rmax, and Rmax ∈ (0,1 ] k Ω.
CN2012105016308A 2012-11-30 2012-11-30 Detection circuit and detection method of negative impedance of chip Pending CN103018561A (en)

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57113624A (en) * 1980-12-29 1982-07-15 Matsushita Electric Works Ltd Analog type timer
US4710731A (en) * 1985-07-15 1987-12-01 Seikosha Co., Ltd. Planar type thickness shear mode quartz oscillator
US20010038319A1 (en) * 1998-03-06 2001-11-08 Eiichi Hasegawa Quartz oscillation circuit and quartz oscillation integrated circuit device
TW511333B (en) * 2001-12-31 2002-11-21 Taitien Electronics Co Ltd Method for manufacturing time-frequency element and product thereof
KR20070062283A (en) * 2005-12-12 2007-06-15 주식회사 만도 Device for measuring negative resistance in oscillation circuit

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57113624A (en) * 1980-12-29 1982-07-15 Matsushita Electric Works Ltd Analog type timer
US4710731A (en) * 1985-07-15 1987-12-01 Seikosha Co., Ltd. Planar type thickness shear mode quartz oscillator
US20010038319A1 (en) * 1998-03-06 2001-11-08 Eiichi Hasegawa Quartz oscillation circuit and quartz oscillation integrated circuit device
TW511333B (en) * 2001-12-31 2002-11-21 Taitien Electronics Co Ltd Method for manufacturing time-frequency element and product thereof
KR20070062283A (en) * 2005-12-12 2007-06-15 주식회사 만도 Device for measuring negative resistance in oscillation circuit

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
陈乃塘: "石英振荡器不会动作,该怎么办?", 《电子与电脑》 *

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Application publication date: 20130403