CN107610734B - Power supply circuit of EEPROM and EEPROM - Google Patents
Power supply circuit of EEPROM and EEPROM Download PDFInfo
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- CN107610734B CN107610734B CN201710919951.2A CN201710919951A CN107610734B CN 107610734 B CN107610734 B CN 107610734B CN 201710919951 A CN201710919951 A CN 201710919951A CN 107610734 B CN107610734 B CN 107610734B
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Abstract
The invention discloses a power supply circuit of an EEPROM (electrically erasable programmable read-only memory) and the EEPROM, wherein the power supply circuit of the EEPROM comprises a clock signal pin, a data signal pin and a grounding pin, and the power supply circuit comprises a first diode and a capacitor; the clock signal pin is respectively and electrically connected with the anode of the first diode and the clock signal input end of the internal circuit; the data signal pin is electrically connected with the data signal input end of the internal circuit; one end of the capacitor is electrically connected with the cathode of the first diode and the power input end of the internal circuit respectively, and the other end of the capacitor is electrically connected with the grounding pin and the power output end of the internal circuit respectively. The invention provides a power supply circuit of an EEPROM and the EEPROM, which can supply working power to an internal circuit of the EEPROM under the condition of reducing one power line, thereby reducing the risk of interference caused by too long power line and facilitating wiring for a user.
Description
Technical Field
The present invention relates to the field of integrated circuit technology, and in particular, to a power supply circuit for an EEPROM (Electrically Erasable Programmable Read and Write Memory) and an EEPROM.
Background
As shown in fig. 1, the conventional EEPROM includes a total of 4 power supply lines and IIC (Inter-Integrated Circuit bus) communication lines. The power supply line comprises a power line and a grounding line, the power line is electrically connected with a voltage input pin VCC of the EEPROM, 3.3V direct current voltage is provided for the EEPROM through the power line, and the grounding line is connected with a grounding pin GND point of the EEPROM. The communication line comprises a clock signal input line and a data signal input line, the clock signal input line is electrically connected with a clock signal pin SCL of the EEPROM, the data signal input line is electrically connected with a data signal pin SDA of the EEPROM, and the clock signal pin SCL and the data signal pin SDA are respectively electrically connected with an external power supply 3.3V through a resistor. However, in an actual operation process, a power line connected to the EEPROM is often long, and thus the operating state of the EEPROM is easily disturbed.
Disclosure of Invention
The invention aims to overcome the defects that an EEPROM in the prior art is often long in power line and easy to interfere with the working state of the EEPROM, and provides a power supply circuit of the EEPROM and the EEPROM.
The invention solves the technical problems through the following technical scheme:
the invention provides a power supply circuit of an EEPROM (electrically erasable programmable read-only memory), which comprises a clock signal pin, a data signal pin and a grounding pin, wherein the power supply circuit comprises a first diode and a capacitor;
the clock signal pin is respectively and electrically connected with the anode of the first diode and the clock signal input end of the internal circuit of the EEPROM;
the data signal pin is electrically connected with a data signal input end of an internal circuit of the EEPROM;
one end of the capacitor is electrically connected with the cathode of the first diode and the power input end of the internal circuit respectively, and the other end of the capacitor is electrically connected with the grounding pin and the power output end of the internal circuit respectively.
Preferably, the power supply circuit further comprises a second diode;
and the anode of the second diode is electrically connected with the data signal pin, and the cathode of the second diode is electrically connected with the cathode of the first diode.
Preferably, the clock signal pin and the data signal pin are electrically connected to an external power source through a resistor, respectively.
Preferably, the resistance ranges from 1K Ω to 10K Ω.
Preferably, the external power supply is a 3.3V dc power supply.
Preferably, the first diode and the second diode are schottky diodes.
Preferably, the internal circuit of the EEPROM includes a communication circuit and a storage circuit;
the input end of the communication circuit is respectively and electrically connected with the clock signal input end of the internal circuit of the EEPROM and the data signal input end of the internal circuit of the EEPROM, and the communication circuit is electrically connected with the storage circuit;
the negative pole of the storage circuit is electrically connected with the grounding pin.
The invention also provides an EEPROM, which comprises the power supply circuit of the EEPROM.
The positive progress effects of the invention are as follows:
the power supply circuit of the EEPROM is characterized in that a clock signal pin of the EEPROM is electrically connected with a clock signal input end of an internal circuit and the anode of a first diode respectively, and a data signal pin of the EEPROM is electrically connected with a data signal input end of the internal circuit and the anode of a second diode respectively; one end of the capacitor is respectively electrically connected with the cathode of the first diode and the cathode of the second diode, the other end of the capacitor is electrically connected with the grounding pin, the charging process of the capacitor is realized, and under the condition of reducing one power line VCC, a working power supply is provided for an internal circuit of the EEPROM, so that the problem that the power line is too long and is easy to interfere is solved, the convenience is brought to a user to wire, and the actual requirements of the user are met.
Drawings
FIG. 1 is a schematic circuit diagram of an EEPROM in the prior art;
fig. 2 is a schematic circuit configuration diagram of a power supply circuit of an EEPROM according to embodiment 1 of the present invention;
fig. 3 is a schematic circuit diagram of an EEPROM in embodiment 2 of the present invention.
Detailed Description
The invention is further illustrated by the following examples, which are not intended to limit the scope of the invention.
Fig. 2 is a schematic circuit diagram of a power supply circuit of an EEPROM according to a preferred embodiment of the present invention.
In the power supply circuit of the EEPROM of the present embodiment, the EEPROM includes a clock signal pin SCL, a data signal pin SDA, a ground pin GND, and an internal circuit 1.
The power supply circuit comprises a first diode D1A second diode D2And a capacitance C.
Wherein the first diode D1And the second diode D2Are Schottky diodes for passing through the first diode D1And via a second diode D2The unidirectional transmission of the data signals avoids the mutual interference of the reverse transmission of the signals; at the same time, convected through the first diode D1And the second diode D2The high-frequency direct current power supply carries out rectification treatment, and stable direct current is obtained after filtering by a capacitor C to supply power to an internal circuit 1 of the EEPROM.
The clock signal pin SCL is respectively and electrically connected with the anode of the first diode D1 and the clock signal input end b of the internal circuit 1 of the EEPROM; the data signal pin SDA is electrically connected to the anode of the second diode D2 and the data signal input terminal a of the internal circuit 1 of the EEPROM, respectively. One end of the capacitor C is the first diode D1And the second diode D2And the other end is electrically connected with a ground pin GND for charging the capacitor C, thereby providing a working power supply for the internal circuit 1 of the EEPROM. The power input end C of the internal circuit 1 is electrically connected with one end of the capacitor C, and the power output end d is electrically connected with the other end of the capacitor C.
Wherein the clock signal pin SCL passes through a resistor R1Is electrically connected with an external power supply; the data signal pin SDA passes through the resistor R2Is electrically connected with an external power supply. Resistance R1And a resistance R2The resistance value range is 1-10K omega, and the specific resistance value is determined according to the practical application condition. The external power supply is a 3.3V direct-current power supply.
The internal circuit 1 of the EEPROM includes a communication circuit 11 and a storage circuit 12. The input end of the communication circuit 11 is electrically connected to the clock signal input end b of the internal circuit of the EEPROM and the data signal input end a of the internal circuit of the EEPROM, respectively, and the communication circuit 11 is electrically connected to the storage circuit 12, wherein bidirectional data transmission can be performed between the communication circuit 11 and the storage circuit 12, that is, the communication circuit has a readable and writable function. The cathode of the memory circuit 12 is electrically connected to the ground pin GND.
The EEPROM does not comprise a power supply pin, and the EEPROM does not need to be independently powered through the power supply pin.
The working principle of the power supply circuit of the EEPROM of the invention is as follows:
the invention is different from the EEPROM in the prior art that 4 lines, namely a power line, a grounding line, a clock signal input line and a data signal input line, are needed to be adopted when in normal communication work, but only 3 lines are adopted: the ground wire, the clock signal input wire and the data signal input wire realize that under the condition of reducing one power wire, the clock signal pin SCL of the EEPROM is respectively and electrically connected with the clock signal input end b of the internal circuit 1 and the anode of the first diode D1, and the data signal pin SDA of the EEPROM is respectively and electrically connected with the data signal input end a of the internal circuit 1 and the anode of the second diode D2; one end of a capacitor C is connected with a first diode D respectively1And a second diode D2The negative pole of (2) is electrically connected, and the other end is electrically connected with ground pin GND, carries out self charging process, provides working power supply for EEPROM's internal circuit to reduce because of the too long risk that easily receives the interference of power cord, and the user of being convenient for lays wire, satisfies user's actual requirement.
Example 2
As shown in fig. 3, the present embodiment further provides an EEPROM, and the EEPROM includes the power supply circuit of the EEPROM.
While specific embodiments of the invention have been described above, it will be appreciated by those skilled in the art that these are by way of example only, and that the scope of the invention is defined by the appended claims. Various changes and modifications to these embodiments may be made by those skilled in the art without departing from the spirit and scope of the invention, and these changes and modifications are within the scope of the invention.
Claims (8)
1. A power supply circuit of an EEPROM (electrically erasable programmable read-only memory), wherein the EEPROM comprises a clock signal pin, a data signal pin and a grounding pin, and is characterized in that the power supply circuit is arranged in the EEPROM;
the power supply circuit comprises a first diode and a capacitor;
the clock signal pin is respectively and electrically connected with the anode of the first diode and the clock signal input end of the internal circuit of the EEPROM;
the data signal pin is electrically connected with a data signal input end of an internal circuit of the EEPROM;
one end of the capacitor is electrically connected with the cathode of the first diode and the power input end of the internal circuit respectively, and the other end of the capacitor is electrically connected with the grounding pin and the power output end of the internal circuit respectively.
2. The power supply circuit of the EEPROM of claim 1, wherein the power supply circuit further comprises a second diode;
and the anode of the second diode is electrically connected with the data signal pin, and the cathode of the second diode is electrically connected with the cathode of the first diode.
3. The power supply circuit of the EEPROM of claim 1, wherein the clock signal pin and the data signal pin are electrically connected to an external power source through a resistor, respectively.
4. The power supply circuit of the EEPROM as claimed in claim 3, wherein the resistance has a value ranging from 1K Ω to 10K Ω.
5. The power supply circuit of the EEPROM of claim 3, wherein the external power source is a 3.3V dc power source.
6. The power supply circuit for an EEPROM of claim 2, wherein the first diode and the second diode are schottky diodes.
7. The power supply circuit of the EEPROM as claimed in claim 1, wherein the internal circuit of the EEPROM includes a communication circuit and a storage circuit;
the input end of the communication circuit is respectively and electrically connected with the clock signal input end of the internal circuit of the EEPROM and the data signal input end of the internal circuit of the EEPROM, and the communication circuit is electrically connected with the storage circuit;
the negative pole of the storage circuit is electrically connected with the grounding pin.
8. An EEPROM, characterized in that the EEPROM comprises a power supply circuit of the EEPROM according to any one of claims 1 to 7.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201710919951.2A CN107610734B (en) | 2017-09-30 | 2017-09-30 | Power supply circuit of EEPROM and EEPROM |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201710919951.2A CN107610734B (en) | 2017-09-30 | 2017-09-30 | Power supply circuit of EEPROM and EEPROM |
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| Publication Number | Publication Date |
|---|---|
| CN107610734A CN107610734A (en) | 2018-01-19 |
| CN107610734B true CN107610734B (en) | 2020-12-25 |
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| Application Number | Title | Priority Date | Filing Date |
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| CN201710919951.2A Active CN107610734B (en) | 2017-09-30 | 2017-09-30 | Power supply circuit of EEPROM and EEPROM |
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Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104079285A (en) * | 2013-03-29 | 2014-10-01 | 国基电子（上海）有限公司 | Signal line receiving circuit, signal line power supply circuit and signal line power supply system |
| CN204189163U (en) * | 2014-11-04 | 2015-03-04 | 广州明美电子有限公司 | A kind of based on I2C bus from machine feed circuit and device |
| CN204316130U (en) * | 2014-12-25 | 2015-05-06 | 江苏理工学院 | Battery power supply circuit based on GSM/GPRS module |
| CN106788370A (en) * | 2017-02-07 | 2017-05-31 | 湖南国科微电子股份有限公司 | Electronic device |
| CN107196770A (en) * | 2017-07-28 | 2017-09-22 | 深圳市瑞艾特科技有限公司 | The system being powered by signal wire |
-
2017
- 2017-09-30 CN CN201710919951.2A patent/CN107610734B/en active Active
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104079285A (en) * | 2013-03-29 | 2014-10-01 | 国基电子（上海）有限公司 | Signal line receiving circuit, signal line power supply circuit and signal line power supply system |
| CN204189163U (en) * | 2014-11-04 | 2015-03-04 | 广州明美电子有限公司 | A kind of based on I2C bus from machine feed circuit and device |
| CN204316130U (en) * | 2014-12-25 | 2015-05-06 | 江苏理工学院 | Battery power supply circuit based on GSM/GPRS module |
| CN106788370A (en) * | 2017-02-07 | 2017-05-31 | 湖南国科微电子股份有限公司 | Electronic device |
| CN107196770A (en) * | 2017-07-28 | 2017-09-22 | 深圳市瑞艾特科技有限公司 | The system being powered by signal wire |
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| Publication number | Publication date |
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| CN107610734A (en) | 2018-01-19 |
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