TW506058B - Method for profiling corner by chemical dry etching in shallow trench isolation process - Google Patents
Method for profiling corner by chemical dry etching in shallow trench isolation process Download PDFInfo
- Publication number
- TW506058B TW506058B TW90119227A TW90119227A TW506058B TW 506058 B TW506058 B TW 506058B TW 90119227 A TW90119227 A TW 90119227A TW 90119227 A TW90119227 A TW 90119227A TW 506058 B TW506058 B TW 506058B
- Authority
- TW
- Taiwan
- Prior art keywords
- layer
- silicon
- shallow trench
- item
- patent application
- Prior art date
Links
Landscapes
- Element Separation (AREA)
- Drying Of Semiconductors (AREA)
Abstract
Description
發明領域: 是右ΐ發明係有關於—種半導體製程中的蝕刻方法,特別 疋有關於一種於淺渠溝隔離(Shall〇w Trench :,1&二成:=,中利用化學乾姓刻法將氮化石夕層後 床 以形成圓化邊角的方法。 發明背景: 以才ίίΐρ在半^體製程上’力先進的積體電路製程中,可 以在有限面積的石夕表面卜 夕 ^ τ ^ t; H ^ ^ # a ^杈進夕達數十萬的MOS電晶體, ’便電曰曰體與電曰曰體之間的操 母個積體電路上的電晶體,盥邳卞復义而將 產生短路。場氧化層(^ e i f '電/體相隔離,避免 件中的主動區域(active reg^ d\)的目的係在隔絕元 化声之开彡成方沐筏权 §1〇nS ) ’目前最常用的場氧 〇fsnιΛΛΤΓ 0 dation 之前,LOCOS是被普遍使用所以在〇. 25以m製程 製程有鳥嘴效應及場氧化層細化r f離I耘’但由於LOC〇S 、的門日篇在六 , 、 ^ 1 g 1 d oxide thinning 做為二【ΐ ’ i 5"m以下的元件,無法再使用LOCOS 做马兀仵絕緣,取而代之焱渠 uo 的絕緣隔離製程,相較於L0C0S:邑 離製程有較好的防死拴(Latch_up '離I程,!τ絕緣隔 寬度’並幻肖除傳編⑽料/力’m的通道 應,並具有較佳的平坦 耘中常有的鳥嘴效 代LOCOS絕緣隔離製程,成A _ 進的半導體製程中取 製私成為絕緣隔離製程主流,以解決Field of the Invention: The invention relates to an etching method in a semiconductor process, and particularly to a method for isolation in shallow trenches (ShallOw Trench :, 1 & 20%: =). A method for forming a rounded corner by forming a layer of nitrided stone. BACKGROUND OF THE INVENTION: In the advanced integrated circuit manufacturing process in which the power is advanced, the surface of the stone with a limited area can be used. ^ t; H ^ ^ # a ^ The MOS transistor which has reached hundreds of thousands, "The transistor on the integrated circuit between the electric body and the electric body is a complex transistor. A short circuit will occur. The field oxide layer (^ eif 'electrical / bulk isolation, to avoid active reg ^ d \) in the part is to isolate the opening and closing of the elementary sound §1〇nS ) 'Before the most commonly used field oxygen 〇fsnιΛΛΤΓ 0 dation, LOCOS was widely used, so in the 0.25 m process process there is a bird's beak effect and the field oxide layer refinement rf away from I', but due to LOC〇S, The Month of the Month is at 6, ^ 1 g 1 d oxide thinning as two [ΐ 'i 5 " m or less Components, it is no longer possible to use LOCOS for horse vulture insulation, and replaced it with a trench isolation insulation process. Compared with the L0C0S: Yali process, it has better anti-death bolts (Latch_up 'I process,! Τ insulation separation width' and magic shaw In addition to programming the channel of material / force'm, it has a better flat beak commonly used in the LOCOS insulation and isolation process. It becomes the mainstream of the insulation and isolation process in the semiconductor process. solve
第4頁 五、發明說明(2) 〇S-的π鳥而鳴二效應所產生的場氧化層細化等問題。 面先开4 =STI之絕緣隔離結構,係先在一底材石夕表 = 氧化層’在於其上沈積-層氮切層在 此鼠化矽層形成一圖牵化 θ 在 域,並利用蝕刻枯输^出一、曰,以定義出所要蝕刻之區 避免因淺竿溝二構邊^右:淺渠溝(trench)結構。為了 製程的固雞♦、σ邊角有接近直角的外形,導致增加後續 、、 '又’因此在淺渠溝結構之矽邊角通當合爲:r二 -圓弧外形(Profile),習,二之矽邊角通书會再形成 方法將氮化石夕層後推,以////用如濕银刻或氧化等 圓弧邊角H缺以所^夕表面的部份邊、緣’再形成Page 4 V. Description of the invention (2) Problems such as refinement of the field oxide layer caused by the π bird-song effect of θS-. First open the surface 4 = STI insulation isolation structure, the first is a substrate Shi Xi surface = oxide layer 'is deposited on it-a layer of nitrogen cut layer on this siliconized silicon layer to form a picture pull θ in the domain, and use Etching and drying output 出, 一, to define the area to be etched to avoid the formation of edges due to shallow pole trenches. Right: shallow trench structure. In order to solidify the process, the corners of σ have a shape close to a right angle, which leads to an increase in the follow-up. Therefore, the silicon corners in the shallow trench structure are combined into: The second method of the silicon corner and corner book will be re-formed to push back the nitride layer, and use /// such as wet silver engraving or oxidation to cut off the edges and edges of the surface. 'Reform
oxide)於淺渠溝中,再絲f南密度電漿氧化層(HDP t .由㈣過氮切層移除等多次的濕式化學洗淨Uet ralcal clean),造成STI表面邊角處形成凹陷圓曲 (訂ap rounding)現象,產生—凹陷圓曲 Γ二1:=導致氧化層無法覆蓋湖邊角,使得 在進仃下一。人的熱氧化時,此凹陷 化成長不均勻,進而在STI邊緣產 Y象^•成,熱乳 次臨限電流頸結效應(d bl i ' 潰^e-breakd〇wn)等電性里m南電場及預先崩 寸电Γ生吳韦的情形,使半導體元件 無法有效的發揮其電氣特性。 因此:本發明即在針對上述之缺失,#出 以 y刻法來製作STI圓弧邊角的方法,以克服上述之缺 5〇6〇58 五、發明說明(3) 發明目的及概述: 本發明之主要目的係在利用化學乾蝕刻方法,蝕刻氮 化石夕層,使其向後推露出矽頂邊角(top-coner),再對 該邊角進行蝕刻步驟而將淺渠溝之頂邊角圓弧化,以利後 續製程的進行。 本發明之另一目的係提供一種形成淺渠溝之圓弧邊角 的方法,使其在後續淺渠溝隔離完成後,可避免在淺渠溝 邊角產生凹陷圓曲(wrap rounding)的現象,以避免產 生寄生元件之電性異常的現象。 本發明之又一目的係在提供一種在淺渠溝隔離製程中 可快速形成圓弧化邊角之方法,其係具有製程時間最簡短 之功效。 本發明之再一 氮化石夕層後 學乾韻刻將 的側向姓刻 為達到 程中利用化 驟:首先在 圖案化光阻 結構。而後 法,將該氮 再利用石夕對 推之方 氮化石夕 的效率 上述之 學乾蝕 一矽底 ,以圖 ’利用 化矽層 氮化石夕 目的係 法,相 層後推 〇 目的, 刻形成 材上沈 案化光 氮化石夕 向後推 之選擇 在提出一種以化學乾蝕刻技術將 較於其他同次(in-situ)以化 之方法而言,本發明係具有較佳 本發明提供一種在淺渠溝隔離製 圓弧化邊角之方法,包括下列步 積一氮化矽層,在其表面形成一 阻為罩幕,進行蝕刻形成淺渠溝 對石夕之選擇比較高的化學乾蝕刻 ’以露出淺渠溝表面之石夕邊角。 比高的化學乾蝕刻法將矽邊角圓oxide) in shallow trenches, and then re-fed the South Density Plasma Oxide (HDP t. Uet ralcal clean) by repeated wet chemical cleaning such as removal of the nitrogen passivation layer, resulting in the formation of corners of the STI surface. The phenomenon of ap rounding (sag rounding) occurs—the sag rounding Γ 2: 1: causes the oxide layer to fail to cover the corners of the lake, which leads to the next step. During human thermal oxidation, this depression develops unevenly, and then produces Y-images at the edges of the STI. The thermal current subthreshold current neck-knot effect (d bl i 'e-breakd〇wn) and other electrical properties The situation of the south electric field and the generation of Wu Wei in advance makes it impossible for the semiconductor device to effectively exert its electrical characteristics. Therefore, the present invention is directed to the above-mentioned shortcomings, and #the method of making STI arc corners with the y-cut method is used to overcome the above-mentioned shortcomings. 560858 5. Description of the invention (3) Purpose and summary of the invention: The main purpose of the invention is to use a chemical dry etching method to etch the nitride nitride layer to push back the silicon top corner (top-coner), and then perform an etching step on the corner to remove the top corner of the shallow trench. Arcing to facilitate subsequent processes. Another object of the present invention is to provide a method for forming rounded corners of shallow trenches, so that after the subsequent isolation of shallow trenches, it is possible to avoid the phenomenon of wrap rounding at the corners of shallow trenches. To avoid the phenomenon of electrical abnormality of parasitic elements. Another object of the present invention is to provide a method for quickly forming arc-shaped corners in a shallow trench isolation process, which has the shortest processing time. Another aspect of the present invention is to learn the engraving of the lateral surname after the dryness of the nitrided stone layer. To achieve this, the first step is to pattern the photoresist structure. Then, the efficiency of the nitrogen reuse Shi Xi to push the square nitride Shi Xi is dry etched on a silicon substrate, in order to use the method of silicon nitride layer nitride Xi Xi, the method is used to push the phase layer back to 0 purpose. The formation of the photo-nitride stone sinking in the formation material is pushed backward. In terms of proposing a method using chemical dry etching technology to compare with other in-situ methods, the present invention has better The method for isolating the rounded corners in a shallow trench includes the following steps: depositing a silicon nitride layer, forming a barrier on the surface, and etching to form a shallow trench with a relatively high chemical resistance to Shi Xi. Etch 'to expose the stone corners of the surface of the shallow trench. Higher chemical dry etching rounds silicon corners
麵surface
第6頁Page 6
10矽底材 1 2石夕邊肖 14圓弧邊角 20墊氧化層 30 氮化矽層 40 光阻層 42蝕刻窗 50淺渠溝 詳細說明: 刻將ί ί明ί提出一種在淺渠溝隔離製程中利用化學乾蝕 i虱化矽後推,增加圓弧化邊角的方法。第一圖至 圖係描繪此蝕刻方法的製程與步驟。 如第一圖所示,提供一半導體矽底材1〇,其上已完成 有前段製程的基礎元件,為簡化整個圖形結構了位於半導 體矽底材10内的MOS電晶體結構等基礎元件,暫時忽略不 予表不。在半導體矽底材10表面,利用熱氧化沈形成 屬058 五、發明說明(5) 一層墊氧化層20,通常為二氧化矽層,並使之平坦化, 下來再利用爐官於該墊氧化層2〇上沈積一層氮化矽層, ^於氮化石夕層30與石夕底材10之間的應力很大,需要 氧化層2 0做為兩者間的缓衝層,以消除矽底10 silicon substrate 1 2 Shi Xibianxiao 14 circular arc corner 20 pad oxide layer 30 silicon nitride layer 40 photoresist layer 42 etched window 50 shallow trenches In the isolation process, chemical dry etching is used to push back silicon to increase the arc angle. The first figure to the figure depict the process and steps of this etching method. As shown in the first figure, a semiconductor silicon substrate 10 is provided, on which the basic components of the previous process have been completed. To simplify the overall pattern structure, basic components such as MOS transistor structures located in the semiconductor silicon substrate 10 are temporarily provided. Ignore it. On the surface of the semiconductor silicon substrate 10, genus 058 is formed by thermal oxidation deposition. 5. Description of the invention (5) A pad oxide layer 20, usually a silicon dioxide layer, is flattened. A silicon nitride layer is deposited on the layer 20. The stress between the nitride layer 30 and the substrate 10 is very large, and the oxide layer 20 is required as a buffer layer therebetween to eliminate the silicon substrate.
石^3〇之應力。接著,進行微影㈣製程,於氮化;;H “:ί:一層光阻層,1利用黃光顯影蝕刻技術形成-圖 /、 光阻層40,其係具有適當尺寸之蝕刻窗42,以定羞 出所要蝕刻的淺渠溝大小與位置。 疋義 定義出蝕刻淺渠溝之;;小後,使用現有蝕刻技術, ^成淺渠溝50,>第二圖所示,以圖案化光阻層4〇為 ί化=去:自钱刻窗42露出的氮化石夕層30及其底下的墊 乳化層20,直至蝕刻部份矽基材1〇為止,以形成淺The stress of stone ^ 30. Next, a lithography process is performed, and nitriding; H ": a layer of photoresist layer, 1 is formed using a yellow light development etching technique-figure /, photoresist layer 40, which is an etching window 42 with an appropriate size, The size and position of the shallow trenches to be etched are determined according to the definition. After definition, the shallow trenches are etched using the existing etching technology to form the shallow trenches 50, and the pattern is shown in the second figure. The photoresist layer 40 is changed to go to: the nitride stone layer 30 exposed from the engraved window 42 and the pad emulsified layer 20 under it, until a portion of the silicon substrate 10 is etched to form a shallow layer.
所ί後即去除該圖案化光阻4〇,如第三圖所示。、蝕刻 製釭所使用的氣體為四氟化碳及氧氣(CF :階段之餘刻步驟;其中,由於淺渠溝5〇係利 為向第 (Anis〇tropic)之乾蝕刻技術所形成的, 接 9〇〇的直角外形(pr〇fUe) 。 /、有接近 接下來進行第二階段蝕刻步驟,首先,利用 矽之蝕刻率選擇比較高且為均向性蝕刻的化蝕蝕 刻該氮化石夕層30及塾氧化層2〇之邊緣, J =钕 Ϊ準氮化卿及塾氧化層2〇往後推,以I 夂渠溝50表面且呈垂直外形的矽邊角i 2, " 了層則使用之氣體為四a化碳、氧氣及氮氣(cC ),且3虱化矽對矽之蝕刻率選擇比係大於1 (SiN/Si2 >2After that, the patterned photoresist 40 is removed, as shown in the third figure. The gas used for etching is carbon tetrafluoride and oxygen (CF: the remaining step of the stage; among them, the shallow trench 50 is formed by the dry etching technology of Anisotropic), It is connected to a 90 ° right angle profile (pr0fUe). /. It is close to the second stage of the etching step. First, the silicon nitride is etched using a relatively high etching rate of silicon and is an isotropic etching. The edges of the layer 30 and the samarium oxide layer 20, J = neodymium, quasi-nitride layer and samarium oxide layer 20 are pushed backwards, and the silicon corner i 2 with a vertical shape on the surface of the radon trench 50 is " The gas used in the layer is carbon tetraoxide, oxygen, and nitrogen (cC), and the etching rate selection ratio of silicon to silicon is greater than 1 (SiN / Si2 > 2
第8頁 隶後如第五圖所示,剎田访拟斤 ,局且為均向性钱刻的化風‘ =2化石夕之银刻率選擇比 直外形予以圓弧化,即可:ίί:法將矽邊角12表面之垂 弧邊角1 4 ;且該欲料γ 在次木溝50之頂邊角處得到該圓 (Si/SiN > J )°^0 虱匕矽對矽之蝕刻率選擇比係大於1 (如沈積製程/二::溝之圓弧邊角後,有利後續製程 f,可避免匕::角;溝隔離製程完成 ^ ;象’以避免產生寄生元件: = =;:nding 者,本發明利用化皋菸钻^ 电性異吊的現象。再 相較於習用濕蝕刻或氧化二方η:矽層蝕刻向後推, 石夕層後推之古;_品冋-人(in_situ)以化學乾蝕刻將氮化 :層後推之方法而t,本發明則具有較佳的側向餘刻的效 本發明除了應用在淺渠溝 半導體製程中需要形成圓弧邊 明之方法來解決,詳細之製程 不再贅述。 隔離結構中之外,對於其他 角之蝕刻製程亦可以用本發 皆可參考上面所述,故於此 以上所述之實施例僅係為說明本發明之技術思想及特 點、’其目的在使熟習此項技藝之人士能夠瞭解本發明之内 谷並據以貫施,當不能以之限定本發明之專利範圍,即大 凡依本發明所揭示之精神所作之均等變化或修飾,仍應涵 蓋在本發明之專利範圍内。 506058 圖式簡單說明 圖式說明: 第一圖至第五圖為本發明形成淺渠溝及其圓弧邊角的連續 步驟示意圖。 第10頁As shown in the fifth picture on page 8 of Lihou, the Tiantian visit to Jinjin is localized, and the engraved wind is equal to the engraved wind '= 2 The fossil eve's silver engraving rate is selected to be rounded than the straight shape, and you can: ίί: The angle of the vertical arc on the surface of the silicon corner 12 is 1 4; and the expected γ is obtained at the top corner of the Jimugou 50 (Si / SiN > J) ° ^ 0 The silicon etching rate selection ratio is greater than 1 (such as the deposition process / two :: after the corner of the groove arc, it is beneficial to the subsequent process f, which can avoid the dagger :: angle; the trench isolation process is completed ^; elephant 'to avoid parasitic elements : = = ;: nding, the present invention makes use of the phenomenon of chemical 皋 smoke drill ^ electrical different hanging. Then compared to the conventional wet etching or oxidation of two square η: silicon layer etching backwards, Shi Xi layer backwards ancient; _ 品 冋 -ren (in_situ) chemical dry etching method to push back the nitride: layer and t, the present invention has better side effect. The present invention needs to be formed in addition to the application in the shallow trench semiconductor process The method of solving the problem of the circular arc is clear, and the detailed process will not be described in detail. In addition to the isolation structure, the etching process of other corners can also be used in this publication. Therefore, the embodiments described above are only for explaining the technical ideas and characteristics of the present invention, and its purpose is to enable those skilled in the art to understand the inner valley of the present invention and implement it accordingly. The limitation of the scope of the patent of the present invention, that is, all equal changes or modifications made in accordance with the spirit disclosed by the present invention, should still be covered by the scope of the patent of the present invention. 506058 Brief description of the drawings The figure is a schematic diagram of the continuous steps of forming a shallow trench and its arc corners according to the present invention. Page 10
Claims (1)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
TW90119227A TW506058B (en) | 2001-08-07 | 2001-08-07 | Method for profiling corner by chemical dry etching in shallow trench isolation process |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
TW90119227A TW506058B (en) | 2001-08-07 | 2001-08-07 | Method for profiling corner by chemical dry etching in shallow trench isolation process |
Publications (1)
Publication Number | Publication Date |
---|---|
TW506058B true TW506058B (en) | 2002-10-11 |
Family
ID=27621880
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
TW90119227A TW506058B (en) | 2001-08-07 | 2001-08-07 | Method for profiling corner by chemical dry etching in shallow trench isolation process |
Country Status (1)
Country | Link |
---|---|
TW (1) | TW506058B (en) |
-
2001
- 2001-08-07 TW TW90119227A patent/TW506058B/en not_active IP Right Cessation
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN105448984B (en) | A kind of FinFET and preparation method thereof | |
CN104078366B (en) | The fin structure manufacture method of Dual graphing fin transistor | |
CN102473635A (en) | Method for manufacturing a semiconductor device | |
KR100741876B1 (en) | Manufacturing method of semiconductor device having trench isolation prevented from divot | |
TW200529317A (en) | Semiconductor device with trench isolation structure and method for fabricating the same | |
CN104183470B (en) | A kind of manufacture method of semiconductor devices | |
TW200537617A (en) | Method for fabricating semiconductor device having trench isolation | |
TW402789B (en) | Method of forming planar isolation and substrate contacts in simox-soi | |
TW506058B (en) | Method for profiling corner by chemical dry etching in shallow trench isolation process | |
US6867143B1 (en) | Method for etching a semiconductor substrate using germanium hard mask | |
CN107464741A (en) | A kind of semiconductor devices and its manufacture method, electronic installation | |
CN103578917B (en) | A kind of method of the critical size for reducing metal hard mask layer | |
TWI532123B (en) | Memory device and method of manufacturing memory structure | |
KR100661236B1 (en) | Method of fabricating the floating gate in flash memory device | |
KR100856614B1 (en) | Method for forming sti in semiconductor device and its structure | |
KR100596431B1 (en) | Patterning method using top surface imaging process by silylation | |
US20090170276A1 (en) | Method of Forming Trench of Semiconductor Device | |
KR20070047042A (en) | Method for fabrication the same of semiconductor device with recess gate of flask shape | |
KR20070062735A (en) | Method for fabricating the same of semiconductor device with isolation | |
TWI508222B (en) | Method for forming trenches and trench isolation on a substrate | |
CN108831829A (en) | A kind of side wall gate isolation etched membrane layer technique under division grid structure | |
CN108962921A (en) | Semiconductor device and its manufacturing method | |
CN108807267B (en) | Semiconductor device and method for manufacturing the same | |
JP2017535075A (en) | Method for self-aligned reverse active etching without photolithography | |
JP2023098661A (en) | Semiconductor structure and method of manufacturing the same |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
GD4A | Issue of patent certificate for granted invention patent | ||
MK4A | Expiration of patent term of an invention patent |