TW502421B - Memory module having stacked chips and the manufacturing process - Google Patents

Abstract

The present invention provides a kind of memory module. In the invention, the first printed circuit board and the second printed circuit board are connected and stacked with the connecting pins on both sides of the first standard memory integrated circuit (IC) and the second standard memory IC so as to form a standard memory IC set having stacked chips. The present invention also provides the manufacturing process of the memory module, in which the connecting pins of plural standard memory ICs are soldered to a printed circuit board by using surface mount technique so as to form a memory module having stacked chips. Thus, the production cost of the memory module is lowered and the product yield is increased.

Description

502421 V. Description of the Invention (1) [Technical Field of the Invention] The present invention relates to a memory module having a stacked chip and a manufacturing process thereof, and in particular, a memory module having a high capacity as defined by the JEDEC Association and Its manufacturing process [Background of Invention and Known Technology]

. The self-body module is formed by soldering a plurality of dynamic random access memory (DRAM) chips on a printed circuit board. Its applications, especially high-capacity memory modules, are more necessary components for high-tech products and greatly affect the performance of the system. For example, every server or personal computer needs to be installed with sufficient random access memory 'from the random access memory required by earlier personal computers 6MB, 32Mβ, or 64MB to the server Volumes of 256MB, 512μβ, or 1GB all increase geometrically. At present, the maximum capacity of standard memory integrated circuit is 256Mb TSOP 54Pin package. However, to form a 1GB memory module, 32 standard memory integrated circuits are required. With the memory module designed based on this, not only the space of the system host cannot be accommodated, but also the memory module and module signal routing will exceed the specifications set by the JEDEC Association and affect performance. If 256Mb memory is to be increased to 5 1 2Mb memory, 64Mx4 memory modules must be stacked into 128M4 or 64Mx8 memory modules. That is, the number and volume of the IC particles of the memory module must be doubled, which also causes difficulties in the design and manufacture of the host. For the foregoing problem, increasing the capacity of the dynamic random access memory chip is the simplest solution. In the foregoing example, if the dynamic random access memory

502421 V. Description of the invention The capacity of the memory chip can be increased to 128M4 or 64Mx8, which can be achieved with the same number and experience: pull group. However, the state-of-the-art RAM chip is not so easy to complete and involves changes to the process and design of the chip. The industry has also developed another simple and feasible solution, that is, more than one standard memory integrated circuit is connected in parallel in a #, thereby stacking into a memory module with increased capacity. There are two methods for memory modules with a stack of chips: 丨 · Welding the pins of a standard memory integrated circuit directly to form a stack; and 2 • Jumper the die of the memory and body circuit Way to connect. Related related technologies are disclosed in U.S. Patent Nos. 5,91 0,685,5,708,298,5,334,875, and 0 2 8 ′ 9 8 6. However, the first method has a direct welding process because the standard " Hidden Circuit has 5 or 4 pins and its spacing is narrow. The other method involves changes in the process and design of the chip, which is not ordinary memory. Module makers are easy to achieve. OBJECTS AND SUMMARY OF THE INVENTION] The main purpose of t = is to provide a memory module, which has a male crystal R, Pak, and Shizhuang, which can simplify the process, to reduce the manufacturing cost of the memory module. . I > v The invention of the present invention (another purpose is to provide a memory module manufacturing process, which uses a circuit Γ to hold technology to solder the pins of a standard memory integrated circuit in a print * instead forming a stack Memory Modules for Chips-Another objective in the process is to provide a memory module, which is manufactured by welding two standard memory integrated circuits that have been fabricated on a board to two sides of a specially designed printed circuit brush to form a stacked chip. Therefore, the memory module can be surface-adhered on both sides of the printed board, and a plurality of memory modules 502421 are manufactured at the time of manufacture. 5. Description of the invention (3) Each process of the group is right π. A printed circuit board can be provided. The process of completing the 'consistent process' does not reach the process of mass production every day. -f memory module ’two of which are standard 标准 κκ ~ connected to both sides of a printed circuit board to form a body module with # 二 = # > Therefore, the contacts of the memory module can be guaranteed to be stable and the yield of the product can be maintained. [Means for Solving the Problem] In view of the problems caused by the conventional Yu, Zhishi, β, and Baiji, the present invention uses a low-cost printed circuit board to replace Giga + Japan, generation direct & processing or wafers It is difficult to make changes in the manufacturing process and design. In combination with Shidan Yuan Bei, | This product can not be mass-produced, so that this product can be mass-produced. 0 ϋ Z = ί f stacked memory module and its manufacturing process, there are many Excellent ^ / ,, 仏: Get further understanding from the following detailed description and the attached drawings. [Simplified description of the drawings] Figure: A perspective view of the memory module of the present invention; = 2 is the standard in Figure 1 Three-dimensional structure diagram of the memory integrated circuit group; ^ 2 2 Schematic diagram of the pin signals of the standard memory integrated circuit shown in Fig. 2; ep: ^ Schematic diagram of the structure of the printed circuit board of the present invention, of which Figure 4 (A) is a perspective view of the road plate Figure 4 (B) shows the printed circuit board in the printed circuit board.卩 Three-dimensional view and Figure 4 (c) is a schematic diagram of the pin signals of a printed circuit board. Figure 5 is a block diagram of the memory module manufacturing process of the present invention. Figure 6 is a schematic diagram of the memory module manufacturing process. six

Page 6 502421 Five (4) Description of the invention > f IV # 1. ^ ^ ^ ^ ® 4 ^ ^, 軚 Standard connected to the printed circuit board § Memories: the integrated circuit is soldered to the printed circuit board Figure 4 (C) is a completed perspective view of the second standard recording circuit board. β 图 六 〇>) is printed [Explanation of the drawing number] 1 5 body module 1 〇 substrate :: standard memory integrated circuit group 11a, 11b standard ia '11 lb printed circuit board 112 through hole α, -" I 1 3 Conductive wire 1 1 .4 Closed hole II 5 Cut-off wire 2 〇 Position of printed circuit board 21 [Detailed description of the invention] Please refer to Figure 1. Memory modules are usually used for personal computers, Dynamic random access memory of a notebook computer or server. The memory module can be a synchronous dynamic random access memory (SDRAM) specification, a double data transfer (DDR) specification, or a random access memory. The specifications of the bus (RAM Bus) include: a substrate 10, a plurality of standard memory integrated circuit groups 1 soldered to the substrate 丨 0, a plurality of gold fingers 1 formed at one end of the substrate 10, The positioning grooves 13 and the positioning holes 14 are formed by stacking each standard memory integrated circuit group 11 with a first standard memory integrated circuit 丨 a located above and a second standard memory integrated circuit 11 b located below. Cheng, cheats 1 2 can interface with the host computer, such as ... Wei interface connector body, electrical connection for transmitting digital data, and the positioning groove 13 and the positioning hole 4 and a memory of the host computer is connected with the host computer in a fixed memory module 1

Page 7 502421 V. Description of the invention (5). Recall! The structure of the body circuit group 11. Standard memory integrated circuit board i ί 2 = f the first printed circuit board 11 ia and the second printed circuit serially stacked the first standard memory integrated circuit 11 a and the second standard memory = two sides of the body ^ m Pin, and the better connection method is to use table = technology, (surface mount technology, smt). It is noteworthy that 7 k =, the second printed circuit board 111 a and the second printed circuit board 111 b form two sides of the 1 lb pin of the PΓ standard memory integrated circuit and have a width approximately equal to that of the two integrated circuit 1 la The length of the pins is equivalent, so adding the first printed circuit board 111a and the second printed circuit board 111b does not substantially increase the volume of the stack and can achieve the effect equivalent to directly welding two standard memory products. #. Following the performance, refer to FIG. 3, which shows the schematic diagram of the pin signals of the first standard memory integrated circuit > λα & and the first "quasi-chronological memory circuit 11 b". The current H ^ quasi ^ ^ ^ 54 parallel sides of the body = 'Among them _, # 5, u, 44 and 50 #, dq5 and # u & feet respectively represent data lines and other pins are control signal lines and i 4 In the text, we will refer to the standard of the pin number of the standard memory integrated circuit. The "stacked connection structure of the first integrated memory integrated circuit 1a and the second standard integrated memory integrated circuit lib." February 2 ΐ Standard The memory integrated circuit group 11 is manufactured in the same printed circuit as shown in Figure 4. 'The printed circuit board 20 includes a plurality of two = row seventh printed circuit boards 11 la and a second printed circuit board 11 lb. , = I mother—printed circuit boards 11 la and 11113 correspond to standard memory integrated circuits, and “the first standard memory integrated circuits 11 a with a few pin counts are adhered to the printed circuit board.

No. 8 1 502421 V. Description of the invention (6) ':-Brush the first printed circuit board 11 la and the second printed circuit board 11 lb corresponding to the circuit board 20 respectively, and then place the second standard memory integrated circuit 1 lb The first memory board 1 1 1 a and the second printed circuit board 1 1 1 b can be glued to the corresponding positions to complete the manufacture of the standard memory integrated circuit group 11. For details about the memory module 1 The process will be described in detail later. The structure of the printed circuit boards nia and 111b will be described with reference to FIGS. 4 (B) and 4 (C). Among them, FIG. 4 (B) is the first printed circuit board II la and the second printed circuit board mb on the printed circuit board 20. Part of the enlarged view. As shown in the figure, the width of the first printed circuit board 111a and the second printed circuit board 111b is approximately the same as that of standard memory, and the width of the body circuit pins is equivalent. Since the structures of the first printed circuit board IIIa and the first printed circuit board 111b are completely symmetrical and the same, the following description will be described using only the first printed circuit board n 丨 a. The first printed circuit board 111 a is a double-sided printed circuit board having a slightly elongated rectangular parallelepiped shape, and has 27 points evenly arranged thereon, and the position of each point corresponds to one side pin of a standard memory integrated circuit. Points 5 and 1; 1 form closed holes 114 and other points form through holes 112. In addition, a conductive line 113 is also formed at a position where the first printed circuit board 丨 丨 a has a through-hole 112 to electrically connect both sides of the through-hole 112. Similarly, at the 44th and 50th points of the second printed circuit board 111b, closed holes 114 are formed, and other points form through holes 112, and conductive lines 113 are also provided on both sides of the through holes 112. When the first standard memory integrated circuit Ua and the second standard memory integrated circuit 1 lb are connected together by stacking the first printed circuit board 丨 la and the second printed circuit board mb, except for the numbers DQ (), DQ2, In addition to the DQ5 and DQ7 data line pins, the pins of the other control signal lines and address lines of the two standard memory integrated circuits are completely electrically connected together. worth it

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V. Description of the invention (7) This = stacking of standard memory integrated circuit chips to simplify is to reduce manufacturing costs and increase product stability. Fig. 6 further illustrates the detailed process of the standard memory integrated circuit group 1 1 J == to achieve the automation of the process' use as shown in Figure 4: brush llla = t0, the printed circuit board 20 has a plurality of pairs of first A printed circuit board-a printed circuit board 111b is formed thereon. The distance between each pair of the first printed circuit board 11a and the second printed circuit board 11 lb is slightly larger than the standard note ^ 髀 = the width of the circuit and corresponds to the position of the pins. In this way, the surface adhesion technology of the standard memory circuit can be completed directly on the printed circuit board 20. As an example of the invention, a plurality of standard memory integrated circuit groups can be completed in the same circuit board 20. In addition, in order to achieve the automation of the process, the printed circuit board 20 also includes a positioning point 21 formed thereon and a cut line formed on both sides of the first printed circuit 11a and the second printed circuit board. 5. In the second step of chip bonding, the standard memory can be processed by the positioning point 21 so that the processing position of the standard memory package is not shifted and the processed standard memory chip T = 11 can be passed through the cut-off line 115 and the printed circuit board. 20 separation. Figures 5 and 6 illustrate the manufacturing process of the standard memory integrated circuit set of the present invention, where Figure 6 (A) is a side view of the first printed circuit board 11a, and (B) is the first A standard memory integrated circuit 丨 丨 a is not intended to be soldered to the first printed circuit board ^ 1 a, FIG. 6 (c) is a schematic diagram of the second standard memory integrated circuit soldered to the first printed circuit board 11a and FIG. (D) is a perspective view of the printed circuit board 20. In step 32, the printed circuit board 20 is first placed on the processing tool according to the positioning point 21, and then in step 33, a plurality of first standard records are placed.

Page 10 V. Description of the invention (8) fe integrated circuit 11 a to 矣 —

Ilia, as shown in Fig. 6 (B) / the surface sticker technology is soldered to the first printed circuit board body circuit lib to win / 2; in step 34, the second standard memory product is shown in Fig. 6 (C) ^ f Technology soldered to the first printed circuit board llla 'circuit group 11. The printed circuit board is formed by forming a standard memory block with stacked chips. The finished product of the road block 20 has a plurality of standard memory blocks L. Welding VI (D) is shown in order to confirm that the standard memory block circuit 20 performs a test dream. ::: In step 35, the entire printed circuit board can be directly used to understand the welding ambiguity of each standard memory integrated circuit group 11. Not only can save the test time, but also greatly improve the test. Then, the standard memory integrated circuit group 11 that failed the test is removed and repaired in step > b. Since the printed circuit board 20 can include 20 to 50 pairs of printed mine 4 circuit boards at a time, the process of the present invention can simultaneously complete 30 to 50 pieces of standard memory integrated circuit groups 11 with stacked wafers and increase greatly. The printed circuit board 20 that passed the test and the macro and ten A 卞 ° test results are performed in step 37 = cutting. Since the printed circuit board 20 has a cut-off line 115, the cutting system is not easy to know. Standard memory integrated circuit group 11. Finally, in step 38, a plurality of standard memory integrated circuit groups 11 are soldered to the substrate 10 to form a memory module 1 with a stack of chips. F The detailed description of the preferred embodiment of the present invention is familiar with this. Those skilled in the art can clearly understand that various modifications and changes can be made without departing from the scope and spirit of the following patent applications, and the present invention is not limited to the embodiments of the specification. [Effect of the invention] In summary, the present invention has many excellent characteristics, and solves the problems of the conventional technology in practice 502421. V. Description of the invention (9) Defects and inconveniences in business, propose effective solutions to complete practical and reliable devices and processes, And then achieve novel and economical value.

Page 12 502421 Schematic description

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Claims (1)

502421 VI. Scope of patent application 1. A memory module with stacked chips, the memory module has a plurality of standard memory integrated circuit groups formed on a substrate, and the aforementioned standard memory integrated circuit groups include: A first standard memory integrated circuit having a plurality of pins; a second standard memory integrated circuit having a plurality of pins and connected in a stack with the first standard memory integrated circuit; and a first printed circuit board and a first Two printed circuit boards are respectively fixed on two sides of the second standard memory integrated circuit pin for electrically connecting the opposite pins of the first standard memory integrated circuit. 2. A memory module with a stacked chip as described in item 1 of the scope of patent application, wherein a plurality of closed holes and through holes corresponding to standard memory integrated circuit pins are formed on the aforementioned printed circuit board, and the aforementioned through The hole is connected to the control signal line and the address line pin of the first and second standard memory integrated circuit, and the closed hole blocks the data line pin of the first and second standard memory integrated circuit. 3. A memory module with a stacked chip as described in item 2 of the scope of the patent application, wherein the aforementioned printed circuit board further forms conductive wires to electrically connect both sides of the through hole. 4. A standard memory integrated circuit set for use in a memory module, comprising: a first standard memory integrated circuit having a plurality of pins; a second standard memory integrated circuit having a plurality of pins The pins are stacked and connected with the first standard memory integrated circuit; and, a printed circuit board on which the pins corresponding to the standard memory integrated circuit pins are formed ^ ^ Closed holes and through-holes, and the aforementioned through-holes connect the first and second 7 > control signal and address line pins of the memory circuit and the aforementioned seal f blocks the first and second standard memories The data line pins of the integrated circuit are placed on the second standard memory integrated circuit and electrically connected to the opposite pins of the first standard memory circuit. M7 is a standard memory integrated circuit as described in item 4 of the scope of patent application, and wherein the aforementioned printed circuit board further forms conductive wires to electrically connect the two sides of the through hole. ^ 1 First, the process of the standard memory integrated circuit group, the standard memory integrated circuit, and is a loosely integrated memory integrated circuit through a pair of approximately parallel printed circuit board stack connected in a second According to the standard, the memory circuit is formed on the printed circuit board and the printed circuit board is formed on a printed circuit board. The method includes the following steps: a plurality of the first standard memory integrated circuits are adhered to the printed circuit boards corresponding to the printed circuit board. The first standard memory integrated circuit is adhered to a corresponding position on the printed circuit board; and the completed standard memory integrated circuit group is separated from the printed circuit board. 7 · The process of a standard memory integrated circuit set described in item 6 of the patent application, which also includes directly testing the entire printed circuit board to understand the welding status of each standard memory integrated circuit set. . 8 · The process of a standard memory integrated circuit set as described in item 6 of the patent claim, which further includes soldering the plurality of quasi-memory integrated circuit sets to a substrate to form a memory phantom with stacked wafers. group. 9 · A printed circuit board used to make a memory with stacked chips The 15th tribute 2002. 06. 24. 015 Sixth, the hole body phase on the mold 10 pieces of patent application group 11 includes a plurality of pairs of slightly parallel printed electricity, " forming a corresponding memory standard 70% in It and a through hole, and a plurality of closed circuit pins of the pin are connected to the first and second standard memory products and the ^^^ f line and the address line pin, and the closed hole blocks the 枳 75 The data line pins of the memory integrated circuit are fixed to the second, the memory integrated circuit and are electrically connected to the butt pins of the first standard memory integrated circuit. • A printed circuit board as described in item B of the patent scope above, wherein the front P brush circuit board also forms cut lines on both sides of the aforementioned printed circuit board.