491947 五、發明說明（I ) (請先閱讀背面之注意事項再填寫本頁) 本發明是有關於一種輻射測試系統，且特別是有關 於一種改變測試所需的步驟，減少在測試場所花費的時 間，建立一套容易維護、容易操作的測試環境，開發出有 效且節約的輻射測試系統。 在太空技術領域中，電子元件在送往太空進行任務 前，需進行抗輻射測試，若不能通過測試時，則考慮改採 其他元件，或從數種經過測試之不同元件中，挑選一種較 佳之元件，做爲上太空之使用。例如無線通訊中之衛星傳 輸，其中在衛星上的元件就需要採用通過輻射測試（Beam Test)的元件。 測試場的使用費用是非常昂貴的，而在測試場內的 設施因有其測試之考量，故不能隨意更改，一般使用皆以 測試場原有的裝備進行，以待測物連接較近的一台個人電 腦，再以特有的鍵盤延長線與螢幕延長線進行遠端控制， 而對於不同的待測物也要準備不同的控制介面。 經濟部智慧財產局員工消費合作社印製 因輻射測試需考慮人身的安全，故實地測試中，人 員要停留在控制中心由遠端進行遙控，而在問題發生時， 再等待輻射線停止時進行偵錯。而在使用測試場的時間是 受到限制的，如在一天內需完成三個元件的測試，而一個 元件的測試需要7小時，其間能進行偵錯及換線的時間變 得非常少。再者，測試場的使用費用是天文數字，若增加 其使用時數，將造成省金錢上大量的浪費。 因此本發明係提供一種輻射測試系統，係改變測試 所需的步驟，減少在測試場所花費的時間，建立一套容易 本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公釐） 經濟部智慧財產局員工消費合作社印製 491947 五、發明說明（2) 維護、容易操作的測試環境，開發出有效且節約的抗輻射 測試系統。 本發明係提供一種輻射測試系統，係耦接至輻射測 試場的輻射控制器，此輻射控制器記錄輻射粒子流量及待 測元件的測試結果，並控制產生輻射粒子的加速器，以產 生具有週期性的輻射來照射待測元件，此輻射測試系統包 括：一測試子板，可置放待測元件，並做電氣連接。一測 試母板，可耦接至輻射控制器，測試子板置放於測試母板 之上，並做電氣連接。一電源供應器，可供應測試母板與 待測元件所需要的電源。一近端監控器，可藉由一短傳輸 線連接至測試母板。以及，一遠端監控器，可藉由一長傳 輸線連接至近端監控器。 其中，輻射控制器送輻射照射信號至測試母板，以 通知測試母板目前是否在fg射照射期間，測試母板送因待 測元件發生電流過載的錯誤信號至輻射控制器，以通知輻 射控制器停止幅射流量的計數，並藉由一 RS_232將測試 母板與射控制器做指令與測試結果的雙向傳輸。近端監 控器用以啓動一測試程式以驅動測試母板進行測試，監視 與記錄待測元件之測試的狀態_資料，在連續的輻射昭射 週期中，測試母板將待測元件所產生之一測試資料送至近 端監控器，遠端監控器可遠端遶控近端監控器，以進行待 測兀件的’並可_收近端監控器所送出的測 g式貪料’以判斷待測元件經fe射照射後的情況。 本發明係提供另-種輻射測試系統，係親接至幅射 4 本紙張尺度適用中國國家標準（CNS)M規格⑵〇χ297公爱)〜 -----------裝--------訂--------- (請先閱讀背面之注意事項再填寫本頁) 經濟部智慧財產局員工消費合作社印製 491947 7142twf.d〇c/006 _B7 五、發明說明（3) 測試場的輻射控制器，輻射控制器記錄輻射粒子流量及待 測元件的測試結果，並控制產生輻射粒子的加速器，以產 生具有週期性的輻射來照射待測元件，此輻射測試系統包 括：一測試子板，可置放待測元件，並做電氣連接。一傳 輸線連接器，係爲一短傳輸線的連接器。一數位信號處理 器，耦接至傳輸線連接器，由一測試程式驅動數位信號處 理器，以產生一測試式樣，並藉由傳輸線連接器送出待測 元件所測試得到的測試資料。一資料緩衝器，用以隔絕數 位信號處理器與測試子板之間的資料匯流排，亦提供驅動 數位信號處理器所需的資料匯流排信號。一第一位址及控 制緩衝器，用以隔絕數位信號處理器與測試子板之間的一 位址與控制信號匯流排。一解碼器及通用非同步接收傳輸 電路，對資料緩衝器提供驅動數位信號處理器所需的資料 匯流排信號做解碼，以產生對待測元件所需的控制信號， 可接收輻射控制器所送出的輻射照射信號，並送出測試元 件測試發生電流過載的錯誤信號至輻射控制器，且藉由一 RS-232將指令與測試結果與輻射控制器做雙向傳輸。一電 源保護電路及資料鎖住，耦接至解碼器及通用非同步接收 傳輸電路，可提供電源給待測元件，當發生電流過載時， 可切斷所供應的電流，並送出電流過載信號至數位信號處 理器，亦將數位信號處理器送來的資料信號鎖住，以提供 所需的設定信號、重置信號、電源啓動信號與錯誤信號。 一第二位址及控制緩衝器，可提供數位信號處理器用以驅 動解碼器及通用非同步接收傳輸電路所需的信號。-控制 5 本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公釐） -----------裝--------訂--------- (請先閱讀背面之注意事項再填寫本頁) 491947 A7 B7 7l42twf.d〇c/0〇6 五、發明說明（+) 緩衝器，由解碼器及通用非同步接收傳輸電路解碼得到的 控制信號送至測試子板。一電源供應器，可供應輻射測試 系統中各個模組與待測元件所需要的電源。一近端監控 器，可藉由短傳輸線連接至傳輸線連接器，用以啓動與停 止測試程式，監視與記錄待測元件之測試的狀態與資料。 以及，一遠端監控器，可藉由一長傳輸線連接至近端監控 器，接收待測元件之測試的狀態與資料，並控制近端監控 器是否要進行輻射測試。 爲讓本發明之上述目的、特徵、和優點能更明顯易 懂’下文特舉較佳實施例，並配合所附圖式，作詳細說明 如下： 圖式之簡單說明： 第1圖繪示本發明之輻射測試系統的架構圖；以及 第2圖繪示本發明之輻射測試系統中之測試母板的系 統方塊圖。 標號說明： 102 :控制室（Control Room) 1〇4 ·· $g射照射室（Irradiation Room) 106 : 射控制器（Beam Test Controller) 108，210 :測試子板（Daughter) 110 ’ 200 ··測試母板(Mother Board) 112 :電源供應器（p〇wer Supply) 114，116 ··電腦（Computer) 202 : JTAG 連接器（JTAG Connector*) 6 本紙張尺度適用中國國家標準（CNS)Al規格（2丨〇 X 297公釐） (請先閱讀背面之注意事項再填寫本頁) 裝--------訂--------- $: 經濟部智慧財產局員工消費合作社印製 491947 A7 B7 7142twf.doc/006 五、發明說明（5) 204 :數位信號處理器（Digital Signal Processor) 206 :資料匯流排(Data Bus) (請先閱讀背面之注音？事項再填寫本頁) 208，212，218 :資料緩衝器（Data Buffer) 214 :解碼器及通用非同步接收傳輸電路（Decoder & Universal Asynchronous Receiver/Transmitter Circuit) 216 :電源保護電路及資料鎖住（Power Protection Circuit & Data Latch) 220，226 :位址及控制緩衝器（Address & Control Buffer) 222，224，230 :位址及控制匯流排（Address & Control491947 V. Description of the invention (I) (Please read the notes on the back before filling out this page) The present invention relates to a radiation test system, and in particular to a step required to change the test and reduce the cost of testing Time, establish a test environment that is easy to maintain and operate, and develop an effective and economical radiation test system. In the field of space technology, electronic components need to be tested for radiation resistance before being sent to space for missions. If they fail the test, consider using other components or selecting a better one from several tested different components. Components for use in space. For example, for satellite transmission in wireless communication, the components on the satellite need to use components that pass the Beam Test. The use cost of the test field is very expensive, and the facilities in the test field cannot be changed arbitrarily because of their testing considerations. Generally, the equipment used in the test field is carried out with the original equipment of the test field. A personal computer, and then use the unique keyboard extension cable and screen extension cable for remote control, and different control interfaces must be prepared for different DUTs. Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs. Due to the radiation test, personal safety must be considered. Therefore, in the field test, the person must stay in the control center and remotely control the remote control. wrong. However, the time in the test field is limited. For example, three components need to be tested in one day, and one component needs 7 hours to test, and the time for debugging and wire changing becomes very small. In addition, the cost of using the test field is astronomical. If the number of hours used is increased, it will result in a huge waste of money. Therefore, the present invention provides a radiation test system, which changes the steps required for testing, reduces the time spent at the test site, and establishes a set of paper standards that are easily applicable to the Chinese National Standard (CNS) A4 (210 X 297 mm). Printed by the Ministry of Intellectual Property Bureau's Consumer Cooperatives 491947 V. Description of the Invention (2) Maintenance and easy-to-operate test environment to develop an effective and economical radiation test system. The invention provides a radiation test system, which is a radiation controller coupled to a radiation test field. The radiation controller records the flow of radiation particles and the test results of the component under test, and controls the accelerator that generates the radiation particles to generate a periodicity. The radiation is used to illuminate the component under test. The radiation test system includes: a test daughter board, which can place the component under test and make electrical connections. A test mother board can be coupled to the radiation controller, and the test daughter board is placed on the test mother board and electrically connected. A power supply can supply the power required to test the motherboard and the device under test. A near-end monitor can be connected to the test motherboard via a short transmission line. And, a remote monitor can be connected to the near-end monitor via a long transmission line. Among them, the radiation controller sends a radiation exposure signal to the test motherboard to inform the test motherboard whether it is currently in the fg radiation exposure period. The test motherboard sends an error signal to the radiation controller due to the current overload of the device under test to notify the radiation control. The device stops counting the radiation flow rate, and transmits a bidirectional transmission of instructions and test results to the test motherboard and the radio controller through an RS_232. The near-end monitor is used to start a test program to drive the test motherboard for testing, and monitor and record the test status of the DUT. Data, in a continuous radiation exposure cycle, the test motherboard generates one of the DUT The test data is sent to the near-end monitor, and the far-end monitor can remotely control the near-end monitor to perform the test of the test piece, and _receive the g-type information sent by the near-end monitor to determine The condition of the device under test after being irradiated with fe. The present invention provides another type of radiation test system, which is connected to the radiation 4 The paper size is applicable to the Chinese National Standard (CNS) M specification ⑵〇χ297 公 爱) ~ ----------- install- ------- Order --------- (Please read the precautions on the back before filling out this page) Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs 491947 7142twf.d〇c / 006 _B7 5 Explanation of the invention (3) The radiation controller of the test field, the radiation controller records the flow of radiation particles and the test results of the component under test, and controls the accelerator that generates the radiation particles to generate periodic radiation to illuminate the component under test. The radiation test system includes: a test daughter board, which can place the components to be tested and make electrical connections. A transmission line connector is a connector for a short transmission line. A digital signal processor is coupled to the transmission line connector. The digital signal processor is driven by a test program to generate a test pattern, and the test data obtained by the component under test is transmitted through the transmission line connector. A data buffer is used to isolate the data bus between the digital signal processor and the test daughter board. It also provides the data bus signals required to drive the digital signal processor. A first address and control buffer is used to isolate an address and control signal bus between the digital signal processor and the test daughter board. A decoder and a general asynchronous reception and transmission circuit decode the data bus signals provided by the data buffer to drive the digital signal processor to generate the control signals required by the device under test, which can receive the signals sent by the radiation controller. Radiation irradiation signal, and send the test element to test the error signal of current overload to the radiation controller, and the command and test results are transmitted to the radiation controller in two directions through an RS-232. A power protection circuit and data lock, coupled to the decoder and the general asynchronous receiving and transmitting circuit, can provide power to the component under test. When a current overload occurs, it can cut off the supplied current and send a current overload signal to The digital signal processor also locks the data signals sent by the digital signal processor to provide the required setting signals, reset signals, power-on signals and error signals. A second address and control buffer can provide a digital signal processor to drive the decoder and the signals required by the general asynchronous reception and transmission circuit. -Control 5 This paper size is applicable to China National Standard (CNS) A4 (210 X 297 mm) ----------- installation -------- order ------- -(Please read the notes on the back before filling this page) 491947 A7 B7 7l42twf.d〇c / 0〇6 V. Description of the invention (+) Buffer, which is decoded by the decoder and the general asynchronous reception and transmission circuit The control signal is sent to the test daughter board. A power supply can supply the power required by each module and DUT in the radiation test system. A near-end monitor can be connected to the transmission line connector through a short transmission line to start and stop the test program, and monitor and record the test status and data of the component under test. And, a remote monitor can be connected to the near-end monitor via a long transmission line, receive the test status and data of the component under test, and control whether the near-end monitor should perform radiation test. In order to make the above-mentioned objects, features, and advantages of the present invention more comprehensible, hereinafter, preferred embodiments are described in detail with the accompanying drawings as follows: A brief description of the drawings: FIG. 1 illustrates this An architecture diagram of the radiation test system of the invention; and FIG. 2 is a system block diagram of a test motherboard in the radiation test system of the invention. Explanation of symbols: 102: Control Room 104; $ g Irradiation Room 106: Beam Test Controller 108, 210: Daughter 110 '200 Test Mother Board 112: Power Supply 114, 116 ·· Computer 202: JTAG Connector * 6 This paper size is applicable to China National Standard (CNS) Al specifications (2 丨 〇X 297 mm) (Please read the precautions on the back before filling out this page) Packing -------- Order --------- $: Consumption by the Intellectual Property Bureau of the Ministry of Economic Affairs Printed by the cooperative 491947 A7 B7 7142twf.doc / 006 V. Description of the invention (5) 204: Digital Signal Processor 206: Data Bus (Please read the note on the back? Please fill in this matter (Pages) 208, 212, 218: Data Buffer 214: Decoder & Universal Asynchronous Receiver / Transmitter Circuit 216: Power Protection Circuit and Data Protection (Power Protection Circuit) & Data Latch) 220, 226: bits And control buffer (Address & Control Buffer) 222,224,230: the control and address bus (Address & Control
Bus) 228 :控制緩衝器（Control Buffer) 232，234 :匯流排(Bus) 實施例 經濟部智慧財產局員工消費合作社印製 第1圖繪示本發明之輻射測試系統的架構圖。在第1 圖中，輻射測試場中的控制室102放置一部輻射控制器 106,此輻射控制器106記錄著輻射粒子流量及待測元件(受 測兀件可以是 SDRAM、Flash ROM、CPLD 與 Watch-，dog Timer) 的測S式結果’並控制者產生輪射粒子的加速器（未繪示）， 以產生具有週期性的輻射來照射待測元件。 在第1圖中，待測兀件(未繪示)插置在測試子板1〇8 的插座上，並可任意更換不同規格之插座的測試子板1〇8， 而測試子板108的接腳可根據不同的待測元件（未繪示）所 需要之測試信號重新定義，測試子板1〇8並可以同時測試 二個功能相同的待測元件（未繪示）。受測時，只有待測元 7 本紙張尺度適用中國國家標準（CNS)A4規格（210 x 297公釐) 一 -- 經濟部智慧財產局員工消費合作社印製 #1947 714 2twf. doc/〇 〇 6 —__________B7__ 五、發明說明（έ) 件（未繪示）與測試子板108會直接受到輻射的照射。 測試母板110耦接至輻射控制器106，測試子板108 與測試母板110做電氣連接。電源供應器112可供應測試 母板110與待測元件（未繪示)所需要的電源（如第1圖所示 的5V與3.3V)。電腦114可藉由J-Tag傳輸線連接至測試 母板110。電腦116可藉由Ethernet傳輸線連接至電腦114。 在第1圖中，輻射控制器106送輻射照射的信號Beam on/off至測試母板110，以通知測試母板n〇目前是否在輻 射照射期間。當待測元件（未繪示）在測試時，發生電流過 載的情況，測試母板110送信號Veto至輻射控制器11〇， 以通知輻射控制器110停止輻射流量的計數。當所有的測 試裝備就緒後，輻射控制器Π0與測試母板110藉由RS-232 的介面通訊’在控制室1〇2由$g射控制器1〇6下達啓動（iNIT) 指令’當測試母板110接到啓動指令後，每隔一個輻射週 期（Beam Cycle，一次 Beam-Off 與 Beam-〇n)，由測試母板 110送一組測試資料至電腦114。在進行數十個輻射週期 後，測試母板110會暫停測試，接著將測試資料存檔在電 腦114，然後改變輻射的強度或角度，或改用不同的輻射 線再啓動測試。 電腦114用以啓動測試程式，以驅動測試母板丨1〇進 行測試，監視與記錄待測元件（未繪示）之測試的狀態與資 料。在測試中’監控用的電腦116藉由Ethernet傳輸線接 收由電腦114所傳來的測試資料，以得知待測元件（未繪示) 做輪射測試的情況，若電腦116發現待測元件（未繪示）的 8 本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公釐） -----------裝--------訂--------- (請先閱讀背面之注意事項再填寫本頁) 491947 A7 B7 7142twf·d〇c/006 五、發明說明（y) 測試結果很不正常’電腦116可以馬上控制電腦114以停 止輻射的測試。 第2圖繪示本發明之輻射測試系統中之測試母板的系 統方塊圖。在第2圖中’測試母板200的JTAG連接器202 爲J-Tag傳輸線的連接器。數位信號處理器204耦接至JTAG 連接器202，由近端的電腦114(參考第1圖）以測試程式驅 動數位信號處理器204 ’數位信號處理器204產生一測試 式樣(Test Pattern)至資料匯流排206，並且數位信號處理器 204由資料匯流排206所讀取的測試資料送至電腦114(參 考第1圖）。 資料緩衝器208用以隔絕數位信號處理器204與測試 子板210之間的資料匯流排206與資料匯流排212，以避 免待測元件（未繪示）發生電流過載的情況，而影響數位信 號處理器204的正常工作。資料緩衝器208亦提供資料匯 流排218,在資料匯流排218的信號做爲驅動數位信號處 理器204、解碼器及通用非同步接收傳輸電路214與電源 保護電路及資料鎖住216之用。位址及控制緩衝器220用 以隔絕數位信號處理器204與測試子板210之間之的位址 與控制信號匯流排222及位址與控制信號匯流排224,同 樣避免待測元件（未繪示）發生電流過載的情況，而影響數 位信號處理器204的正常工作。 解碼器及通用非同步接收傳輸電路214對資料匯流排 218上的信號做解碼，以產生待測元件（未繪示）所需要的 控制信號，並藉由RS-232將指令與測試結果與輻射控制 9 本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公釐） -----------裝--------訂--------- 華 (請先閱讀背面之注意事項再填寫本頁) 經濟部智慧財產局員工消費合作社印製 491947 1 4 2 twf . d( :/006 A7 B7 經濟部智慧財產局員工消費合作社印製 五、發明說明（公） 器（未繪不）做雙向傳輸，並且輻射測試信號Beam on/off與 信號Veto由解碼器及通用非同步接收傳輸電路214與輻射 控制器(未繪示）互相傳送(未繪示信號線）。 其中，解碼器及通用非同步接收傳輸電路214可具有 一非同步接收傳輸控制電路（未繪示），此非同步接收傳輸 控制電路（未繪示）更包括有包率產生模組、串列接收平行 輸出的接收模組、平行接收串列輸出的傳送模組、各接收 與傳送狀態的輸出模組、奇偶產生與偵查模組，以及微處 理機(未匯示）或數位信號處理器204的介面控制模組(以上 各模組皆未繪示），依據各模組的功能來執行信號或資料 的傳送。 電源保護電路及資料鎖住216耦接至解碼器及通用非 同步接收傳輸電路214，可提供電源給待測元件（未繪示）， 當待測元件（未繪示）進行測試而發生電流過載時，電源保 護電路及資料鎖住216可切斷所供應的電流，並藉由資料 匯流排218與資料匯流排206傳送一電流過載信號至數位 信號處理器204。亦將數位信號處理器204送來的資料信 號鎖住，做爲提供電源保護電路及資料鎖住216所需的設 定信號、重置信號、電源啓動信號與信號Veto，以設定或 重置電源保護電路及資料鎖住216,或由電源保護電路及 資料鎖住216提供電元給待測元件(未繪示)等功能。 位址及控制緩衝器226藉由位址與控制信號匯流排 230，可提供數位信號處理器204用以驅動解碼器及通用 非同步接收傳輸電路214所需的信號。控制緩衝器228由 -----------·裝--------訂--------- $1 (請先閱讀背面之注意事項再填寫本頁) 本紙張尺度適用中國國家標準（CNS)A4規格（2〗0 X 297公釐） 491947 7 1 4 2twf· :/006 A7 B7 五、發明說明（q) 解碼器及通用非同步接收傳輸電路214解碼得到的控制信 號送至測試子板210。控制緩衝器228可隔絕解碼器及通 用非同步接收傳輸電路214與測試子板210之間的匯流排 232與匯流排234，以避免待測元件（未繪示）發生電流過載 的情況，而影響解碼器及通用非同步接收傳輸電路214的 正常工作。 因此，本發明的優點係使用通用測試板來量測不同 的兀件，不需要單獨設計測試板，改變測試所需的步驟， 可在本地做先前的模擬，減少在測試場所花費的時間，建 立一套容易維護、容易操作的測試環境，可線上（〇n4ine) 監視待測元件的測試情況，做出必須的處置，如此開發出 有效且節約的抗輻射測試系統。 綜上所述，雖然本發明已以較佳實施例揭露如上， 然其並非用以限定本發明，任何熟習此技藝者，在不脫離 本發明之精神和範圍內，當可作各種之更動與潤飾，因此 本發明之保護範圍當視後附之申請專利範圍所界定者爲 準。 -----------裝--------訂--------- (請先閱讀背面之注意事項再填寫本頁) 經濟部智慧財產局員工消費合作社印製 本紙張尺度€中國國家標準（CNS)A4規格⑵ο X 297公t )Bus) 228: Control Buffer 232, 234: Bus Example Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs Figure 1 shows the architecture of the radiation test system of the present invention. In Figure 1, a radiation controller 106 is placed in the control room 102 in the radiation test field. This radiation controller 106 records the radiation particle flow and the component under test (the component under test can be SDRAM, Flash ROM, CPLD and Watch-, dog timer) test results, and the controller generates an accelerator (not shown) for rotating particles to generate periodic radiation to illuminate the component under test. In the first figure, the component to be tested (not shown) is inserted into the socket of the test daughter board 108, and the test daughter board 108 of the socket of different specifications can be arbitrarily replaced. The pins can be redefined according to the test signals required by different DUTs (not shown). The test daughter board 108 can test two DUTs (not shown) with the same function at the same time. At the time of the test, only 7 yuan of paper was tested. This paper size was applicable to the Chinese National Standard (CNS) A4 specification (210 x 297 mm). I-Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs # 1947 714 2twf. Doc / 〇〇 6 —__________ B7__ 5. The description of the invention (handled) (not shown) and the test daughter board 108 will be directly exposed to radiation. The test mother board 110 is coupled to the radiation controller 106, and the test daughter board 108 is electrically connected to the test mother board 110. The power supply 112 can supply power required for testing the motherboard 110 and the component under test (not shown) (5V and 3.3V as shown in Fig. 1). The computer 114 can be connected to the test motherboard 110 through a J-Tag transmission line. The computer 116 can be connected to the computer 114 through an Ethernet transmission line. In Fig. 1, the radiation controller 106 sends a signal of radiation exposure Beam on / off to the test mother board 110 to inform the test mother board whether no is currently in the radiation irradiation period. When the component under test (not shown) is tested and a current overload occurs, the test motherboard 110 sends a signal Veto to the radiation controller 11 to notify the radiation controller 110 to stop counting the radiation flow. When all the test equipment is ready, the radiation controller Π0 and the test motherboard 110 communicate via the RS-232 interface 'in the control room 102, the $ g radio controller 106 issues the start (iNIT) command' when the test After the motherboard 110 receives the start instruction, the test motherboard 110 sends a set of test data to the computer 114 every other radiation cycle (Beam-Off and Beam-On). After performing dozens of radiation cycles, the test motherboard 110 will suspend the test, then archive the test data in the computer 114, and then change the intensity or angle of the radiation, or use a different radiation to restart the test. The computer 114 is used to start a test program to drive the test mother board 10 to perform tests, and monitor and record the test status and data of the component to be tested (not shown). In the test, the 'monitoring computer 116 receives the test data transmitted from the computer 114 through the Ethernet transmission line to know the test of the component under test (not shown). If the computer 116 finds the component to be tested ( (Not shown) 8 paper sizes are applicable to China National Standard (CNS) A4 (210 X 297 mm) ----------- installation -------- order ---- ----- (Please read the precautions on the back before filling this page) 491947 A7 B7 7142twf · doc / 006 V. Description of the invention (y) The test result is very abnormal. 'Computer 116 can immediately control computer 114 to stop Radiation test. FIG. 2 is a block diagram of a system for testing a motherboard in the radiation test system of the present invention. In Fig. 2, the JTAG connector 202 of the test motherboard 200 is a connector of a J-Tag transmission line. The digital signal processor 204 is coupled to the JTAG connector 202. The near-end computer 114 (refer to FIG. 1) drives the digital signal processor 204 with a test program. The digital signal processor 204 generates a test pattern to the data. The bus 206, and the digital signal processor 204 sends the test data read by the data bus 206 to the computer 114 (refer to FIG. 1). The data buffer 208 is used to isolate the data bus 206 and the data bus 212 between the digital signal processor 204 and the test daughter board 210, so as to avoid the current overload of the device under test (not shown) and affect the digital signal. The processor 204 operates normally. The data buffer 208 also provides a data bus 218. The signals on the data bus 218 are used to drive the digital signal processor 204, decoder, and general asynchronous reception and transmission circuit 214, power protection circuit and data lock 216. The address and control buffer 220 is used to isolate the address and control signal bus 222 and the address and control signal bus 224 between the digital signal processor 204 and the test daughter board 210, and also avoids the component under test (not shown) (Shown) A current overload condition occurs, which affects the normal operation of the digital signal processor 204. The decoder and the universal asynchronous receiving and transmitting circuit 214 decode the signals on the data bus 218 to generate the control signals required by the device under test (not shown), and transmit the command and test results with the radiation through RS-232. Control 9 This paper size is applicable to China National Standard (CNS) A4 specification (210 X 297 mm) ----------- installation -------- order -------- -Hua (Please read the notes on the back before filling this page) Printed by the Employees 'Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs 491947 1 4 2 twf. D (: / 006 A7 B7 Printed by the Employees' Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs DESCRIPTION OF THE INVENTION The (male) device (not shown) performs bidirectional transmission, and the radiation test signal Beam on / off and the signal Veto are transmitted between the decoder and the general asynchronous reception and transmission circuit 214 and the radiation controller (not shown) (not shown) The signal line is shown. Among them, the decoder and the general asynchronous receiving and transmitting circuit 214 may have an asynchronous receiving and transmitting control circuit (not shown). The asynchronous receiving and transmitting control circuit (not shown) further includes a packet rate. Generating module, serial receiving module Transmission module for parallel receiving serial output, output module for each receiving and transmitting status, parity generation and detection module, and interface control module of microprocessor (not shown) or digital signal processor 204 (each of the above The modules are not shown), and the transmission of signals or data is performed according to the functions of each module. The power protection circuit and data lock 216 are coupled to the decoder and the general asynchronous reception and transmission circuit 214, which can provide power to the test. Component (not shown), when the device under test (not shown) is tested and a current overload occurs, the power protection circuit and the data lock 216 can cut off the supplied current, and the data bus 218 and the data bus The bank 206 sends a current overload signal to the digital signal processor 204. The data signal sent from the digital signal processor 204 is also locked as a setting signal, a reset signal, a power supply protection circuit and a data lock 216, Power start signal and signal Veto to set or reset the power protection circuit and data lock 216, or the power protection circuit and data lock 216 to provide power to the device under test (not shown) ) And other functions. The address and control buffer 226 can provide the digital signal processor 204 to drive the decoder and the signals required by the general asynchronous reception and transmission circuit 214 through the address and control signal bus 230. The control buffer 228 by ----------- install -------- order --------- $ 1 (Please read the precautions on the back before filling this page) This paper size Applicable to China National Standard (CNS) A4 specification (2〗 0 X 297 mm) 491947 7 1 4 2twf ·: / 006 A7 B7 V. Description of the invention (q) Decoder and general asynchronous reception and transmission circuit 214 decoded control The signal is sent to the test daughter board 210. The control buffer 228 can isolate the bus 232 and the bus 234 between the decoder and the general asynchronous receiving and transmitting circuit 214 and the test daughter board 210 to avoid the current overload of the device under test (not shown), which affects The decoder and the general asynchronous reception and transmission circuit 214 normally operate. Therefore, the advantage of the present invention is to use a universal test board to measure different components. There is no need to design a separate test board. The steps required for testing can be changed. Previous simulations can be done locally, reducing the time spent at the test site. A set of easy-to-maintain and easy-to-operate test environment, which can monitor the test conditions of the components under test online and make necessary treatments, thus developing an effective and economical radiation test system. In summary, although the present invention has been disclosed in the preferred embodiment as above, it is not intended to limit the present invention. Any person skilled in the art can make various changes and modifications without departing from the spirit and scope of the present invention. Retouching, so the scope of protection of the present invention shall be determined by the scope of the attached patent application. ----------- Equipment -------- Order --------- (Please read the precautions on the back before filling out this page) Staff Consumption of Intellectual Property Bureau, Ministry of Economic Affairs Cooperative printed paper size € Chinese National Standard (CNS) A4 size ⑵ο X 297g t)