483057483057
【發明領域】 本發明係有關於電子封裝技術，其特別於一 凸塊電極之半導體元件。 一有 【先前技術】 隨著更輕更複雜電子裝置需求的日趨強烈，晶片的速度 及複雜性相對越來越高，因此需要更高之封裝效率 (packaging efficiency)。微型化（miniaturization )是使用先進封裝技術（例如膠帶承載封裝（tape carrier package，TCP))的主要驅動力。膠帶承載封裝 常應用於製造液晶顯示器模組，使液晶顯示器具有低成 本、回可罪度、高度密集、重量輕，及低耗能的優點，該 膠帶承載封裝通常包含一具有凸塊電極之半導體元件。此 外’該具有凸塊電極之半導體元件亦常應用於「晶片上破 璃（Chip On Glass，C0G)」技術，用以將晶片安裝在玻璃 基板上。 習知凸塊電極製造技術可分為兩個部分，分別為凸 金屬層（UBM ’Under Bump Metallurgy)，及金屬凸塊篆: 體。為符合後續製程如TCP, C0G之需要，一般係採用Au作 為金屬凸塊之材料。用於金凸塊之凸塊下金屬層通常包含 三層金屬，分別為：（a)黏附層（adhesion layer)， 如A1、Cr，主要目的在於提供鋁墊（A1 pad)與護層 (passivation layer)有較強之黏著性；（b)阻障層 (barrier layer)，如Cu、Pd、ft，其係用以防止晶片 上的金屬接墊（contact pad)與金屬凸塊間彼此反應產[Field of the Invention] The present invention relates to electronic packaging technology, which is particularly related to a semiconductor device with a bump electrode. [Previous technology] With the increasing demand for lighter and more complex electronic devices, the speed and complexity of chips are relatively higher and higher, so higher packaging efficiency is required. Miniaturization is the main driving force for the use of advanced packaging technologies, such as tape carrier packages (TCP). Tape carrying package is often used in the manufacture of liquid crystal display modules, so that liquid crystal displays have the advantages of low cost, guilt, high density, light weight, and low energy consumption. The tape carrying package usually includes a semiconductor with bump electrodes element. In addition, the semiconductor element with a bump electrode is also commonly used in "Chip On Glass (C0G)" technology for mounting the wafer on a glass substrate. The conventional bump electrode manufacturing technology can be divided into two parts, namely the UBM ’Under Bump Metallurgy, and the metal bump 篆: body. In order to meet the requirements of subsequent processes such as TCP and C0G, Au is generally used as the material of the metal bump. The metal layer under the bump used for gold bumps usually contains three layers of metal, respectively: (a) Adhesion layer, such as A1, Cr, the main purpose is to provide aluminum pad (A1 pad) and passivation layer) has strong adhesion; (b) barrier layers (such as Cu, Pd, ft), which are used to prevent metal contact pads (metal pads) and metal bumps on the wafer from reacting with each other.
P01-029.ptd 第4頁 五、發明說明（2) 生金屬化合物（其可能導致晶片喪失其可靠性）；以及 (c)接合層，如Au。 第1圖所示係為一習知具有凸塊電極的半導體元件1 〇。 二揭示一銘接墊（aluminum contact pad) 11設於一半導 雷基片12上，该半導體基片12包含有多數個電阻、電容、 屏感等，出入（I/O )單元。一護層13 (其係作為一絕緣 =)覆蓋於該基片12整個表面。該護層13於特定位置設有 ^層開口用以使該鋁接墊丨丨裸露。該半導體元件1〇的凸塊 金屬層14包含三層金屬，分別為：（a)鉻層Ua，作為 ^附層；（b )銅層14b，作為阻障層；（c )金層14c，作 点接合層。在完成該凸塊下金屬層丨4後，經由佈塗光阻形 =案結構（pat term ng)將金凸塊15電鍍形成於該凸塊下 n a層1 4上，最後蝕刻該金凸塊丨5未覆蓋之凸塊下金屬層 第^圖所示係為另一習知具有凸塊電極的半導體元件 分別Ϊ半導體元件2〇之凸塊下金屬層24係包含三層 】為· （a )鈦層24a，作為黏附層；（b )鈀層 為阻障層；（c )金層24c，作為接合層。 第3圖所不係為再一習知具有凸塊電極的半導體元件 八。=半導體元件30的凸塊下金屬層34係包含三層金屬， · (a)鈦層34a，作為黏附層 ）鉑層34b 為阻障層Γ (c)金層34c，作為接合層。 塊^而，上述習用之凸塊下金屬辱皆接包含一金層於金β ，因此其皆須以金做為濺鍍之靶材（target)而提高 483057 五、發明說明（3) 成本’且在餘刻凸塊下金屬層之金層時，金凸塊也同樣遭 到飯刻而影響金凸塊的凸塊高度均一性（height uniformity)以及凸塊表面粗糙度均一性（bump surface roughness of uniformity)，而影響金凸塊之品質。 因此，有必要尋求一種可有效解決先前技術問題的凸塊 下金屬層’以保持金凸塊之均一性。 【發明概要】 本發明之主要目的在於提供一種具有凸塊電極半導體元 件’其凸塊下金屬層（UBM)利用鈦層作為接合層以取代昂 貝的金層，並可改善飯刻製程的選擇性。 本發明之另一目的在於提供一種具有凸塊電極半導體元 件，其凸塊下金屬層（UBM)利用鎳釩層作為阻障層以避免 ，電鍍金凸塊時受到輸出入單元的影響，藉此保持金凸塊 咼度及表面粗糙度之均一性。 根據本發明之具有凸塊電極半導體元件，其包含有一鋁 接墊設於一基片上，該鋁接墊至少有部分裸露於設在該基 片上的介電層。該鋁接墊上設有一凸塊下金屬層包 層，設於該銘接墊上裸露於介電層之部分；一鎳釩層、：:^ 於該鋁層上；以及一鈦層設於該鎳釩層上。一金凸塊設於 该鋁接墊之凸塊下金屬層上而形成該凸塊電極。 本發明另提供一種具有凸塊電極半導體元件的製造方 法，其包含·· （a)提供一基片，其上設有一鋁接墊 (aluminum contact pad)，該鋁接墊至少有部分 ♦ 設在該基片上的介電層；（1〇形成一铭層於該 P01-029.ptd 第6頁 五、發明說明（4) 裸露於介電層之部分；（C)形成一鎳釩 了anaiiu、m)層於該紹層上；（d)形成一鈦層於 该鎳釩層上’（e )以清洗液清洗該鈦層 塊植於該鈦層上。 、^肝备口 層(It發 導電性較^職層作 響，以維持金凸塊高度;輸出入單元的影 本發明之之Λ播T厶μ金凸鬼同度均一性。再者，根據 本务月之之凸塊下金屬層（ϋΜ)係利用鈦層 使成本有效降低。然而，由於欽層會盘空氣中V氧產 4 成氧化層’故在電鍍形成金凸塊前必須先將該 實連接及電性效能。 卜金屬層之間此確 【發明說明】 凊參照第4圖根據本發明輕且每 — · 電層（例如護層）1 3 〇 料（例如砍、崎化嫁 界熟知的基片材料） (polyimide layer ) 半導體元件100包含 H、丨例所示，其f· 基片110、一鋁接墊120以及 。。該基片11 0可以包含一層半導體材 碳化鎵、碳化矽、鑽石或是其它業 遵層1 30可以是—聚醯亞胺層 他業界熟知的護層材粗二氧化矽層、氮化矽層或是由其 覆蓋到銘接墊的;：成：t圖所示，該護層130較佳 於護層130。根據本笋：Ί下其中間表面部分裸露 月之凸塊下金屬層（UBM) 140包含 483057 五、發明說明（5) 一鋁層1 4 0 a，設於該鋁接墊1 2 0上裸露於護層1 3 〇之部分； 一鎳叙層140b，設於該鋁層140a上；以及一鈦層i4〇c設於 該鎳釩層1 4 0 b。根據本發明，該凸塊下金屬層丨4 〇係選擇 鋁層作為黏附層’因為其對於鋁接墊1 2 0以及護層1 3 0的附P01-029.ptd Page 4 5. Description of the invention (2) Metal-generating compounds (which may cause the wafer to lose its reliability); and (c) Bonding layers such as Au. FIG. 1 shows a conventional semiconductor device 10 having bump electrodes. The second reveals that an aluminum contact pad 11 is provided on a semi-conductive lightning substrate 12 which includes a plurality of resistors, capacitors, screen senses, etc., and access (I / O) units. A protective layer 13 (which acts as an insulation layer) covers the entire surface of the substrate 12. The protective layer 13 is provided with a layer opening at a specific position for exposing the aluminum pad 丨 丨. The bump metal layer 14 of the semiconductor device 10 includes three layers of metal, respectively: (a) a chromium layer Ua as an additional layer; (b) a copper layer 14b as a barrier layer; (c) a gold layer 14c, Make a point bonding layer. After the metal layer under the bump is completed, a gold bump 15 is electroplated on the under-bump na layer 1 4 through a pattern coating (pat term ng). Finally, the gold bump is etched.丨 5 Uncovered under bump metal layer. Figure ^ shows another conventional semiconductor element with a bump electrode. The under bump metal layer 24 of the semiconductor element 20 includes three layers.] Is · (a ) A titanium layer 24a is used as an adhesion layer; (b) a palladium layer is used as a barrier layer; (c) a gold layer 24c is used as a bonding layer. FIG. 3 is not a conventional semiconductor device having bump electrodes. = The under bump metal layer 34 of the semiconductor device 30 includes three layers of metal, (a) a titanium layer 34a as an adhesion layer) a platinum layer 34b as a barrier layer Γ (c) a gold layer 34c as a bonding layer. However, the conventional metal bumps under the bumps all include a gold layer on the gold β, so they must all use gold as the target for sputtering to increase 483057. 5. Description of the invention (3) Costs' And when the gold layer of the metal layer under the bump is etched, the gold bump is also affected by the rice engraving, which affects the bump's height uniformity and bump surface roughness. of uniformity), and affect the quality of gold bumps. Therefore, it is necessary to find a metal layer under bumps' which can effectively solve the problems of the prior art to maintain the uniformity of the gold bumps. [Summary of the invention] The main object of the present invention is to provide a semiconductor device having a bump electrode, whose under bump metal layer (UBM) uses a titanium layer as a bonding layer instead of the gold layer of Amberg, and can improve the choice of the rice carving process. Sex. Another object of the present invention is to provide a semiconductor device having a bump electrode. The UBM layer uses a nickel-vanadium layer as a barrier layer to avoid being affected by the input / output unit when the gold bump is plated. Maintain the uniformity of the gold bump surface roughness and surface roughness. A semiconductor device having a bump electrode according to the present invention includes an aluminum pad provided on a substrate, and the aluminum pad is at least partially exposed on a dielectric layer provided on the substrate. The aluminum pad is provided with a metal layer cladding layer under the bump, provided on the exposed pad portion exposed to the dielectric layer; a nickel-vanadium layer: ^ on the aluminum layer; and a titanium layer on the nickel Vanadium layer. A gold bump is disposed on the metal layer under the bump of the aluminum pad to form the bump electrode. The present invention further provides a method for manufacturing a semiconductor element having a bump electrode, comprising: (a) providing a substrate on which an aluminum contact pad is provided, and at least a part of the aluminum pad is provided at The dielectric layer on the substrate; (10) forming an indentation layer on the P01-029.ptd page 6 5. Description of the invention (4) The part exposed on the dielectric layer; (C) forming a nickel vanadium anaiiu, m) a layer on the shao layer; (d) forming a titanium layer on the nickel vanadium layer; (e) washing the titanium layer with a cleaning solution and planting the titanium layer on the titanium layer. The liver preparation mouth layer (It emits more electrical conductivity than the work layer to maintain the height of the gold bumps; the output of the input and output unit of the Λ broadcast T 厶 μ gold convex ghost uniformity uniformity. Furthermore, according to This month ’s metal layer under bumps (ϋΜ) uses titanium to effectively reduce costs. However, since the oxygen layer in the air will generate 4% of oxygen from the oxygen, it must be removed before electroplating to form gold bumps. The real connection and electrical performance. [This is the explanation between the metal layers] [Invention] 凊 Refer to Figure 4 according to the present invention is light and each-· electrical layer (such as the protective layer) 1 30 materials (such as chopping, sintering, etc.) (Polyimide layer) The semiconductor element 100 includes H, as shown in the example, its f · substrate 110, an aluminum pad 120, and so on. The substrate 110 may include a layer of semiconductor material gallium carbide, Silicon carbide, diamond, or other industry-compliant layers 1 30 can be—polyimide layer—a layer of coarse silicon dioxide, silicon nitride, or a silicon nitride layer that is well known in the industry; : As shown in the figure t, the protective layer 130 is better than the protective layer 130. According to the bamboo shoots: the middle surface of the lower part of the lower part is bare. Lunar under bump metal layer (UBM) 140 contains 483057 V. Description of the invention (5) An aluminum layer 1 40 a is provided on the aluminum pad 1 2 0 and exposed on the protective layer 1 3 0; a nickel The layer 140b is disposed on the aluminum layer 140a; and a titanium layer i4oc is disposed on the nickel-vanadium layer 140b. According to the present invention, the metal layer under the bump is an aluminum layer selected as an adhesion layer 'Because it is attached to the aluminum pad 1 2 0 and the protective layer 1 3 0
著力極佳。此外，該凸塊下金屬層1 4 0係選擇鈦層1 4 0 c作 為接合層’並且採用鈦作為減鑛（SpUtter)的無材 (target)，藉此可降低成本。第4圖至第5圖所示為根據 本發明較佳具體實施例具有凸塊電極半導體元件之主要製 程步驟。根據本發明之具有凸塊電極半導體元件係利用減 成製程（subtractive process)形成。 請參照第4圖，該凸塊下金屬層14〇之鋁層14〇a /鎳釩層 l、40b及鈦層140c係分別濺鍍沉積在護層13〇以及鋁接墊12〇 裸露於護層1 3 0的部分。Great focus. In addition, the under-bump metal layer 140 uses a titanium layer 140 c as a bonding layer 'and uses titanium as a spUtter target to reduce costs. 4 to 5 show the main process steps of a semiconductor device having a bump electrode according to a preferred embodiment of the present invention. A semiconductor device having a bump electrode according to the present invention is formed using a subtractive process. Please refer to FIG. 4. The aluminum layer 14a / nickel vanadium layer 1, 40b and titanium layer 140c of the metal layer 14o under the bump are sputter deposited on the protective layer 13o and the aluminum pad 12o, respectively. Layer 1 3 0.
請參照第5圖，其圖示一金凸塊（g〇lden bump) 15〇設 於該鋁接墊120之凸塊下金屬層14〇上而形成凸塊電極。詳 細言之，其係藉由下列步驟達成：（3)塗佈光阻 塊下金屬層140上，然後在光阻16〇上形成圖案結構| (patterning);以及（b)電沉積（61^化〇(1叩〇。衍〇11)金 於光阻的開孔區域藉此形成金凸塊。一般而言，該金凸 150 —般包含至少九十重量百分比的金。 在電鍍製程中，由於鈦會與空氣中之氧形成Ti〇或 T1 〇2因此，在電鑛形成金凸塊1 5 0前較佳先以清洗液去 除鈦層表面之Ti〇或Ti〇2，使金凸捭150與鈦 好的電性效益，其中該清洗液較佳為HC1。 ’保持良 483057 五、發明說明（6) 再者，由於根據本發明之凸塊下金屬層14〇係利用鎳釩 層140b作為阻障層，而鎳釩層14〇b之導電性相較於銅、 鈀、鉑或其它金屬差，因此在電鍍形成該金凸塊丨5〇時， 電鍍之電流密度受到基片11〇輸出入單元影響的程度最 小，藉此可保持金凸塊1 2 〇之高度均一性及表面粗糙度均 一性0 請再參照第5圖所示，該金凸塊丨5 〇形成於該凸塊下金屬 層140後，必須以金凸塊丨50為遮蔽蝕刻該凸塊下金屬層 140而製得如第6圖所示之具有凸塊電極半導體元件1〇〇。 該凸塊下金屬層140之鈦層i4〇c可採用如此^之酸液加以選 擇性餘刻。由於金凸塊1 5 0對於H C 1具有抗餘性，因此在餘 刻凸塊下金屬層1 40時，HC 1不會影響金凸塊丨5 〇之凸塊高 度及其表面粗糙度的均一性，有助於後續製程之良率。 雖然本發明已以前述較佳實施例揭示，然其並非用以限 定本發明，任何熟習此技藝者，在不脫離本發明之精神和 範圍内，當可作各種之更動與修改。因此本發明之保護範 圍當視後附之申請專利範圍所界定者為準。 耗Please refer to FIG. 5, which illustrates a gold bump 150 provided on the metal layer 14 under the bump of the aluminum pad 120 to form a bump electrode. In detail, it is achieved by the following steps: (3) coating the metal layer 140 under the photoresist block, and then forming a patterning structure on the photoresist 16 | (patterning); and (b) electrodeposition (61 ^ (0010) gold is formed in the opening area of the photoresist to form gold bumps. Generally, the gold bump 150 generally contains at least ninety percent by weight of gold. In the electroplating process, Because titanium will form Ti0 or T1 〇2 with oxygen in the air, it is better to remove Ti0 or Ti〇2 on the surface of the titanium layer with a cleaning solution before the gold bumps 150 are formed by the electric ore, so that the gold is convex. 150 and titanium have good electrical benefits, wherein the cleaning liquid is preferably HC1. 'Kaoliang 483057 V. Description of the invention (6) Furthermore, since the metal layer 14 under the bump according to the present invention uses a nickel-vanadium layer 140b As a barrier layer, the conductivity of the nickel vanadium layer 14b is inferior to that of copper, palladium, platinum, or other metals. Therefore, when the gold bump is formed by electroplating, the current density of the electroplating is subject to the substrate 11. The degree of influence of the input and output units is minimal, thereby maintaining the uniformity of the height and surface roughness of the gold bumps 1 2 0 Please refer to FIG. 5 again. After the gold bumps are formed on the metal layer 140 under the bumps, the gold bumps must be etched with the gold bumps as a mask. The figure shows a semiconductor device with a bump electrode 100. The titanium layer i4c of the metal layer 140 under the bump can be selectively etched with such an acid solution. Since the gold bump 1 50 is for HC 1 Residual resistance, so when the metal layer 1 40 under the bump is etched, HC 1 will not affect the uniformity of the bump height and surface roughness of the gold bump 丨 5 〇, which will help the yield of subsequent processes Although the present invention has been disclosed with the aforementioned preferred embodiments, it is not intended to limit the present invention. Any person skilled in the art can make various changes and modifications without departing from the spirit and scope of the present invention. The scope of protection of the invention shall be determined by the scope of the attached patent application.
P01-029.ptd 第9頁 483057 圖式簡單說明 【圖不說明 第1圖··習知且古几 第2圓：另—習、知且：f半導體元件之剖視圖。 第3圖：再—習知：有:f :極半導體元件之剖視圖。 第4圖至第5圖：其係用以 二導體：件之剖視圖。 例具有凸塊電極半導體元件之主 ，明較佳具體實施 第6圖：根據本發明較佳具體：。 體元件之剖視圖。 列具有凸塊電極半導 圖號說明】 10 13 半導體 護層 元 件 ；； 鋁接 凸塊 墊 下金屬 層 12 14a 基片 鉻層 14b 銅層 14c 金層 15 金凸 塊 20 半導體 元 件 24 凸塊 下金屬 層 24a 鈦層 24b 1巴層 24c 金層 30 半導體 元 件 34 凸塊 下金屬 層 34a 欽層 34b 1白層 34c 金層 β 100 半導體 元 件 110 基片 120 在呂接 墊 130 護層 140 凸塊 下金屬 層 140a 鋁層 140b 鎳釩層 140c 鈦層 150 金凸 塊 160 光阻 P01-029.ptd 第10頁P01-029.ptd Page 9 483057 Brief description of diagrams [The diagrams do not explain diagram 1 ·· Knowledge and Ancient Times Second Circle: Another—Xie, Zhiqi: Sectional view of f semiconductor components. Figure 3: Re-known: yes: f: cross-sectional view of a semiconductor device. Figures 4 to 5: It is a sectional view of two conductors: a piece. Example of a semiconductor device with a bump electrode, the preferred embodiment is shown in Fig. 6: Preferred embodiment according to the present invention. Sectional view of a body element. Columns with bump electrode semiconducting drawing numbers] 10 13 Semiconductor protective layer element; Aluminum under bump pad metal layer 12 14a Substrate chromium layer 14b Copper layer 14c Gold layer 15 Gold bump 20 Semiconductor element 24 Under bump Metal layer 24a Titanium layer 24b 1 Bar layer 24c Gold layer 30 Semiconductor element 34 Metal layer under bump 34a Chin layer 34b 1 White layer 34c Gold layer β 100 Semiconductor element 110 Substrate 120 Under Lumination 130 Protective layer 140 Under bump Metal layer 140a Aluminum layer 140b Nickel vanadium layer 140c Titanium layer 150 Gold bump 160 Photoresistor P01-029.ptd Page 10