465070 五、發明說明（1) 本發明係有關於一種半導體積體電路之技術，特別是 有關於一種靜電放電保護元件，其可避免内部電路遭致靜 電破壞，同時記錄在積體電路之量測、安裝、及使用過程 中所發生的任何靜電放電事件。 靜電放電（Electrostatic Discharge)幾乎存在於積 體電路之量測、组裝、安裝、及使用過程中，而造成積體 電路的損壞’間接影響到電路甚或元件的性能。因此，請 參考第1圖’在半導體積體電路技術領域中，一般會在近 積體電路接合墊（pad)l〇處設置一靜電放電保護電路 (electrostatic discharge protection circuit) 14 > 以保護内部電路（internai circuit)12，避免其遭受靜電 放電破壞。 承上所述，習知之靜電放電保護電路可為二極體、側 向石夕控整流器（LSCR )、或低電壓觸發之矽控整流器 (LVSCR)等…所組成；其操作之原理係利用靜電放電保護 電路之擊發電壓低於内部電路之崩潰電壓，因此在靜電放 電事件發生時’開啟導通另一放電路徑，使大量的靜電放 電電流經由靜電放電保護電路釋放，而避免靜電放電應力 破壞内部電路。 但是’除非靜電放電應力已對習知之靜電放電保護電 路造成永久性的破壞，否則並無從知曉積體電路在量測、 組裝、安裝、及使用過程中靜電放電事件發生與否。換言 之’在不損壞靜電放電保護電路的前提下，習知者並無法 記錄是否發生了靜電放電事件。465070 V. Description of the invention (1) The present invention relates to the technology of a semiconductor integrated circuit, in particular to an electrostatic discharge protection element, which can prevent the internal circuit from being damaged by static electricity and record the measurement in the integrated circuit , Installation, and use of any electrostatic discharge event. Electrostatic discharge (Electrostatic Discharge) almost exists in the measurement, assembly, installation, and use of integrated circuits, and causes damage to integrated circuits' indirectly affecting the performance of circuits or even components. Therefore, please refer to FIG. 1 'In the field of semiconductor integrated circuit technology, an electrostatic discharge protection circuit 14 is generally provided near the integrated circuit pad 10 to protect the interior Circuit (internai circuit) 12 to protect it from electrostatic discharge damage. As mentioned above, the conventional electrostatic discharge protection circuit can be composed of a diode, a lateral stone-controlled rectifier (LSCR), or a low-voltage triggered silicon-controlled rectifier (LVSCR), etc .; the principle of its operation is to use static electricity The firing voltage of the discharge protection circuit is lower than the breakdown voltage of the internal circuit. Therefore, when an electrostatic discharge event occurs, 'open and conduct another discharge path, so that a large amount of electrostatic discharge current is discharged through the electrostatic discharge protection circuit, so as to avoid the electrostatic discharge stress from damaging the internal circuit. . However, unless the electrostatic discharge stress has caused permanent damage to the conventional electrostatic discharge protection circuit, it is impossible to know whether an electrostatic discharge event occurs during the measurement, assembly, installation, and use of the integrated circuit. In other words, without knowing that the electrostatic discharge protection circuit is damaged, the learner cannot record whether an electrostatic discharge event has occurred.
第4頁 465070 五、發明說明（2) ' --- 一因’本發明之主要目的在於提供一種靜電放電保護 7C件’，、可在保護内部電路使其免受靜電破壞之前提下， 同時紀錄在量測、組裝、或使用過程間是否有靜電放電效 應產生。 為I達到本發明之目的，係提供一種靜電放電保護元 件’係設置於一接合墊與一電位點間，用以保護與該接合 墊巧接之一内部電路；包括：—第一可抹除可編程唯讀記 憶單元’以其控制閘極連接至該接合墊處，而以其源/汲 極連接至一控制單元；一第二可抹除可編程唯讀記憶單 元’設置於該内部電路中；以及—金氧半電晶體，以一源 /汲極連接至該接合墊處，而以另一源/汲極與其閘極連接 至該電位點。 其中，該金氧半電晶體係為一NM0S電晶體，並用以作 為一靜電放電保護元件’其具有較内部電路之崩潰電壓為 低的擊發電壓’因此當靜電放電事件發生時，能開啟導通 另一放電路徑，使大量的靜電放電電流經由該金氧半 日日 體釋放’而避免靜電放電應力破壞其内部電路。 同時’藉由靜電放電帶來的高電壓會對該第一可抹除 可編程唯讀記憶單元之臨界電壓（threshold voltage) (或汲極電流）造成改變，因此在與一設於内部電路之第二 可抹除可編程唯讀記憶單元之標準電壓（或電流）值相較之 下可測得一偏移值，因而能將靜電放電事件之發生與否 錄下來》 ° 為讓本發明之上述目的.、特徵、和優點能更明顯易Page 4 465070 V. Description of the invention (2) '---' The main purpose of the present invention is to provide a 7C component with electrostatic discharge protection ', which can be lifted before protecting the internal circuit from electrostatic damage, and Record whether there is any electrostatic discharge effect during measurement, assembly, or use. In order to achieve the purpose of the present invention, an electrostatic discharge protection element is provided between a bonding pad and a potential point for protecting an internal circuit that is connected to the bonding pad; the first erasable is: The programmable read-only memory unit is connected to the bonding pad with its control gate and connected to a control unit with its source / drain; a second erasable programmable read-only memory unit is provided in the internal circuit. Medium; and-a metal-oxide semiconductor transistor, connected to the bonding pad by a source / drain, and connected to the potential point by another source / drain and its gate. Among them, the metal-oxide-semiconductor system is a NMOS transistor and is used as an electrostatic discharge protection element 'it has a lower firing voltage than the breakdown voltage of the internal circuit'. Therefore, when an electrostatic discharge event occurs, it can be turned on and turned on. A discharge path allows a large amount of electrostatic discharge current to be released through the metal-oxygen hemi-helix, thereby preventing the electrostatic discharge stress from damaging its internal circuit. At the same time, the high voltage brought by electrostatic discharge will change the threshold voltage (or drain current) of the first erasable programmable read-only memory cell. The standard voltage (or current) value of the second erasable programmable read-only memory cell can measure an offset value, so that the occurrence or non-discharge of an electrostatic discharge event can be recorded. The above objectives, features, and advantages can be made more obvious and easier
465070 五、發明說明（3) 懂’下文特舉一較佳眚渝 明如下： 丨’並配合所附圖式，作詳細説 圖式之簡單說明： 第1圖係顯示習知之靜雷喊帝 _ 第2圖係顯示依據本發明可每、護電路設置圖=，必 電放電保護元件設置圖示' '錄靜電放電事4之靜 電放顯:Λ據本發明之可紀錄靜電放電事件之靜 動作元件間之關係圖示； 雪係顯不依據本發明之可紀錄靜電放電事件之靜 電保遵元件設置於一半導體基板上之細部構造圖示； 第4Β圖係顯示依據本發明之另—種可紀錄靜電放電事 件之靜電放電保護元件設置於—半導體基m細部構造 圖不。 符號說明 10、20、30~接合墊；12、22〜内部電路；14~靜電放 電保護電路Vss接地點；24、32〜可紀錄靜電放電事件之靜 電放電保護元件；24卜靜電放電保護電路；242~靜電放電 事件偵測元件’ 3 21〜保護電路；3 2 2〜偵測元件；3 3、3 5 ~ 類比/數位轉換單元；34〜比較單元；36〜標準單元；37~ 控制單元；3 8〜輸入/輸出緩衝；4 0〜石夕基板；41 ~源/ j：及 極；42~閘極；421〜閘氧化層；422〜閘電極；43〜P型離子 濃摻雜區；44~源/汲極；451、551〜閘氧化層；452、552~ 浮動閘；4 5 3、5 5 3 ~隧穿氧化層；4 5 4、5 5 4〜控制間；a、465070 V. Description of the invention (3) Understand 'the following is a good example of Yu Ming: 丨' and in conjunction with the attached drawings, a brief description of the drawings in detail: Figure 1 shows the known quiet thunder of the emperor _ Figure 2 shows the layout of the protective circuit according to the present invention =, the diagram of the installation of the protection component of the electrical discharge '' Static discharge of the recording of electrostatic discharge event 4: Λ according to the present invention can record the static discharge event static Diagram showing the relationship between the action components; Snow is a detailed structure diagram showing that the electrostatic compliance component that can record the electrostatic discharge event according to the present invention is provided on a semiconductor substrate; FIG. 4B shows another kind according to the present invention. An electrostatic discharge protection element capable of recording an electrostatic discharge event is provided in a detailed structure diagram of a semiconductor substrate. Explanation of symbols 10, 20, 30 ~ bonding pads; 12, 22 ~ internal circuit; 14 ~ Vss ground point of electrostatic discharge protection circuit; 24, 32 ~ electrostatic discharge protection elements that can record electrostatic discharge events; 24 static discharge protection circuit; 242 ~ electrostatic discharge event detection element '3 21 ~ protection circuit; 3 2 2 ~ detection element; 3 3, 3 5 ~ analog / digital conversion unit; 34 ~ comparison unit; 36 ~ standard unit; 37 ~ control unit; 3 8 ~ input / output buffer; 40 ~ Shi Xi substrate; 41 ~ source / j: and electrode; 42 ~ gate electrode; 421 ~ gate oxide layer; 422 ~ gate electrode; 43 ~ P type ion doped region; 44 ~ source / drain; 451,551 ~ gate oxide layer; 452,552 ~ floating gate; 4 5 3, 5 5 3 ~ tunneling oxide layer; 4 5 4, 5 5 4 ~ control room; a,
465070 五、發明說明（4) ： ' ---- B-路徑A、路徑B。 ， 實施例 請參考第2圖’所示係為一可紀錄靜電放電事件之靜 電放電保護元件24，設置於一接合墊2〇與一内部電路22 間；其中’該可紀錄靜電放電事件之靜電放電保護元件24 包括一靜電放電保護電路241與一靜電放電偵測元件242， 其以並聯的形式共同連接至接合墊2〇與内部電路22間。此 外，該靜電放電保護電路241之另一端更與接地點。^相 連’用以排除靜電放電事件發生時所產生大量的靜電放電 電流。 接下來’請參考第3圖，所示係為依據本發明之可紀 錄靜電放電事件之靜電放電保護元件與其他動作元件間之 關係圖示；如圖所示，該可紀錄靜電放電事件之靜電放電^ 保護元件32係與一接合墊3〇相速’且該靜電放電保護元件 32包括一保護電路mi與一偵測元件322。當靜電放電事件 發生於該接合墊30處，大量的靜電放電電流開啟導通一放 電路徑，使大量的靜電放電電流經由該保護電路3 2 1釋放 至該接地點Vss處，以防止靜電放電電流對輸入/輸出緩衝 38造成破壞。 另一方面，控制單元37係用來控制偵測元件322與用 以比較偵測元件322偏移值之標準單元36之臨界電壓，使 其在一穩定狀態《當靜電放電事件發生之時，大量的靜電 放電電流會對偵測元件322之臨界電壓（或汲極電流）產生465070 V. Description of the invention (4): '---- B-path A, path B. For an example, please refer to FIG. 2. An electrostatic discharge protection element 24 capable of recording an electrostatic discharge event is shown in FIG. 2, which is disposed between a bonding pad 20 and an internal circuit 22; The discharge protection element 24 includes an electrostatic discharge protection circuit 241 and an electrostatic discharge detection element 242, which are commonly connected in parallel to the bonding pad 20 and the internal circuit 22. In addition, the other end of the ESD protection circuit 241 is further connected to a ground point. ^ Associated 'is used to exclude a large amount of electrostatic discharge current generated when an electrostatic discharge event occurs. Next, please refer to FIG. 3, which is a diagram showing the relationship between the electrostatic discharge protection element and other action elements that can record the electrostatic discharge event according to the present invention; as shown in the figure, the static electricity of the recordable electrostatic discharge event The discharge protection element 32 is at a speed of 30 ° with a bonding pad, and the electrostatic discharge protection element 32 includes a protection circuit mi and a detection element 322. When an electrostatic discharge event occurs at the bonding pad 30, a large amount of electrostatic discharge current opens and discharges a discharge path, so that a large amount of electrostatic discharge current is released to the ground point Vss through the protection circuit 3 2 1 to prevent the electrostatic discharge current from The input / output buffer 38 causes damage. On the other hand, the control unit 37 is used to control the threshold voltage of the detection element 322 and the standard unit 36 used to compare the offset value of the detection element 322, so that it is in a stable state. Electrostatic discharge current will generate a threshold voltage (or drain current) of the detection element 322
^6507 0 五、發明說明（5) 改變，這種改變的訊號傳至類比/數位轉換單元33，再與 標準單元36的標準訊號經類比/數位轉換單 訊號在比較單元34中比較，由此便可測出該❼^ 之臨界電壓（或汲極電流）改變與否，因而知悉靜 件是否發生。 承接上述，請參看第4A圖與第4B圖，其為依據本發明 之實施例所適用之可紀錄靜電放電事件之靜電放電保護元 件32之細部構造圖示，其中，標號相同者代表相同的構 造；如上所述，該保護電路321可為一NM〇s電晶體，其包 括一對源/沒極41 ’互為相隔設置於一矽基板4〇上，&間 之矽基板40表面則為一閘極42，包括一閘氧化層421與一 閘電極422。並且，該源/汲極41之一係連接至接合墊'，而 另一源/汲極41與閘極42則與一接地點Vss相連。於該M〇s 電晶體之一侧則摻雜一P型離子濃摻雜區43，其並盥接地 點Vss連接。 此外，與該接合墊相連的更包括一可抹除可編程唯讀 記憶單元，包括一對源/汲極44，互為相隔設置於矽基板 40中，且與控制單元連接；而其間之閘極結構可為二：如 第4A圖所示者為分離式閘極（split gate)，其包括一閘氧 化層451、一浮動閘452、一隧穿氧化層453、以及一控制 閘454。而第4B圖中所示者則為堆疊式閘極（stack gate)，包括一閘氧化層551、一浮動閘552 '一隧穿氧化 層553、以及一控制閘554。 當靜電放電事件發生於接合墊時，大量的靜電放電電^ 6507 0 V. Description of the invention (5) The changed signal is transmitted to the analog / digital conversion unit 33, and then compared with the standard signal of the standard unit 36 through the analog / digital conversion single signal in the comparison unit 34, thereby You can measure whether the threshold voltage (or drain current) of the ❼ ^ has changed, so you know if a static part has occurred. Following the above, please refer to FIG. 4A and FIG. 4B, which are detailed structural diagrams of the electrostatic discharge protection element 32 capable of recording electrostatic discharge events applicable according to the embodiment of the present invention, wherein the same reference numerals represent the same structure As mentioned above, the protection circuit 321 may be a NMOS transistor, which includes a pair of source / inverters 41 ′ arranged on a silicon substrate 40 separately from each other, and the surface of the silicon substrate 40 between & A gate electrode 42 includes a gate oxide layer 421 and a gate electrode 422. Moreover, one of the source / drain 41 is connected to the bonding pad ', and the other source / drain 41 and the gate 42 are connected to a ground point Vss. A P-type ion doped region 43 is doped on one side of the Mos transistor, and is connected to the ground point Vss. In addition, an erasable and programmable read-only memory unit connected to the bonding pad includes a pair of source / drain 44 arranged in the silicon substrate 40 at a distance from each other and connected to the control unit; The pole structure can be two: as shown in FIG. 4A, a split gate includes a gate oxide layer 451, a floating gate 452, a tunneling oxide layer 453, and a control gate 454. The stack gate shown in FIG. 4B includes a gate oxide layer 551, a floating gate 552 ', a tunneling oxide layer 553, and a control gate 554. When an electrostatic discharge event occurs in the bonding pad, a large amount of electrostatic discharge
46507 0 五、發明說明（6) 流遂延路徑A流至NM0S電晶體之源/汲極41 /汲極41與閘極接地，因而開啟導 而將靜、 電放電電流排除。並且，靜電放電電二^路徑’而：静 可抹除可編程唯讀記憶單元之控路勧而流至 該控制閘極454、554處產生高電壓，t ^ 2 f 子穿隨效應的影響，使得電子巧“更丄於電容輕合與電 從呀电丁田源/汲極44穿過閘氧化層 45Ϊ、551而注入浮動閑極452、552，因此改變了可抹除可 編程唯讀記憶單元之臨界電壓（或汲極電茂）。 綜上所述，本發明之可紀錄靜電放電事件之靜電放電 保護元件係利用一M0S電晶體做為一靜電放電保護元件， 當靜電事件發生之時開啟導通一路徑，以排除大量的靜電 放電電流，並釋放靜電放電應力而達到保護内部電路的目 的；於其側並設置一崩潰電壓較該龍⑽電晶體之擊發電壓 要间之可抹除可編程唯讀記憶單元，以利用靜電放電發生 於接合墊處之瞬間高電壓，對該可抹除可編程唯讀記憶單 元進行程式化並改變其臨界電壓，於是，藉由量測其偏移 量便可得知靜電事件之發生與否，因而記錄在積體電路之 里測、安裝、及使用過程中所發生的任何靜電放電事件。 雖然本發明已以較佳實施例揭露如上，然其並非用以 限定本發明’任何熟習此項技藝者，在不脫離本發明之精 神和範圍内’當可作更動與潤飾，因此本發明之保護範圍 當視後附之申請專利範圍所界定者為準。 °46507 0 V. Description of the invention (6) The flow path A flows to the source / drain 41 / drain 41 of the NM0S transistor, which is grounded to the gate, so it turns on to eliminate static and electrical discharge currents. In addition, the electrostatic discharge path can be erased: the control circuit of the programmable read-only memory unit can be erased and flowed to the control gates 454 and 554 to generate a high voltage. The effect of t ^ 2 f This makes electronics more "better for light-on capacitors and electricity from Yading Dianyuan source / drain 44 through gate oxide layers 45Ϊ, 551 and injected into floating idler 452, 552, so the erasable programmable read-only memory has been changed The critical voltage of the cell (or the drain electrode). In summary, the electrostatic discharge protection element of the present invention that can record electrostatic discharge events uses a MOS transistor as an electrostatic discharge protection element. When an electrostatic event occurs, Turn on a path to eliminate a large amount of electrostatic discharge current and release the electrostatic discharge stress to protect the internal circuit; set a breakdown voltage on its side that can be erased and removed from the firing voltage of the dragon crystal transistor The read-only memory cell is programmed to utilize the instantaneous high voltage at which the electrostatic discharge occurs at the bonding pad, to program the erasable programmable read-only memory cell and change its threshold voltage. Its offset can tell whether or not an electrostatic event has occurred, so any electrostatic discharge events that occur during the measurement, installation, and use of the integrated circuit are recorded. Although the present invention has been disclosed above as a preferred embodiment However, it is not intended to limit the present invention, 'any person skilled in the art, without departing from the spirit and scope of the present invention', can be modified and retouched. Therefore, the protection scope of the present invention shall be regarded as the scope of the attached patent application. Defined shall prevail. °