TW444471B - Multi-phase DPSK communication receiver providing speed of 1/T symbol per second - Google Patents

Abstract

The invention relates to a DPSK demodulation system, which has fewer composition unit than conventional technology. First of all the mid frequency receiving signal of DPSK will pass a analog/digital converter and then pass Hilbert conversion pair to generate signal with same phase and rotation 90 degrees. Subsequently these signals pass the unit time delay line respectively. The carrier phase rotation is removed by going through the digital carrier rotation remover. The signals of the output terminal of rotation remover and output terminal of the Hilbert conversion pair are processed with complex number multiplication to obtain the I and Q data after demodulation.

Description

4444 71 V. Description of the invention (1) The present invention relates to a demodulation method for multi-phase differential phase modulation (DpsK) signals, and a demodulator for multi-phase DPSK signals. Conventional technical description: Differential phase modulation technology is widely used in binary digit communication. In general, 'DPSK is a non-homogeneous type of phase modulation technology', which can eliminate the need for the receiver to use coherent reference signals. Generally, the performance of a non-coherent demodulator is about 1 to 3 d B ′ worse than that of a coherent demodulator, but its receiver structure is simpler and cheaper. There are many different types of reading and testing techniques for DPSK demodulation processing. The basic 'differential phase modulation' signal demodulation technique is to estimate the phase change of the two received signals. An example of a conventional block diagram of a DPSK demodulator is shown in Figure 1. The signal at the β ’s first ’receiver is converted to an IF signal and then processed by a band-pass filter 201 for band-pass filtering. The output of the band-pass filter 201 passes through the unit time delay line 202, and this signal and the signal passing through the 90-degree rotator 205 are respectively mixed with the undelayed signal by the mixer (203, 204), and the resulting signal is processed. This is the phase change on the I and Q channels. … In order to remove high-order harmonic components, a low-pass filter is required. The A / D converter converts the analog signal of the I channel and the Q channel into a digital signal. The appropriate sampling frequency is selected, and then determined by the decision device to restore the information of the transmission signal. * The purpose and summary of the invention: For the above-mentioned conventional technology, two low-pass filters are required. I— C: \ Patent \ 870275 .ptd page 4-44447] 5. Description of the invention (2) The device is used to remove high-order harmonics. The main purpose of the present invention is to further simplify the line and signal flow of the non-homogeneous DPSK demodulator, while using digital signal processing technology 'to remove two low-pass filters and improve the performance of the receiver. A novel implementation example is shown in Miner. In item 22, it can be seen that the present invention no longer uses two low-pass filters, but uses some processing blocks, including Hi lbert transform pairs, a pair of unit time delay lines, a digital carrier rotation remover, and a complex multiplication. Device. According to the present invention 'First, the DPSK modulation signal is converted into an intermediate frequency signal' and a band-pass filtering process is performed in the band-pass filter 101. The A / D converter 102 is used to receive an intermediate frequency signal and provide a digital signal at a sampling frequency. The Hilbert conversion pair provides in-phase signals as well as 90-degree phase rotation signals. A pair of delay units 105 and 106 receives the output signal of the Hibert conversion pair 20, and generates an in-phase signal with a unit time delay and a 90-degree phase rotation signal. Next, the digital carrier rotation remover 30 removes the carrier phase rotation. The complex multiplier 50 performs complex product processing on the rotation-removed signal and the undelayed signal delayed by one unit time. For the conventional technique of using two low-pass filters to remove high-order harmonics, it is' not easy to use fewer chirp filters at the same time without adding more noise, so the complexity of the circuit cannot be reduced. However, for the present invention, since the output after complex multiplication demodulation is a pulse-shaped fundamental frequency signal, there is no problem of inter-symbol crosstalk. Therefore, using appropriate timing recovery circuits and sampling points, its function will be the best The characteristics of the present invention will become more apparent from the description of the following embodiments and related drawings.

C: \ Patent \ 870275.ptd Page 5 444471 V. Description of the invention (3) Brief description of the diagram: Figure 1 shows a block circle of a typical non-homogeneous DPSK demodulator in conventional technology. Figure 2 shows the main block diagram of the non-homogeneous DPSK demodulator and the signal flow® according to the present invention. Figure 3 is an embodiment of a digital carrier rotation remover. 24 is an embodiment of a complex multiplier. Figure 5 shows a further detailed block diagram of a non-homogeneous DPSK demodulator according to the present invention. Reference number 20 in the figure Hilbert transform pair 30 digital carrier rotation remover 40 frequency compensator 50 complex multiplier 60 frequency offset estimator 70 Timing recovery device 101 Band-pass filter 102 A / D converter 1 03 90-degree rotator 104 Time delay line 105 Unit time delay line 106 Unit time delay line 107 Decision device

C: \ Patents \ 870275.ptd 苐 Page 6 444471 Five'Invention (4) 108 Determining Device 109 Squarer 110 Narrow Band Pass Filter 201 Band Pass Filter 202 Unit Time Delay Line 203 Mixer 204 Mixer 205 9 0 degree phase splitting 206 low-pass canceller 207 low-pass filter 208 A / D converter 209 A / D converter 210 determination device 211 detailed description of a preferred embodiment of the determination device: The processed signal is a non-homogeneous differential phase modulation (DPSK) signal. Refer to circle two, circle two will show the main block diagram and signal flow chart of the present invention. Its main theoretical basis and implementation will be explained in detail with the following signal analysis. Β First, the DPSK signal received by the receiver of the demodulation device passes through The filter 10 is filtered to an intermediate frequency signal R (t). This analog signal can be expressed by the following general formula R (t) = Mcos (〇) ct + ^ (t) + φ), where M Is a constant 'is the diameter frequency, 0 (t) is the DPSfC signal

C: \ Patents \ 870275.ptd Page 7 444471 5. The phase of the message of invention description (5), P is a constant phase. With appropriate expansion and transformation, R (t) can be rewritten as R (t) = Acos (〇) ct + 0 (t)) + Bs in (wct + 0 (t)), ... (1) where A = Mcos, B = -Msi η ψ. For example, if the data transmission rate is 1 / T symbols per second (Symboi>), for two signals of two-phase DPSK with a time interval T, the phase difference will be 0 or π paths. Measure. For two signals of four-phase DPSK with a time difference interval of τ, the phase difference will be 0, π / 4, 7Γ / 2, 3 ^ / 4, π, 5 λγ / 4, 3ττ / 2 or 77Γ / 4 measured. In other words, for the demodulation of DPSK signals, the main work is to measure the phase difference between adjacent signals. The demodulation method of the present invention will be applicable to general multi-phase DPSK systems. Analog signals R (t) is then passed through an A / D converter 102. After sampling at the digitizing time t = nT, the digital modulation wave Rn can be written as

Rn = Acos (n 〇) eT + 0 (nT)) + Bsin (n < ucT + 0 (ηΤ)). ... (2) According to the device of the present invention, the sequence Rn will first pass through the Hilbert transform pair 20 in order to obtain the in-phase signal of the digital modulation wave Rn and the 90-degree phase rotation signal. So on the output of Hi lbert transform pair 20, we can get xn = Acos (n < ycT + 0 (nT)) + Bsin (n Ct > cT + 0 (ηΤ)) and ·. (3) yn = -Asin (n 6 > CT + 0 (nT)) + Bcos (n < wcT + 0 (ηΤ)) * According to the device of the present invention, Hilbert transforms the in-phase signal Xn and 90-phase phase rotation signal yn output from 20 through unit time Ting Chi Lines 1 05 and 106. Obtained at the output of the unit 105

0ΛPatent \ 870275.ptd Page 8 ^ 444 7t V. Description of the Invention C6) xn-] = Acos ((n-1) ωεΤ + 0 ((n-1) T)) + Bsin ((n-1) ωεΤ + θ ((nl) T)) and

Yn. ^-AsinCCn-l) wcT + C (n-1) T)) + Bcos ((n-1) wcT + Q ((n-1) T)). ... (4) According to the device of the present invention, the delayed in-phase signal xn_! And the 90-degree phase rotation signal ynl will pass through the digital carrier rotation remover 30 »Referring to FIG. 3, the digital carrier rotation remover 30 is actually only a complex multiplication The device performs complex multiplication on the signals xn_! And yn_! And multiplies them by (cos (-0 ^ 1 ·) + iPsin (-o > cT)) to remove xn_ 丨 and carrier phase rotation per unit time. The output signals of the digital carrier rotation remover 30 are xn-i, d = Acos (η ω0Ί + θ (Cn-1) Τ)) + Bs in (η < ycT + 0 ((η-1) Τ)) And yn-i, d ~~ Asi η (n ct) cT + 0 ((n-1) T)) + Bcos (n < ycT + 0 ((nl) T)). … (5) According to the device of the present invention, the undelayed in-phase signal xn and the 90-degree phase rotation signal Kyn and the in-phase signal xnH.d and the 90-degree phase rotation signal yn_ld which delay and remove the carrier phase rotation per unit time will be inputted into a complex multiplication器 50。 50. Figure 4 provides a more detailed schematic circle of the complex multiplier 50. After simplification, the output of the complex multiplier 50 can be expressed as W-Ld + yny… = U2 + B2) cos (0 (nT) -0 ((nl) T)) and ... (6)-(A2 + B2 ) sin (0 (nT) -0 ((nl) T)). According to the device of the present invention, the output signals χβη-υ + ynyn- 丨, d and ynxn-hd-xnyn- 丨 .d of the complex multiplier 50 will be added to the decision devices 107 and 108 respectively.

C: \ Patents \ 870275.ptd Page 9 444471 V. Description of Invention (7). According to the transfer agreement of DPSK, the decision device 107 can demodulate the transfer bit. Refer to FIG. 5. FIG. 5 is another preferred embodiment of the present invention. Β In the preferred embodiment, in addition to FIG. 2, a band-pass filter, an A / d converter 102, a Hilbert conversion pair 20, and a pair are included. Unit time delay lines 1Q5 and 106 'A digital carrier rotation remover 30, a complex multiplier 50, and a determining device 107 and 108, further including a frequency offset estimator 60' for detecting a frequency offset A frequency compensator 40 between the digital carrier rotation remover 30 and the complex multiplier 50 to reduce the phase error caused by the frequency offset; and a timing recovery device 70. Further explanation is as follows: Let r be the carrier phase offset between the transmitter and the receiver caused by transmission noise, interference, etc. Referring to circle two, if the carrier phase offset r is considered, equations (2), (3), (4), (5) and (6) will be modified as Rn = Acos (n 〇) eT + ^ (nT)- r) + Bsin (n ωεΤ + 0 (nT)-r),. (7) '· _ · xn = Acos (n 〇) cT + 0 (ηΤ)-r) + Bsin (n wcT + 0 (ηΤ)-r ), Yn = -Asin (n 6 > CT + 0 (nT)-r) + Bcos (n & JCT + 0 (nT)-7), xn.! = Acos ((n-1) ω0Τ + θ ((η -1) T)-r) + Bsin ((nl) ω〇τ + θ ((n-1) T)-γ), yn., = -As in ((nl) 6 > CT + 0 ((η- 1) T) ~ γ) + Bcos ((nl) + θ ((η-1) Τ)-r), xn.ld = Acos (η ωςΤ + 0 ((nl) T) -2 r) + Bsin ( n ω0Τ + Θ ((nl) T) -2 r),

CA patent \ 870275. Ptd page 104444 7ι 5. Description of the invention (8) V, rt = -Asin (n ωεΤ + ^ ((η-1) Τ) -2 γ) + Bcos (n ωεΤ + Θ j π -11 〇 ((η-1) Τ) -2 τ), XnXn-Kd + ynyn-Kd ^ A ^ B ^ cosC θ (ηΊ)-0 ((η -1)) + 7) -nVud-XnyH . ^-UHBysiiKeCnTHGn-mH r) ° From the above formula we notice that due to the carrier phase offset effect, the original digital carrier rotation remover 30 will be multiplied by a complex number and multiplied by ((: 〇5 (-&) <; 1'-7〇 + jsin (-0cT- r)) to remove the delay signal Xn-1 and yn-i per unit time carrier phase rotation to obtain the in-phase signal Xm, d and 90 degree phase rotation signal. To overcome the carrier phase Offset effect, we need a compensation amount to correct the complex multiplication factor (cos (-6 > CT- r) + isin (-〇jcT- γ)) to (cos (-ojcT) + jsin (-Ct > cT) ). Further explanation, referring to circle 5, in order to remove the error caused by the carrier phase offset effect, we use the implementation of the frequency offset estimator 60 and the frequency compensator 40. First, the frequency offset estimator 60 will be The form of a complex multiplier 'produces an in-phase signal cos (γ) to And 90 degree phase rotation signal sin (r) to provide the frequency compensator 40. The frequency compensator 40 is installed between the digital carrier rotation remover 30 and the complex multiplier 50, and delays and removes it in the form of a complex multiplier. The in-phase signal xn- 丨 of carrier phase rotation per unit time, "i multiplies its 90-degree phase rotation signal Sfey " d by (cos (7〇 + jsin (γ)) to reduce the error caused by the carrier phase shift. Referring to FIG. 5, according to the device of the present invention, we will perform a non-linear timing recovery process. The timing recovery device 70 includes a squarer and a narrow-band pass filter 11 to generate a set of symbol-dependent frequency (syjnb 〇i ΙΗΠΗΓ C: \ Patents \ 870275.ptd ^ π Page " ^ 444 7f V. Description of the invention (9) frequency) The timing signal selected enables the entire decompression signal to be sampled, measured and demodulated at the correct rate. The class of the dagger end described above is only the preferred embodiment of the present invention and defines the scope of the implementation of the present invention. That is, all equal changes and modifications made according to the scope of patent application of the present invention = are the patents of the present invention What the scope implies cover.

CA Patent \ 870275.ptd 12th!

Claims (1)

4444 7 81116 3 59 6. Scope of patent application 1. A communication receiver for multi-phase non-homogeneous differential phase modulation (DPS K) with 1 / T symbol rate per second, including: a bandpass filter The converter 'filters the DPSK signal received by the receiving end of the demodulation device into an intermediate frequency signal R (t); an A / D converter is connected to the band-pass filter and receives the intermediate frequency signal R (t) at the sampling rate ) And provide a digital sampling signal Rn; a Hilbert conversion pair coupled to the A / D converter to provide an in-phase signal xn and a 90-degree phase rotation signal yn with the sampling signal Rn; a pair of unit time delay units coupled to The Hi lbert conversion pair to provide a delayed in-phase signal xnq and a delayed 90-degree phase rotation signal; a digital carrier rotation remover coupled to the pair of unit time delay units to provide delay and remove unit time carrier phase The rotated in-phase signal xn_1 > d and the 90-degree phase rotation signal ynH, d which delays and removes carrier phase rotation per unit time; and a complex multiplier, which includes four multipliers and two adders, the The first and second input terminals of the digital multiplier are connected to the output terminal of the Hilbert conversion pair, and the third and fourth input terminals are connected to the output terminal of the digital carrier rotation remover to provide _ sampling signals wu + ynyn 'd and ynxn-i, < i-xnyn- 丨 # A pair of determining devices, which are combined to the complex multiplication ^ to identify and restore the information of the transmission signal: ^ {Μ 2. As described in the first item of the scope of patent application It is designed for multi-phase flutter coherent differential phase modulation (DPSK) communication with a 1 / τ symbol rate per second. CA patent \ 870275. Ptd 444471 6. Application scope ~ ~~~ Receiver, further It includes: a frequency offset estimator 'the round-in end of the frequency offset estimator is connected to the input end and the output end of the pair of determining devices' in order to estimate the frequency offset error; and a frequency compensator' the frequency The input of the compensator is connected to the output of the digital carrier rotation remover, and the output of the frequency compensator is connected to the input of the complex multiplier to provide a correction value for the frequency offset. 3. The communication receiver for multi-phase non-homogeneous differential phase modulation (DPSK) with a 1 / τ symbol rate per second as described in the second item of the patent application scope further includes: a timing recovery device, It includes a squarer and a narrow-band pass filter to provide a set of timing signals selected according to the symbol frequency, so that the analog signal at the input of the entire demodulator can be sampled, detected and detected at the correct rate. Demodulate it. C: \ patent \ 870275. Ptd page 14