A7 B7 43481 8 5541twf.doc/008 五、發明説明（丨） 本發明是有關於一種半導體元件之製造方法，特別 是有關於一種多重金屬內連線之製造方法0 多重金屬內連線的製造過程中，牽渉到微影、蝕刻及 薄膜沈積等製程。典型的微影製程係先在半導體晶片之表 面上塗覆一層光阻，然後進行曝光製程，使通過光罩之光 源與光阻產生光化學反應，其後再經由顯影步驟將光罩上 之圖案複製到光阻上上。 一般光阻係以旋轉塗覆（spin coating)的方式來進行 的，即將光阻液灑在晶片上並使之旋轉，利用離心力使光 阻液往晶片的外圍移動，最後形成一層極均勻的光阻層。 而曝光則是採用步進機(stepper)來進行晶片上光阻液之曝 光。 通常完成光阻塗覆後之半導體晶片，必須經過一道晶 邊液滴淸洗(edge bead rinse，EBR)步驟，其目的爲洗去可 能由半導體晶片邊緣滴下的光阻液，防止其污染步進機之 零組件，尤其是基座的部份。但是在晶邊液滴淸洗之步驟 中，約離晶片邊緣3mm範圍內之光阻液將會被一倂去除， 導致晶片邊緣在後續的蝕刻製程中，並未受到光阻之保 護，而使半導體元件在製作過程中產生缺陷。 第1A圖至第1D圖爲多重金屬內連線之介層窗之製 程剖面略圖。請參照第1A圖，在基材1〇〇之表面沈積一 層介電層102 然後在介電層102之表面上塗覆一層光阻 液1〇4，以進行下一個圖案轉移之製程。 請參照第1B圖，在進行曝光前，晶片必須經過一道 3 本紙張又度逋用中國國家榡準（CNS > A4规格（210X297公兼1 ^ ---------------1T------ο (請先閲讀背面之注意事項再填寫本頁) 經濟部智慧財產局員工消脅合作社印製 43481 8 A7 5541 twf.doc/008 B7 五、發明説明（v) (請先閲讀背面之注意事項再填寫本頁) 晶邊液滴淸洗步驟，以避免晶片邊緣滴下的光阻液污染步 進機之零組件。但是，晶邊液滴淸洗步驟也會同時將部份 在晶片邊緣105上之部份光阻液106 —倂去除，而使晶片 邊緣105之部份介電層102裸露出來，如第1B圖所示虛 線部份。 請參照第1C圖，接著進行曝光及顯影製程，將光罩 上的圖案轉移至光阻上，使光阻104具有一開口區 109 〇 請參照第1D圖所示，對開口區109所裸之介電層102 進行蝕刻製程，以在介電層1〇2中形成一介層窗開口 112。 當進行蝕刻製程時，由於上一製程中晶片邊緣1〇5未受光 阻104保護的部份i〇8(如第1C圖所示），將形成殘留的氧 化矽片如標記11〇所示，而在後續的薄膜沈積製程中，此 殘留的氧化矽片110將形成氧化物顆粒，此氧化物顆粒會 滯留於多重金屬內連線之金屬層及介層窗中纟造成積體電 路元件之缺陷。 經濟部智慧財產局8工消費合作社印製 上述習知之製程中，爲避免步進機遭受光阻液之污染 而必須進行晶邊液滴淸洗製程，但是此淸洗製程又會導致 半導體元件之電路電性上的缺陷’故此一製程上之問題有 待撤底之解決。 本發明之目的在於提烘一種多重金屬內連線之製造方 法，可避免晶片邊緣因爲晶邊淸洗製程而連帶地去除晶片 邊緣之光阻，導致晶片邊緣在後續的製程中成爲氧化物顆 粒的來源，而影響積體電路元件之品質。 4 i紙張尺度適用中國國家揉^ ( CNS > A4洗格（210><297公#1 A7 B7 434818 5541twf.doc/008 五、發明説明（> ) 本發明提供一種多重金屬內連線之製造方法，本發明 方法包括下列步驟，在一基材之表面上形成一層介電層， 然後在介電層之表面上塗覆一層光阻液，接著進行晶邊液 滴淸洗步驟，以避免晶片邊緣滴下的光阻液污染步進機之 零組件，但在此步驟中也會連帶的將晶片邊緣上之部份光 阻液一倂去除，導致晶片邊緣上之介電層裸露出來，而在 進行蝕刻製程時形成殘留的氧化物片，並在後續的薄膜沈 積製程中彤成氧化物顆粒，此氧化物顆粒會滯留於多重金 屬內連線之金屬層及介層窗中，造成積體電路元件之缺 陷。 接著進行曝光及顯影製程，在光阻上形成一開口區， 而在對此開口區進行蝕刻使形成一介層窗於介電層中之製 程前，爲改善因晶邊液滴淸洗步驟所造成之上述缺陷，按 本發明方法係利用一塗佈刷頭，在晶片邊緣以吸附的方式 均勻地塗佈一層光阻，此塗佈刷頭與一管線相連接，管線 內則裝塡光阻液，塗佈之範圍控制在3mm。當晶邊形成光 阻層之後，進行預烤步驟以驅除溶解於光阻內之溶劑’避 免影響製程之週期時間。 本發明係利用吸的方式擠光阻液塗佈於晶片邊緣’ 可有效地保護晶片^邊，避免因晶邊光阻液滴淸洗製程及 介電層蝕刻製程，而在晶片邊緣形成殘留的氧化物片’ S 此可避免氧化物顆粒在多重金屬內連線之介層窗之製造◎ 程中產生重大缺陷。 爲讓本發明之上述和其他目的、特徵、和優點，能更：明 5 _ __ _ I -.…' 本紙張尺度逍用中固困家標準（CNS ) A4規格（210X297公釐） ---------Λ装------1T------0 (請先閲讀背面之注意事項再填寫本頁) 經濟部智慧財產局負工消費合作社印製A7 B7 43481 8 5541twf.doc / 008 V. Description of the invention (丨) The present invention relates to a method for manufacturing a semiconductor element, and more particularly to a method for manufacturing a multi-metal interconnect. 0 Manufacturing process for a multi-metal interconnect In the process, lithography, etching and film deposition are involved. A typical lithography process involves coating a layer of photoresist on the surface of a semiconductor wafer, and then performing an exposure process to cause a photochemical reaction between the light source passing through the photomask and the photoresist, and then copying the pattern on the photomask through a development step. Onto the photoresist. Generally, the photoresist is performed by spin coating, that is, the photoresist liquid is sprinkled on the wafer and rotated, and the photoresist liquid is moved to the periphery of the wafer by centrifugal force, and finally a layer of extremely uniform light is formed. Barrier layer. For exposure, a stepper is used to expose the photoresist on the wafer. Generally, semiconductor wafers after photoresist coating are completed must undergo an edge bead rinse (EBR) step. The purpose is to wash away photoresist liquid that may drip from the edges of semiconductor wafers to prevent contamination. Machine parts, especially the base part. However, in the step of cleaning the crystal edge droplets, the photoresist liquid within a range of about 3 mm from the wafer edge will be removed at a time, resulting in the wafer edge not being protected by photoresist in the subsequent etching process, so that Defects occur in the manufacturing process of semiconductor devices. Figures 1A to 1D are schematic process cross-sectional views of a multi-metal interconnected via window. Referring to FIG. 1A, a dielectric layer 102 is deposited on the surface of the substrate 100, and then a photoresist 104 is coated on the surface of the dielectric layer 102 to perform the next pattern transfer process. Please refer to Figure 1B. Before exposure, the wafer must pass through a 3 papers again using the Chinese National Standard (CNS > A4 size (210X297) and 1 ^ ------------ --- 1T ------ ο (Please read the notes on the back before filling out this page) Printed by the Employees' Co-op of the Intellectual Property Bureau of the Ministry of Economic Affairs 43481 8 A7 5541 twf.doc / 008 B7 V. Description of the invention ( v) (Please read the precautions on the back before filling this page) Crystal edge droplet cleaning step to avoid photoresist dripping from the edge of the wafer to contaminate the components of the stepper. However, the crystal edge droplet cleaning step also At the same time, a part of the photoresist liquid 106- 倂 on the wafer edge 105 will be removed at the same time, and a part of the dielectric layer 102 of the wafer edge 105 will be exposed, as shown by the dotted line in Fig. 1B. Please refer to 1C Figure, followed by exposure and development processes, the pattern on the photomask is transferred to the photoresist, so that the photoresist 104 has an opening area 109 〇 Please refer to Figure 1D, the dielectric layer 102 bare in the opening area 109 An etching process is performed to form a dielectric window opening 112 in the dielectric layer 102. When the etching process is performed, due to the previous In the manufacturing process, the portion 105 of the wafer edge 105 that is not protected by the photoresist 104 (as shown in FIG. 1C) will form a residual silicon oxide wafer as shown by the mark 11, and in the subsequent thin film deposition process, The residual silicon oxide wafer 110 will form oxide particles, and the oxide particles will remain in the metal layers and interlayer windows of the multiple metal interconnects and cause defects in the integrated circuit components. Consumption by the Intellectual Property Bureau of the Ministry of Economic Affairs In the cooperative process for printing the above-mentioned conventional process, in order to prevent the stepper from being contaminated by the photoresist liquid, a crystal edge liquid droplet washing process must be performed, but this washing process will cause a defect in the electrical properties of the circuit of the semiconductor element. A problem in a process needs to be solved. The purpose of the present invention is to improve a method for manufacturing a multi-metal interconnect, which can avoid the photoresist at the edge of the wafer and remove the photoresist at the edge of the wafer due to the crystal edge washing process. The edge becomes the source of oxide particles in subsequent processes, which affects the quality of integrated circuit components. 4 i paper size is suitable for Chinese countries ^ (CNS > A4 wash grid (210 > < 297 # 1 A7 B7 434818 5541twf.doc / 008 5. Description of the invention (>) The present invention provides a method for manufacturing multiple metal interconnects. The method of the present invention includes the following steps to form a dielectric layer on the surface of a substrate Then, a layer of photoresist is coated on the surface of the dielectric layer, and then a crystal edge liquid droplet cleaning step is performed to prevent the photoresist dripping from the edge of the wafer from contaminating the components of the stepper, but it will also be accompanied in this step. A part of the photoresist liquid on the edge of the wafer was removed at a time, which caused the dielectric layer on the edge of the wafer to be exposed, and a residual oxide sheet was formed during the etching process, and was oxidized in the subsequent thin film deposition process. Particles, the oxide particles will remain in the metal layers and interlayer windows of the multiple metal interconnects, causing defects in integrated circuit components. Next, an exposure and development process is performed to form an opening area on the photoresist, and before the process of etching this opening area to form a dielectric window in the dielectric layer, in order to improve the process caused by the crystal edge liquid droplet cleaning step, For the above defects, according to the method of the present invention, a coating brush head is used to uniformly coat a layer of photoresist on the edge of the wafer in an adsorption manner. The coating brush head is connected to a pipeline, and a photoresist is installed in the pipeline. The coating range is controlled at 3mm. After the photoresist layer is formed on the crystal edge, a pre-baking step is performed to drive off the solvent 'dissolved in the photoresist to avoid affecting the cycle time of the process. The present invention uses a suction method to squeeze a photoresist coating on the edge of the wafer, which can effectively protect the edge of the wafer, and avoid the formation of residues on the edge of the wafer due to the crystal edge photoresist droplet washing process and the dielectric layer etching process. Oxide sheet's This can avoid major defects in the manufacture of interstitial windows with multi-metal interconnects. In order to make the above and other objects, features, and advantages of the present invention more clear: 5 _ __ _ I -.... 'This paper size is free to use the China Solid Standard (CNS) A4 specification (210X297 mm)- ------- Λ installed ------ 1T ------ 0 (Please read the notes on the back before filling this page) Printed by the Consumers ’Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs
細說明如下 圖式之‘ 第1A \ / ； 造剖面流程略^ \ 第2A圖Μ第’ 434818 Α7 554 ltwf.doc/008 B7 五、發明説明（（|) 顯易懂，下文特舉一較佳實施例，並配合所附圖式，作詳 明 1D圖繪示習知之多重金屬內連線之製 2F圖爲按本發明之較佳實施例繪示多 重金屬內連線之製造剖面流程略圖。 圖式之標記說明： 100, 200矽基材 102, 202介電層 104, 204光阻層 105, 205晶片邊緣 106晶片邊緣因晶邊淸洗製程而被去除之部分光阻 108未受光阻保護而裸露之部分介電層 109光阻層104上之開口區 Π0殘留之氧化物片 112, 210介層窗開口 206晶片邊緣因晶邊淸洗製程而被去除之光阻 208未受光阻保護而裸露之部分介電層 212由塗佈刷頭所塗佈之光阻 209光阻層204上之開口區 214金屬插塞 實施例 第2A圖至第2F圖爲按本發明之較佳實施例艚示多 本紙張尺度適用中國困家標準（CNS ) Α4規格（210X297公釐） --------Λ衮------訂--------^ (請先閱讀背面之注$項再填寫本頁) 經濟部智慧財產局貝工消#合作社印製 經濟部智葸財產局SK工消費合作社印製 43481 8 A7 554 ltwf.doc/〇〇8 , B7 五、發明説明（么’） 重金屬內連線之製造剖面流程略圖。 請參照第2A圖所示，在基材（晶片）200之表面形成 —層介電層202,此介電層之材質可爲二氧化矽或摻雜其 他少量元素之氧化矽混合物，如磷、硼或氮等元素。之後 在介電層202之表面塗覆一層光阻液204，光阻液204的 形成方法包括旋轉塗佈法。 請參照第2B圖，完成光阻液204之塗覆後，晶片200 必須經過一道晶邊液滴淸洗步驟，以免步進機之零組件被 晶片邊緣205滴下的光阻液所污染。但在此步驟中也會連 帶的將晶片邊緣205上之部份光阻液2〇4 —倂去除，而使 晶片邊緣205上之部份介電層202裸露出來，其去除光阻 液204的部份約爲光阻液204與介電層2〇2之接觸面距離 晶邊3mm的範圍，如第2B圖中虛線部份206所示，爲進 行晶邊液滴淸洗步驟所去除之光阻液204的區域。 請參照第2C圖，接著進行曝光及顯影製程’將光罩 上的圖案轉移至光阻204上，使光阻204具有一開口區 209 〇 請參照第2D圖所示，爲改善晶片邊緣205上裸露出 來之部分介電層208未受到光阻204的保護，本發明係在 晶片200邊緣205所裸露之介電層202上形成一層光阻層 212。形成光的較佳方法係利用一|^^ ’以 吸附的方式，將光阻液212均勻地塗佈於晶片邊緣205， 其塗佈的範圍約爲距離晶片邊緣3mm，相當於在晶邊液滴 淸洗步驟中去除的光阻部份206 (如第2B圖所示.）。而 —,.·Λ裝 訂 n (請先閱讀背面之注意事項再填寫本頁) 434618 A7 5 541 twf.doc/008 B7 五、發明説明（&) (請先閱讀背面之注意事項再填寫本頁) 塗佈刷頭之材質係化學聚合物所製成，具吸附能力，因此 能吸附管線內之光阻液。當塗佈刷頭與晶片200邊緣205 相接觸時，因爲物理吸附之作用，塗佈刷頭上之光阻液會 被晶片所吸附，使塗佈之範圍控制在3mm。藉由連續不斷 地供應容器內之光阻液並適當地控制塗佈刷頭與晶片邊緣 之接觸，可均勻地彌補晶片200邊緣205因爲晶邊液滴淸 洗製程而去除之光阻204。由於塗佈過程因採用吸附的方 式，故不會有光阻液回濺造成額外之影響。 在塗佈光阻之後進行預烤步驟，以驅除溶解於光阻 212內之溶劑，避免影響製程之週期時間，而預烤之溫度 約爲110°C^ 請參照第2E圖，完成晶片邊緣之光阻塗佈步驟後， 對光阻204之開口 209所裸露之介電層202進行蝕刻製 程，以形成一介層窗開口 210於介電層202之中。在此過 程中，光阻層204與光阻層212可以作爲蝕刻之罩幕，因 此，位於晶片200邊緣205之介電層202則可以藉由本發 明所形成之光阻層212的保護，而不會在蝕刻的過程中遭 受蝕刻製程的破壞。 經濟部智慈財產局員工消費合作社印製 請參照第2F圖，去除光阻層204與光阻層212，並 在介層窗開口 210之中塡入金屬層’以在其中形成金屬插 塞。金屬層之材質例如爲鎢，其形成的方法例如是以化學 氣相沉積法將鎢金屬層覆蓋於介電層202之表面上，並且 塡滿介層窗開口 210之後，利用化學機械硏磨法或回蝕刻 製程，去除介電層202表面上所覆蓋之鎢金屬層，、以使留The detailed description is as follows in the following diagram: '# 1A \ /; The sectioning process is slightly ^ \ # 2A 图 Μ 第' 434434 Α7 554 ltwf.doc / 008 B7 5. The description of the invention ((|) is easy to understand, the following is a comparison The preferred embodiment, in conjunction with the accompanying drawings, makes a detailed 1D drawing showing the conventional multiple metal interconnects made in 2F. It is a schematic diagram of the manufacturing cross-section process of the multiple metal interconnects according to the preferred embodiment of the present invention. Explanation of the marks on the drawings: 100, 200 silicon substrates 102, 202 dielectric layers 104, 204 photoresist layers 105, 205 wafer edges 106 part of the photoresist 108 which was removed by the crystal edge washing process is not protected by photoresist And the exposed part of the dielectric layer 109 on the photoresist layer 104 in the open area Π0 residual oxide film 112, 210 the interlayer window opening 206. The photoresist 208 on the edge of the wafer that was removed due to the crystal edge washing process was not protected by photoresist. The exposed part of the dielectric layer 212 is the photoresist 209 coated by the coating brush head, and the opening area 214 on the photoresist layer 204 is a metal plug. Embodiments 2A to 2F are the preferred embodiments according to the present invention. Shows that many paper sizes are in compliance with China Standards (CNS) Α4 (210X297 mm)- ------ Λ 衮 ------ Order -------- ^ (Please read the note $ on the back before filling out this page) Printed by Shellfish Consumer Cooperative, Bureau of Intellectual Property, Ministry of Economic Affairs Printed by the SK Industrial Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs 43481 8 A7 554 ltwf.doc / 〇〇8, B7 V. Description of the Invention (Mo ') Outline drawing of the manufacturing cross-section process of heavy metal interconnects. Please refer to Figure 2A A dielectric layer 202 is formed on the surface of the substrate (wafer) 200. The material of this dielectric layer may be silicon dioxide or a silicon oxide mixture doped with other small elements, such as phosphorus, boron, or nitrogen. After that, A layer of photoresist liquid 204 is coated on the surface of the dielectric layer 202, and the formation method of the photoresist liquid 204 includes a spin coating method. Please refer to FIG. 2B. After the photoresist liquid 204 is coated, the wafer 200 must pass through a crystal. Edge droplet cleaning step, so as not to contaminate the components of the stepper with the photoresist dripping from the edge 205 of the wafer. However, in this step, a part of the photoresist on the edge 205 of the wafer will also be associatively. The photoresist is removed, and a part of the dielectric layer 202 on the wafer edge 205 is exposed. The portion of the photoresist solution 204 removed is about the photoresist solution 204. The range of the contact surface of the dielectric layer 200 from the crystal edge is 3 mm, as shown by the dashed line portion 206 in FIG. 2B, which is the area of the photoresist liquid 204 removed by the crystal edge droplet washing step. Figure 2C, followed by the exposure and development process. 'Transfer the pattern on the photomask to the photoresist 204, so that the photoresist 204 has an opening area 209. Please refer to Figure 2D to improve the exposure of the wafer edge 205. Part of the dielectric layer 208 is not protected by the photoresist 204. The present invention forms a photoresist layer 212 on the dielectric layer 202 exposed on the edge 205 of the wafer 200. The best way to form light is to apply the photoresist liquid 212 uniformly to the edge 205 of the wafer in an adsorption manner. The coating range is about 3 mm from the edge of the wafer, which is equivalent to the edge liquid. The photoresist part 206 (shown in Fig. 2B) removed in the drip-washing step. And — ,. ΛBinding n (Please read the precautions on the back before filling this page) 434618 A7 5 541 twf.doc / 008 B7 5. & Description of the Invention (Please read the precautions on the back before completing this Page) The material of the coating brush head is made of chemical polymer, which has the ability of adsorption, so it can adsorb the photoresist liquid in the pipeline. When the coating brush head is in contact with the edge 205 of the wafer 200, the photoresist on the coating brush head will be absorbed by the wafer due to the physical adsorption effect, so that the coating range is controlled to 3 mm. By continuously supplying the photoresist liquid in the container and appropriately controlling the contact between the coating brush head and the edge of the wafer, the photoresist 204 removed by the edge 205 of the wafer 200 due to the crystal edge droplet washing process can be evenly compensated. Because the coating process uses an adsorption method, there will be no additional effects caused by photoresist splashback. After coating the photoresist, a pre-baking step is performed to drive off the solvent dissolved in the photoresist 212 to avoid affecting the cycle time of the process. The pre-baking temperature is about 110 ° C ^ Please refer to Figure 2E to complete the wafer edge. After the photoresist coating step, an etching process is performed on the exposed dielectric layer 202 of the opening 209 of the photoresist 204 to form a dielectric window opening 210 in the dielectric layer 202. In this process, the photoresist layer 204 and the photoresist layer 212 can serve as a mask for etching. Therefore, the dielectric layer 202 located on the edge 205 of the wafer 200 can be protected by the photoresist layer 212 formed by the present invention without Will be damaged by the etching process during the etching process. Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs Please refer to Figure 2F, remove the photoresist layer 204 and photoresist layer 212, and insert a metal layer 'into the interposer window opening 210 to form a metal plug therein. The material of the metal layer is, for example, tungsten. The method for forming the metal layer is, for example, covering the surface of the dielectric layer 202 by a chemical vapor deposition method, and after filling the opening 210 of the dielectric layer, using a chemical mechanical honing method. Or an etch-back process to remove the tungsten metal layer covered on the surface of the dielectric layer 202 so that
S 本紙張尺度適用中國國家標準（CNS } A4規格（210X297公釐） .·.·，…“一>八〜··*·*·-乂—. · ......... . . -.·，..〆、 43481 8 A7 5541twf,doc/008 B7 五、發明説明α ) 在介層窗開口 210之中的鎢金屬層形成金屬插塞214 ° 本發明在晶邊光阻液滴淸洗製程後，利用一塗佈刷頭 將光阻液塗佈於晶片邊緣，以保護晶片邊緣’避免其在後 續的製程中，形成殘留的氧化物顆粒散佈於多重金屬內連 線之金屬層及介層窗中，造成積體電路元件產生嚴重之缺 陷。另本發明採用吸附方式塗佈光阻液，故不會有光阻液 回濺造成額外之影響，並結合預烤製程，所以亦不會影響 製程之週期時間(cycle time)。 雖然本發明已以一較佳實施例揭露如上，然其並非 用以限定本發明，任何熟習此技藝者，在不脫離本發明之 精神和範圍內，當可作些許之更動與潤飾，因此本發明之 保護範圍當視後附之申請專利範圍所界定者爲準。 ---------— (請先閲讀背面之注意事項再填寫本頁) 訂 經濟部智慧財產局8工消費合作社印製 9 本紙張尺度遑用中國國家標隼（CNS ) M規格（2Κ)Χ297公嫠）S This paper size applies the Chinese national standard (CNS) A4 specification (210X297 mm) ....., ... "一 > 八 ~ ·· * · * ·-乂 —.......... ..-.., 〆, 43481 8 A7 5541twf, doc / 008 B7 V. Description of the invention α) The tungsten metal layer in the via 210 of the interlayer window forms a metal plug 214 ° The photoresist at the crystal edge of the present invention After the droplet cleaning process, a coating brush head is used to apply a photoresist liquid to the edge of the wafer to protect the edge of the wafer 'to prevent it from forming residual oxide particles dispersed in the multiple metal interconnects in subsequent processes The metal layer and the interlayer window cause serious defects in the integrated circuit components. In addition, the invention adopts the adsorption method to apply the photoresist liquid, so there is no additional impact caused by the photoresist liquid splashing back, and combined with the pre-baking process, Therefore, it will not affect the cycle time of the process. Although the present invention has been disclosed above with a preferred embodiment, it is not intended to limit the present invention. Any person skilled in the art will not depart from the spirit and scope of the present invention. Within the scope, some changes and retouching can be made, so the protection scope of the present invention should be Subject to the definition of the scope of patent application attached. ---------— (Please read the notes on the back before filling out this page) Order 9 copies printed by the Intellectual Property Bureau of the Ministry of Economic Affairs and 8 Industrial Cooperatives Paper size: China National Standard (CNS) M size (2K) × 297 mm