TW432649B - A heat sink - Google Patents

A heat sink Download PDF

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Publication number
TW432649B
TW432649B TW088116505A TW88116505A TW432649B TW 432649 B TW432649 B TW 432649B TW 088116505 A TW088116505 A TW 088116505A TW 88116505 A TW88116505 A TW 88116505A TW 432649 B TW432649 B TW 432649B
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TW
Taiwan
Prior art keywords
metal strip
substrate
fixed
component
heat sink
Prior art date
Application number
TW088116505A
Other languages
Chinese (zh)
Inventor
Are Bjorneklett
Original Assignee
Ericsson Telefon Ab L M
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Application granted granted Critical
Publication of TW432649B publication Critical patent/TW432649B/en

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/552—Protection against radiation, e.g. light or electromagnetic waves
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73253—Bump and layer connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/161—Cap
    • H01L2924/1615—Shape
    • H01L2924/16152—Cap comprising a cavity for hosting the device, e.g. U-shaped cap
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/191—Disposition
    • H01L2924/19101—Disposition of discrete passive components
    • H01L2924/19105—Disposition of discrete passive components in a side-by-side arrangement on a common die mounting substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/301—Electrical effects
    • H01L2924/3025—Electromagnetic shielding

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  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Materials Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Health & Medical Sciences (AREA)
  • Electromagnetism (AREA)
  • Toxicology (AREA)
  • Shielding Devices Or Components To Electric Or Magnetic Fields (AREA)
  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)

Abstract

To conduct heat from a flip chip semiconductor component (2) mounted on a substrate (4), a metal strip (1) is fixed to the backside of the flip chip component (2) and to the substrate (4).

Description

靥4 3 2 6 4 9 -------—— " ~ ……—------------—_____ 五、發明說明（0 技術領域 本發明一般係關於倒裴晶片半導體元件且更特定地係關 於此種元件之散熱器。 發明背景 現今微電子之主要趨勢是半導體元件之縮減容量與此種 元件之組合。藉用有關半導體元件之製造與其組合^為電 子系統之科技即能夠促成此項發展。 能縮減谷量及成本兩者之一項此種組合科技係倒裝晶片 科技。依該科技’倒置安裝半導體元件或晶片，用^ ^倒 裝晶片焊接泵可固定元件之電氣連接。元件之倒轉裝置 增加/有關兀件散熱及冷却之問題。冷却元件之正常 統方法是將其安裝在有高熱傳導性之材料上，此可有效 散元件上之熱量。按倒裝晶片科技，焊接隆塊有—極 能力以傳散晶片上之熱量由於相對總元件面積其可構 面積有限。 現今微電子系統另一重要問題是元件在高頻操作時之 磁隔離。此種元件目前是通用因其在行動電話及無線電通 信裝備内是不可避免的。對電子裝備之電磁相容性特別由 歐聯己發佈強硬規定且此等規定可產生高頻元件有效電隔 離之需要。 發明概要 本雖明之目的是在改進由倒裝晶片科技所組合半導體元 件之冷却以及隔離。 依本發明即可達成此目的，主要藉一金屬條帶係固定至靥 4 3 2 6 4 9 -------—— " ~ …… ——------------_______ V. Description of the invention (0 TECHNICAL FIELD The present invention generally relates to Pei wafer semiconductor elements and more specifically, heat sinks for such elements. BACKGROUND OF THE INVENTION The main trend in microelectronics today is the reduction in capacity of semiconductor elements and the combination of such elements. Borrowing about the fabrication of semiconductor elements and their combinations ^ electronic System technology can facilitate this development. One such combination technology that can reduce both valley and cost is flip chip technology. According to this technology, semiconductor components or wafers are mounted upside down, and a flip chip soldering pump is used. The electrical connection of components can be fixed. The inversion of the component is increased / related to the heat dissipation and cooling of the component. The normal method of cooling the component is to install it on a material with high thermal conductivity, which can effectively dissipate the heat on the component. According to flip chip technology, solder bumps have the ability to dissipate the heat on the wafer due to its limited configurable area relative to the total component area. Another important issue with today's microelectronic systems is that components operate at high frequencies Magnetic isolation. Such components are currently universal because they are unavoidable in mobile phones and radio communication equipment. The electromagnetic compatibility of electronic equipment has been specifically issued by the European Union and these regulations can produce high-frequency components effectively The need for electrical isolation. SUMMARY OF THE INVENTION The purpose of the present invention is to improve the cooling and isolation of semiconductor components assembled by flip-chip technology. This can be achieved according to the present invention, which is mainly fixed to a metal strip

$ 4頁 r Ρ4326 4 9 五、發明說明（2) 倒裝晶片元件背部至少一部份與固定至安裝此元件之基材 上以傳導元件之熱至基材。 當金屬條涵蓋整個元件之背部且係固定至基材以封密元 件時即可獲得倒裝晶片元件之電隔離。 因此，藉以金屬條形式之單一結構另件，即可完成一基 材上倒裝晶片元件之冷却與電隔離兩者。 附圖簡述 參閱附圖以下更詳細說明本香明，其中圖1顯示按本發 明之散熱器實例，及圖2顯示按本發明聯合散熱器/電隔離 之一實例。 發明之詳細說明 圖1顯示有關藉電路板或基材4上之焊接隆塊倒置安裝之 倒裝晶片半導體元件2之散熱器1實例。 如引介部份所述，焊塊3有一極有限能力以傳散元件2上 之熱量由於事實：谭塊之接觸面積甚小於元件2之面積之 故。 按本發明，為了傳導元件2之熱，致提供散熱器1。 按圖1實例，散熱器1包括一金屬條帶，較佳為Cu(銅）， 具有高度熱及電傳導性。 金屬條1之厚度係約0. 2 mm，其寬度不應超過其厚度1〇〇 倍。 依本發明，此金屬條係固定至元件2之背部與至基材4兩 者。 金屬條1係藉焊料或可導電黏膠或其聯合可固定至元件2$ 4 pages r Ρ4326 4 9 V. Description of the invention (2) At least a part of the back of the flip chip component and fixed to the substrate on which the component is mounted to conduct the heat of the component to the substrate. Electrical isolation of flip chip components can be obtained when the metal strip covers the entire back of the component and is secured to the substrate to seal the component. Therefore, by using a single structural component in the form of a metal strip, both cooling and electrical isolation of a flip chip component on a substrate can be completed. Brief description of the drawings The present invention will be described in more detail with reference to the accompanying drawings, wherein Fig. 1 shows an example of a heat sink according to the present invention, and Fig. 2 shows an example of a combined heat sink / electrical isolation according to the present invention. Detailed Description of the Invention Fig. 1 shows an example of a heat sink 1 for a flip-chip semiconductor component 2 mounted upside down by solder bumps on a circuit board or substrate 4. As mentioned in the introduction section, the solder bump 3 has a very limited ability to dissipate the heat on the component 2 due to the fact that the contact area of the Tan block is much smaller than the area of the component 2. According to the invention, a heat sink 1 is provided in order to conduct the heat of the element 2. According to the example of FIG. 1, the heat sink 1 includes a metal strip, preferably Cu (copper), which has high thermal and electrical conductivity. The thickness of the metal strip 1 is about 0.2 mm, and its width should not exceed 100 times its thickness. According to the present invention, the metal strip is fixed to both the back of the element 2 and the substrate 4. The metal strip 1 can be fixed to the component 2 by solder or conductive adhesive or a combination thereof

1 *4 32^6 4 9______ 五、發明說明（3) - 與基材4。旅贺上，此金屬條1藉可導雷跟&加e 押 电勝黏劑5係固定至 元件2之背部與藉焊料6固定至基材4。 以與其他元件被安裝在基材4上之相同作業施加焊料6， 同時在金屬條1組合在元件上之前典型上可導電膠黏劑5係 貼印在金屬條1上。典型上，將膠黏劑5打印在金屬條1上 為金屬條製造之一部份。 因此，按圖1所述實例，金屬條1可自元件2傳導熱至基 材4。 按圖2所述實例，已提供與圖1所示元件相似之元件有相 同參考號碼。 按圖2内之實例，具有高熱及電傳導性之一金屬條Γ涵 蓋所有係藉焊接塊3安裝在基材4上之元件2 ’以及另一元 件7。1 * 4 32 ^ 6 4 9______ 5. Description of the invention (3)-and substrate 4. On the tour, the metal strip 1 is fixed to the back of the component 2 by a lightning guide & plus e betting adhesive 5 and fixed to the substrate 4 by solder 6. The solder 6 is applied in the same operation as the other components are mounted on the base material 4, and the conductive adhesive 5 is typically applied to the metal strip 1 before the metal strip 1 is assembled on the component. Typically, printing the adhesive 5 on the metal strip 1 is part of the manufacture of the metal strip. Therefore, according to the example shown in FIG. 1, the metal strip 1 can conduct heat from the element 2 to the substrate 4. According to the example shown in Fig. 2, elements similar to those shown in Fig. 1 have been provided with the same reference numbers. According to the example in Fig. 2, a metal strip Γ having high thermal and electrical conductivity covers all the components 2 'and 7 which are mounted on the substrate 4 by the soldering block 3.

金屬條Γ係藉可傳導電膠黏劑5固定至元件2整個背部且 藉焊料6固定至基材4 ^因此，在圖2實例内’焊料6繞元件 2全部伸出D 此表示圖2金屬條1’作用不只是為一散熱器而且亦為一 電磁隔離以有效隔離裝在倒裝晶片半導體元件2上或在基 材4上之高頻元件，諸如在金屬條丨’下面之元件7。 因此’圖2金屬條1，之實體作用為一散熱器與一電磁隔 離兩者。The metal strip Γ is fixed to the entire back of the component 2 by the conductive electrical adhesive 5 and fixed to the substrate 4 by the solder 6 ^ Therefore, in the example of FIG. 2 'the solder 6 extends all around the component 2 D This represents the metal of FIG. 2 The strip 1 'serves not only as a heat sink but also as an electromagnetic isolation to effectively isolate high-frequency components mounted on the flip-chip semiconductor component 2 or on the substrate 4, such as the component 7 under the metal strip. Therefore, the physical function of the metal strip 1 of FIG. 2 is both a heat sink and an electromagnetic isolation.

Claims (1)

Γ'§4 326 4 9 六、申請專利範圍 1. 一種安裝在基材4上倒裝晶片半導體元件（2 )之散熱 器，其特徵在於它包括一具有高熱及電傳導性之金屬條 (1，Γ )，金屬條是固定至倒裝晶片半導體元件之至少部 份背部且固定至基材（4)，以傳導元件（2)之熱量至基材 (4) 。 2. 如申請專利範圍第1項之散熱器，其特徵在於金屬條 (1，1 ’）係藉可導電膠黏劑（5 )固定至元件（2 )及/或基材 (5) 。 3. 如申請專利範圍第1項之散熱器，其特徵在於金屬條 (1，Γ)係藉焊料（6)固定至元件（2)及/或基材（4)。 4. 如申請專利範圍第卜3項之任^項之散熱器，其特徵 在於金屬條（1)之寬度係少於其厚爲。 5. 如申請專利範圍第1-3項之任一，其特徵在 於金屬條（1 ’）係固定至元件（2 )之整個背部/，延伸在元件 (2 )外面，且係固定至元件（2 )四週之基材（4 )，以包封至 少該元件（2)而電氣隔離元件（2)及安裝在其下面之任何其 他元件（7 )。Γ'§4 326 4 9 VI. Patent application scope 1. A heat sink for flip-chip semiconductor components (2) mounted on a substrate 4, characterized in that it includes a metal strip (1 , Γ), the metal strip is fixed to at least part of the back of the flip chip semiconductor element and fixed to the substrate (4), and conducts the heat of the element (2) to the substrate (4). 2. For example, the heat sink of the first patent application scope is characterized in that the metal strip (1,1 ′) is fixed to the element (2) and / or the substrate (5) by a conductive adhesive (5). 3. The heat sink as described in the first item of the patent application, characterized in that the metal strip (1, Γ) is fixed to the component (2) and / or the substrate (4) by solder (6). 4. The heat sink of any one of item 3 of the scope of application for patent, characterized in that the width of the metal strip (1) is less than its thickness. 5. As claimed in any one of items 1-3 of the patent application scope, characterized in that the metal strip (1 ') is fixed to the entire back of the element (2) /, extends outside the element (2), and is fixed to the element ( 2) the surrounding substrate (4) to enclose at least the element (2) and electrically isolate the element (2) and any other elements (7) installed below it.
TW088116505A 1999-08-25 1999-09-27 A heat sink TW432649B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
SE9902998A SE9902998L (en) 1999-08-25 1999-08-25 Cooler

Publications (1)

Publication Number Publication Date
TW432649B true TW432649B (en) 2001-05-01

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SE (1) SE9902998L (en)
TW (1) TW432649B (en)
WO (1) WO2001015225A1 (en)

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1263043A1 (en) * 2001-05-30 2002-12-04 Alcatel Electronic element with a shielding
DE10129388B4 (en) * 2001-06-20 2008-01-10 Infineon Technologies Ag Method for producing an electronic component
US6836022B2 (en) 2003-02-13 2004-12-28 Medtronic, Inc. High voltage flip-chip component package and method for forming the same
US8664756B2 (en) 2012-07-24 2014-03-04 Medtronic, Inc. Reconstituted wafer package with high voltage discrete active dice and integrated field plate for high temperature leakage current stability

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JPH02288255A (en) * 1989-04-28 1990-11-28 Hitachi Ltd Semiconductor device
US5175613A (en) * 1991-01-18 1992-12-29 Digital Equipment Corporation Package for EMI, ESD, thermal, and mechanical shock protection of circuit chips
US5371404A (en) * 1993-02-04 1994-12-06 Motorola, Inc. Thermally conductive integrated circuit package with radio frequency shielding
IT1285396B1 (en) * 1996-06-04 1998-06-03 Magneti Marelli Spa DISSIPATOR DEVICE FOR INTEGRATED CIRCUITS.

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SE9902998D0 (en) 1999-08-25
SE9902998L (en) 2001-02-26
WO2001015225A1 (en) 2001-03-01
AU6486600A (en) 2001-03-19

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