厂膠4 325 8 Ο 經-部智慧財產局員工消費合作社印製 Β7 五、發明說明（） 發明頜域： 本發明大致關係於半導體晶圓處理，更明確地說，係 關於利用一或多數壓電感應器，以檢測是否一半導體晶圓 出現於半導體晶圓夾頭之方法與設備，用以檢測是否半導 體晶圓係對中於該夾頭，及用以檢測半導體晶圓之夾持至 夾頭之力量。 發明背景： 於半導體晶圓處理1以生產積體電路中，典型地，半 導體晶圓係被定位並支撐於例如一靜電夾頭之一丰導體 晶圓夾頭支撐面上。一傳統靜電夾頭包含一或序數電極， 其被包夾於A層介電材料之間。晶圓停放於一介電層之表 面上，以使得晶圓及電極係分離開介電層之厚度。例如， 一雙極性靜電夾頭包含兩相反偏壓呈背對背相架構之電 極》—施加至電極之電壓係使得一電荷差被產生於晶圓及 電極間之介電層間。結果，晶圓係經由.庫倫力而夫待妗失 頭之表面。 另一類型之靜電夹頭被稱為強森-雷貝（J-R)夾頭，其 係被揭示於公告於i 992年五月26日由Watanabe等人所 領證之名為M施加電壓至靜電夾頭之方法與設備”之美國 專利第5，1 1 7，丨2 1號案之中。該專利係併入作為參考。如 於此專利案中所述，一 J-R·.靜電央頭.包，.含..電極，内.藏於一 半導電之陶瓷材料主體中，典型係為鋁，氧化鈦化合物或 氮化銘，當一電壓施加至電極間時，一半導體晶圓，例如， 第2頁 本紙張尺度適用中國國家標準（CNS)A4規格（210 x 297公釐） (請先閱讀背面之注意事項再填寫本頁)Factory glue 4 325 8 Ο Printed by the Consumers ’Cooperative of the Ministry of Intellectual Property Bureau B7 V. Description of the invention () Inventive jaw area: The present invention is roughly related to the processing of semiconductor wafers. More specifically, it relates to the use of one or a majority of pressure. Method and equipment for detecting whether a semiconductor wafer appears in a semiconductor wafer chuck by using an electric sensor, for detecting whether a semiconductor wafer is centered in the chuck, and for detecting the clamping of the semiconductor wafer to the chuck The power of the head. BACKGROUND OF THE INVENTION In semiconductor wafer processing 1 to produce integrated circuits, typically, a semiconductor wafer is positioned and supported on a support surface of a high-conductor wafer chuck, such as an electrostatic chuck. A conventional electrostatic chuck includes one or ordinal electrode, which is sandwiched between A-layer dielectric materials. The wafer is parked on the surface of a dielectric layer so that the wafer and the electrode system separate the thickness of the dielectric layer. For example, a bipolar electrostatic chuck contains two oppositely biased electrodes in a back-to-back phase structure—the voltage applied to the electrodes is such that a charge difference is generated between the wafer and the dielectric layer between the electrodes. As a result, the wafers are treated by the Coulomb force. Another type of electrostatic chuck is called Johnson-Raybe (JR) chuck. Head Method and Equipment "in U.S. Patent No. 5,117, 丨 21. This patent is incorporated by reference. As described in this patent case, a JR .. electrostatic central head. Bag Contains .. an electrode, hidden inside a semi-conductive ceramic material body, typically aluminum, titanium oxide compounds, or nitrides. When a voltage is applied between the electrodes, a semiconductor wafer, for example, the second The paper size of this page applies to China National Standard (CNS) A4 (210 x 297 mm) (Please read the precautions on the back before filling this page)
-I * - I - I I - - . I - I - ---- I I . ' I I I I I I ί I Α7 F4 325 8 Ο Β7_ 五、發明說明（） 一碎半導體晶圓係依據強森-雷貝效應而被靜電吸引至靜 電夾頭上，即電荷遷入晶圓之背面，及電荷由電極遷移至 夹頭表面，使得很強之靜電力出現於分離晶圓及夾頭表面 之插入空間中。此靜電夾頭係用於半導體晶圓處理系統 中，以支撐一半導體晶圓，於生產積體電路於晶圓之同 時。 為了增加良率及加強半導體晶圓處理系統之可靠 度，烚測半導體晶圓是否出現於夾頭上，I否對中幹來頭 及是否表持力量足以於後續半導體晶圓處理中，維持半導 體晶圓適當定位於夾頭上是重要的。 再者，為本技藝中所知之陶瓷靜電夹頭，其支撐面被 提供有一晶圓間隔罩，以降低由夾頭表面附著於晶圓上之 微粒污染物之數量。該罩是多數向外延伸墊或支撐構件， 用以嚙合及維持半導體晶圓，於夾持及後續半導體晶圓處 理時，與靜電夾頭之頂或支撐面分離3此晶圓間隔罩係共 同受讓於由柏哈等人所領證於1997年八月12日之美國專 利第5,656,093號所揭示並併入作為參考=於利用具有晶 圓間隔罩之靜電夾頭以處理半導體晶圓之處理中，檢測半 導體是否出現於遮罩上，半導體是否對中於遮罩，因此， 對中於夾頭，及是否半導體晶圓夾持住夾頭之力量足夠以 於後續半導體晶圓處理中，维持丰導體晶圓適當定位於夾 頭上係重要的。 為本技藝中，用以決定一半導體晶圓是否出現及對中 於夾頭上，例如一靜電夾頭上之方法與設備係為已知的， 第31· 本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公釐） (請先閱讀背面之注意事項再填寫本頁) I --------訂 —-------I I - 經濟部智慧財產局員工消費合作社印1 '厂麗 i 3 2 5 8 Ο Α7 Β7___ 五、發明說明（） 該靜電夾頭包含一系統，以量測當晶圓定位於夾頭匕時， 發生於感應電極間之電容變化·此系統係共同受讓給申請 於1997年六月11曰之美國申請案號第08/873,268號，名 為M晶圓檢測用方法與設備”中，該案係併入作為參考。雖 然，此電容量測系統可以很正確地量測晶圓之出現及對 中，但量測結果係容易受到電氣雜訊，該雜訊主要係由處 理室中之電漿所產生"另外，此電容量測系統並不.能量測 施加至被夾住晶圓上之夬持力量之大小。 因此，於本技藝中，有需要新的改良方法與設備，用 以檢測是否一半導體晶圓出現於夾頭上，是否晶圓係對中 於夾頭及是否施加至晶圓上之夹持力量作為後續晶圓處 理係大致不受到處理室電氣雜訊源。 發明目的及概述： 相關於先前技藝之缺點係為本發明所克服，本發明為 一種用以檢測半導體晶圓出現於夾頭上之方法與設備，及 用以檢測是否晶圓對中於夾頭上之方法與設備，以及，用 以檢測晶圓夾持至夾頭作為後續晶圓處理之力量之方法 與設備。明確地說，本發明插入一或多數壓電感應器於一 半導體晶圓及一半導體晶圓夾頭間。當半導體晶圓被夾持 至該夾頭上時，壓電感應器係被壓縮及感應器以壓電方式 產生電力。壓電產生電力係被檢測及一信號被產生，以指 示晶圓出現於夾頭上。 於另一實施例中，當半導體以足夠力量夾持，以於後 第4頁 本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公釐） (請先閱讀背面之汰意事項再填寫本頁) 裝*-------訂--------—線I _ 經濟部智慧財產局員工消費合作社印製 r H4325B Ο A7 B7_ 五、發明說明（） 績半導體晶圓處理時，維持晶圓於該夾頭上時，決定將由 於半導體晶圓及夾頭間之壓力感應器所產生之電力數 量，及一臨界位準（例如壓電電流）係被建立。由安置於半 導體晶圓及夾頭間之壓電感應器所產生之電力被檢測，並 決定是否所檢測到之電力量係至少等於該臨界值，若是的 話，則產生一信號，以指示夾持力量係足以於後績半導體 晶圓處理時’適當地爽持該晶圓。 於另一實施例中，等距彼此相隔之多數壓電感應器係 定位於一夹持支撐面之外週邊表面，一半導體晶圓係被夾 持至該夾持支撐面，以壓縮於半導體晶圓及夹頭間之壓電 感應器1以使得此等壓電感應器產生電力。所產生之電力 係被檢測及決定是否該電力是為所有於該多數壓電感應 器所產生，或者1並非於該多數壓電感應器之所有感應器 產生，若決定電力是由所有於該多數壓電感應器中之壓電 感應器產生，則一第一信號被產生指示該半導體晶圓係對 中於該夾頭，若決定所產生之電力並不是由多數壓電感應 器中之所有壓電感應器產生，則產生一信號以指示該半導 體晶圓未對中於該夾頭3 本發明之教導可以藉由以下詳細說明配合上附圖加 以迅速了解，於圖式中： 圖式簡單說明： 第1圖為一例示圖，示出包含一丰導體晶圓及相關壓電及 信號產生電路； 第5頁 本紙張尺度適用中國國家標準（CNS)A4規格（210 x 297公釐） (請先閱讀背面之注意事項再填寫本頁) 經濟部智慧財產局員工消費合作杜印製 I I I I I I I 11111111 - . — — [11 — lll· I IDIIIIIIIIII1 B7 五、發明說明（） 弟2圖為沿弟1圖之線2 - 2以前頭方向所取之部份剖面 圖； 第3圖為本發明之另一實施例沿第1圖之線2 -2以箭頭方 向所取之部份剖面圖， 第4圖為具有一晶圓間隔罩之支撐面之靜電夾頭之平面 圖； 第5圖為沿第4圖之線5 - 5以箭頭方向所取之部份剖面 圖；及 第6圖為本發明之另一實施例沿第4圖之線5 - 5以箭頭方 向所取之部份剖面圖3 為了容易了解，於這些圖式中，相同參考號儘可能表 示相同元件。 圖號對照說明： (請先閲讀背面之注意事項再填寫本頁) --------訂----- 經濟部智慧財產局員工消費合作社印製 10 晶 圓 檢 測 設 備 12 基 材 支 撐 夾 頭 14 支 撐 面 15 導 電 材 料 16 接 地 18 壓 電 感 應 器 19 壓 電 感 應 器 20 壓 電 感 應 器 22 量 測 電 路 24 下 層 25 上 層 26 中 間 層 28 導 線 29 導 線 30 導 線 3 1 锋 檢 測 路 32 尖 峰 檢 測 電 路 3 3 尖 檢 測 路 40 比 較 電 路 42 半 導 體 晶 圓 線！ 本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公釐） Α7 B7 47電極 1 1 2 支撐構件 W43258 Ο 五、發明說明（ 46 電極 48 電極 發明詳細說明： 參考第1圖’實施本發明之半導體晶圓檢測設備係相 示出並大致由參考數1〇所表示。所示設備1〇係用以配名 一包含一支撐面14之基材岁梦+ j. -s 刊文得夹頭I 2 ;靜電夾頭1 2可6 是上述者。可以了解的是雖坎y, _ , . …、本發明係π出配合上靜電$ 頭 12，但本發明可以用於封人 用於包含陶瓷靜電夾頭，非陶瓷式 頭’雙極性靜電夾頭，單極 ^ ,, 1諍電失頭，機械式夾頭，| 空夹頭等之任何形式之夾頭。—般而言，本發明可以用衣 設計以保持一晶圓於托架之表面上之夾持裝置之形式。一 靜電夾頭只是此一夾持裝置之範例而已。 經-部智慧財產局員工消費合作社印製 依據本發明，一層導電材料丨5係提供於支撐面丨4之 外圓周部；導電層1 5可以提供於支撐面上，藉由物理氣 相沉積或化學氣相沉積一例如鈦之導電材枓。材料可以具 有約1 - 9微米之厚度並可以沉積於支撐面14上，如於第 圖所示，以被連接至電路共通點或接地1 6。於較實施你 中’設備1 0包含三個壓電.感應器I 8，ί 9 .及2 0提一供於夹 頭支撐面14上朝上，及大致由參考數22所表示之信號量 測電路。 如於第2圖所示，有關於相關壓電感應器1 8，壓電择 應器可以包含一下層24及一上層25之飲（Ti)及一中間展 26之二氧化鋅（Zn〇2)。構成壓電感應器之鈦及二氧化鋅層 第頁 本纸張尺度適用t國國家標準（CNS)A4規格（210x297公釐） A7 rf4 32 5 B 0 _______B7__________ 五、發明說明（） 、 可以藉由物理氣相沉積法，而沉積於靜電夾頭1 2之支撐 面1 4上’並可以具有約1 3 -70微米之累積厚度。沉積經 由一發生於支撐面上之罩或類似板發生。一例示罩及沉積 技術係被討論於共同受讓之申請於1 9 9 6年十月2 5日之美 國專利申請案號第08/736,887號案中。雖然，該申請案教 導鈦作為罩之較佳材料，但其他材料也被教導出，例如陶 瓷（氮化鋁）。陶瓷係為用於創造本發明之壓電感應器之較 佳材料。例如’下層2 4係首先被沉積至厚度約‘ 1至9微 米。再者’下層2 4上沉積之中間層2 6係厚約1 1至5 〇微— 米。最後’上層係沉積於中間層2 6上，至约1 - 9微米厚。 雖然’鈦係所討論分別為用於上及下層24及2 5之較佳材 料’但其他任何容易沉積及附著至支撐面14上及相容於 超高真空（UHV)環境之常用可得材料也可以適用。此等材 料可以選自但並不限定於包含铜，氮化鈦及鎢之群組。雖 然，二氧化鋅被討論為用於中間層26之較佳材料，但任 何被分類為具有壓電特性及能經由壓電效應或其筈故而 產生電流之常用可得材抖也可以適用。 如於第2圖有關相關壓電感應器丨8所示，下鈥層24 係連接延伸經過靜電夾頭12之合適連接器28。同樣地， 如於第1圖所示’壓電感應器1 9及2 0係連接延伸經靜電 夾頭丨2之相關導線29及30，如同於第2圖所示之導線 28之方式。用以於陶瓷夾頭内製造導電軌跡及饋線連接器 之方法係揭示於所共同受讓於申請於i 997年四月t日之 美國專利申請案第08/834,702號案中，該案係命名為，，用 第8頁 本紙張尺度適用中國國家標準（CNS>A4規格（210x297公爱） (請先閱讀背面之注意事項再填寫本頁) 經濟部智慧財產局員工消費合作社印製 -I '11 — — — — — ---I-----I - /W-------lb —--— — — — — — — ( 經濟部智慧財產局員工消費合作社印製 Γ4 325 8 Ο五、發明說明（ 體之導電饋線及其製造方法”，並且該案係併入作 於:些例子中，感應器之累積厚度必須被小心考量。 备感應器之累積厚度大量降低冷蕾士 I丨幸低碌电夾持力，則基材丨4將 不會適當地被保持於失頭1 2 > μ # , 翊12惑上。若此—狀況存在，則 本發明之另-實施例係提供於第3圖中。明確地說，具有 多數凹槽32於支撑面中之靜電失頭3〇係被提供（注意為 了配合第2及5圖及清楚起見，只有_代表凹槽η係被 描述）。崽電感應器18’ 19及20係被併入於支撐面“中 之凹槽3 2之中，具有其他方面之感應器結構（例如，下， 中間，上及導電層）保持相同於第一實施例者。凹槽32係 範圍約1至1 〇〇微米深，而無關於感應器之累積厚度。凹 槽32係由熟習於此技藝者以靜電夾頭製造之任何已知機 成’其包含但並不限定於噴珠’蚀刻等。較佳地，凹 構形 槽深度係允許感應器突出於夾頭30之支撐面1 4上不超出 約5.至ό微米。例如，於具有累積厚度約丨〇微米（包含約 3微米厚之下層’約4微米厚之中間層及約3微米厚之下 層）之感應器中’凹槽深度係大約5微米，使得感應器突 出支撐面14約5微米。以此方式’感應器係與支撐面一 體成型，並突出晶圓及夾頭間之接觸面面一距離。因此， 於夾持晶圓時’感應器係被該距離或其一部份所壓縮，該 部份係其延伸超出接觸平面’並足以創造~可變壓電信號 (如於以下所詳述）’及基材42仍將被支撐於支撐面14之 上，但不致太大而不可接受地降低了夾持力。 第9頁 本“尺度適用中^iii"^s)A4規格⑽•公爱） (請先閱讀背面之注意事項再填寫本頁) L·---------I *-I-II--. I-I----- II. 'IIIIII ί I Α7 F4 325 8 〇 Β7_ 5. Description of the invention () A broken semiconductor wafer is based on the Johnson-Raybe effect. Being attracted to the electrostatic chuck by static electricity, that is, the charges migrate into the back of the wafer, and the charges migrate from the electrodes to the surface of the chuck, so that a strong electrostatic force appears in the insertion space separating the wafer and the surface of the chuck. This electrostatic chuck is used in a semiconductor wafer processing system to support a semiconductor wafer while producing integrated circuits on the wafer. In order to increase the yield and strengthen the reliability of the semiconductor wafer processing system, speculate whether the semiconductor wafer appears on the chuck, whether it is centered, and whether the holding force is sufficient for subsequent semiconductor wafer processing to maintain the semiconductor wafer. Proper positioning on the chuck is important. Furthermore, the ceramic electrostatic chuck known in the art is provided with a wafer spacer on its support surface to reduce the amount of particulate contaminants attached to the wafer from the surface of the chuck. The cover is most outwardly extending pads or supporting members for engaging and maintaining semiconductor wafers. It is separated from the top or support surface of the electrostatic chuck during clamping and subsequent semiconductor wafer processing. Assigned by U.S. Patent No. 5,656,093, issued August 12, 1997, issued by Bahar et al. And incorporated by reference = in the processing of semiconductor wafers using electrostatic chucks with wafer spacers , To detect whether the semiconductor appears on the mask, whether the semiconductor is centered on the mask, so the centering on the chuck, and whether the semiconductor wafer grips the chuck is sufficient for subsequent semiconductor wafer processing to maintain the It is important that the conductor wafer is properly positioned on the chuck. In this technique, the method and equipment used to determine whether a semiconductor wafer is present and centered on the chuck, for example, an electrostatic chuck is known. The 31st paper size applies Chinese National Standard (CNS) A4. Specifications (210 X 297 mm) (Please read the precautions on the back before filling out this page) I -------- Order —------- II-Printed by the Intellectual Property Bureau of the Ministry of Economic Affairs and Consumer Cooperatives 1 '厂 丽 i 3 2 5 8 〇 Α7 Β7 ___ 5. Description of the invention () The electrostatic chuck includes a system to measure the change in capacitance between the sensing electrodes when the wafer is positioned on the chuck. This system It is commonly assigned to US Application No. 08 / 873,268, which was named on June 11, 1997, and is named "Methods and Equipment for M Wafer Inspection." This case is incorporated as a reference. Although, this capacitance The measurement system can accurately measure the appearance and alignment of the wafer, but the measurement results are susceptible to electrical noise, which is mainly generated by the plasma in the processing room. In addition, this capacitance measurement system No. Energy measures the amount of holding force applied to the clamped wafer. In this technique, there is a need for new and improved methods and equipment to detect whether a semiconductor wafer appears on the chuck, whether the wafer is centered on the chuck, and whether the clamping force applied to the wafer is a follow-up The wafer processing system is substantially free of electrical noise sources from the processing chamber. Purpose and Summary of the Invention: The disadvantages related to the prior art are overcome by the present invention, which is a method and equipment for detecting the presence of semiconductor wafers on a chuck. And methods and equipment for detecting whether the wafer is centered on the chuck, and methods and equipment for detecting wafer clamping to the chuck as the power of subsequent wafer processing. Specifically, the present invention inserts a Or most piezoelectric sensors are between a semiconductor wafer and a semiconductor wafer chuck. When a semiconductor wafer is clamped to the chuck, the piezoelectric sensor is compressed and the inductor generates electricity in a piezoelectric manner. The piezoelectric power generation system is detected and a signal is generated to indicate that the wafer appears on the chuck. In another embodiment, when the semiconductor is clamped with sufficient force, it will be later on page 4 Zhang scale is applicable to China National Standard (CNS) A4 specification (210 X 297 mm) (Please read the notice on the back before filling this page) Installation * ------- Order -------- —Line I _ Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economy r H4325B 〇 A7 B7_ V. Description of the Invention () When processing semiconductor wafers and maintaining wafers on the chuck, it will be decided that semiconductor wafers and chucks will be used. The amount of power generated by the pressure sensor and a critical level (such as piezoelectric current) are established. The power generated by the piezoelectric sensor placed between the semiconductor wafer and the chuck is detected and determined Whether the detected amount of power is at least equal to the critical value, and if so, a signal is generated to indicate that the clamping force is sufficient to 'properly hold the wafer' during subsequent semiconductor wafer processing. In another embodiment, a plurality of piezoelectric sensors that are equidistant from each other are positioned on a peripheral surface outside a clamping support surface, and a semiconductor wafer is clamped to the clamping support surface to compress the semiconductor wafer. The piezoelectric sensor 1 between the circle and the chuck enables the piezoelectric sensors to generate power. The generated power is detected and decided whether the power is generated by all the majority of the piezoelectric sensors, or 1 is not generated by all the sensors of the majority of the piezoelectric sensors. When a piezoelectric sensor in a piezoelectric sensor is generated, a first signal is generated to indicate that the semiconductor wafer is centered on the chuck. If it is determined that the generated power is not generated by all voltages in most piezoelectric sensors, When an electric sensor is generated, a signal is generated to indicate that the semiconductor wafer is not centered on the chuck. 3 The teaching of the present invention can be quickly understood by the following detailed description in conjunction with the above drawings, in the drawings: : Figure 1 is an example diagram showing a wafer containing a Feng conductor and related piezoelectric and signal generating circuits; Page 5 This paper size applies to China National Standard (CNS) A4 (210 x 297 mm) (please (Please read the notes on the back before filling out this page) Consumer Co-operation of Intellectual Property Bureau of the Ministry of Economic Affairs IIIIIII 11111111-. — — [11 — lll · I IDIIIIIIIIII1 B7 V. Description of Invention () Brother 2 is a partial cross-sectional view taken along the line 2-2 of Brother 1 in the front direction; Figure 3 is another embodiment of the present invention taken along the line 2-2 of Figure 1 in the direction of the arrow Partial cross-sectional view, FIG. 4 is a plan view of an electrostatic chuck having a supporting surface of a wafer spacer, and FIG. 5 is a partial cross-sectional view taken in the direction of an arrow along lines 5-5 of FIG. 4; and FIG. 6 is a partial cross-sectional view taken along the line 5-5 of FIG. 4 in the direction of the arrow in accordance with another embodiment of the present invention. For ease of understanding, in these drawings, the same reference numerals represent the same components as much as possible. Drawing number comparison description: (Please read the precautions on the back before filling this page) -------- Order ----- Printed by the Intellectual Property Bureau of the Ministry of Economic Affairs Consumer Cooperatives 10 Wafer Inspection Equipment 12 Substrate Support chuck 14 Support surface 15 Conductive material 16 Ground 18 Piezoelectric sensor 19 Piezoelectric sensor 20 Piezoelectric sensor 22 Measuring circuit 24 Lower layer 25 Upper layer 26 Middle layer 28 Conductor 29 Conductor 30 Conductor 3 1 Front detection path 32 Spike Detection circuit 3 3 Tip detection circuit 40 Comparison circuit 42 Semiconductor wafer line! This paper size applies the Chinese National Standard (CNS) A4 specification (210 X 297 mm) A7 B7 47 electrode 1 1 2 Support member W43258 〇 5. Description of the invention (46 electrode 48 electrode invention detailed description: Refer to Figure 1 to implement this The invention's semiconductor wafer inspection equipment is shown and is generally indicated by reference number 10. The equipment 10 shown is for naming a substrate containing a support surface 14 year old dream + j. -S The chuck I 2; the electrostatic chuck 12 2 can be the above. It can be understood that although the present invention is a π output coupled with the electrostatic $ head 12, the present invention can be used for sealing people Any type of chuck including ceramic electrostatic chucks, non-ceramic heads, bipolar electrostatic chucks, unipolar ^ ,, 1 诤 electric loss heads, mechanical chucks, | empty chucks, etc. The present invention can be designed with clothes to hold a wafer on the surface of the holder in the form of a clamping device. An electrostatic chuck is just an example of this clamping device. According to the present invention, a layer of conductive material 5 is provided on the support surface 4 The conductive layer 15 can be provided on the support surface by a physical vapor deposition or chemical vapor deposition of a conductive material such as titanium. The material can have a thickness of about 1-9 microns and can be deposited on the support surface 14 As shown in the figure, to be connected to the common point of the circuit or to ground 16. In the implementation, 'equipment 1 0 contains three piezoelectric. Inductors I 8, 9 and 20 are provided for The chuck support surface 14 faces upward, and the signal measurement circuit is roughly indicated by reference number 22. As shown in Fig. 2, regarding the related piezoelectric sensor 18, the piezoelectric selector may include a lower layer 24 and a drink 25 (Ti) of the upper layer 25 and zinc dioxide (Zn〇2) of the middle exhibition 26. The titanium and zinc dioxide layers that make up the piezoelectric sensor. Page This page applies to national standards (CNS) ) A4 size (210x297 mm) A7 rf4 32 5 B 0 _______B7__________ V. Description of the invention () It can be deposited on the supporting surface 1 4 of the electrostatic chuck 12 by physical vapor deposition method and can have about Cumulative thickness of 1 3 to 70 microns. Deposition occurs through a hood or similar plate that occurs on a support surface An example of a mask and deposition technique is discussed in the commonly assigned application, US Patent Application No. 08 / 736,887, October 25, 1996. Although this application teaches titanium as a mask Better materials, but other materials are also taught, such as ceramics (aluminum nitride). Ceramics are the preferred materials for creating the piezoelectric sensors of the present invention. For example, the 'lower layer 2 4 series is first deposited to a thickness About 1 to 9 microns. Furthermore, the intermediate layer 26 deposited on the lower layer 24 is about 11 to 50 micrometers thick. Finally, the 'upper layer' is deposited on the intermediate layer 26 to a thickness of about 1 to 9 microns. Although 'Titanium is discussed as the preferred material for the upper and lower layers 24 and 25, respectively', any other commonly available material that is easy to deposit and adhere to the support surface 14 and is compatible with the ultra-high vacuum (UHV) environment It can also be applied. These materials may be selected from, but are not limited to, a group including copper, titanium nitride, and tungsten. Although zinc dioxide is discussed as a preferred material for the intermediate layer 26, any commonly available material that is classified as having piezoelectric characteristics and capable of generating a current through the piezoelectric effect or its cause can also be applied. As shown in Fig. 2 about the related piezoelectric sensors, the lower layer 24 is connected to a suitable connector 28 extending through the electrostatic chuck 12. Similarly, the 'piezoelectric sensors 19 and 20' shown in FIG. 1 are connected to the related wires 29 and 30 extending through the electrostatic chuck 2 as in the way of the wires 28 shown in FIG. 2. A method for manufacturing conductive tracks and feeder connectors in ceramic chucks is disclosed in commonly assigned US Patent Application No. 08 / 834,702 filed on April t, 997, which is named For this reason, the paper size on page 8 applies to the Chinese national standard (CNS > A4 size (210x297 public love) (Please read the precautions on the back before filling this page) Printed by the Intellectual Property Bureau Employee Consumer Cooperatives-I ' 11 — — — — — --- I ----- I-/ W ------- lb —--— — — — — — — (Printed by the Consumer Cooperative of Intellectual Property Bureau of the Ministry of Economic Affairs Γ4 325 8 05. Description of the invention (the body's conductive feeder and its manufacturing method ", and the case is incorporated in: in some examples, the cumulative thickness of the inductor must be carefully considered. The cumulative thickness of the prepared sensor reduces the cold bud Fortunately, if the clamping force is low, the substrate 4 will not be properly held on the head 1 2 > μ #, 翊 12. If this—the situation exists, then the present invention has another- The embodiment is provided in Fig. 3. Specifically, the static electricity loss with a plurality of grooves 32 in the support surface The 30 series is provided (note that in order to fit Figures 2 and 5 and for clarity, only _ represents the groove η series is described). The electric sensors 18 '19 and 20 series are incorporated into the support surface "concave" In the groove 32, the other sensor structures (for example, the lower, middle, upper, and conductive layers) remain the same as those in the first embodiment. The groove 32 is about 1 to 100 microns deep without Regarding the accumulated thickness of the inductor. The groove 32 is formed by any known machine made of electrostatic chucks which is familiar to the artisan, which includes but is not limited to bead blasting etc. Preferably, the concave configuration groove Depth allows the sensor to protrude from the support surface 14 of the collet 30 by no more than about 5. to 6 microns. For example, in the middle with a cumulative thickness of about Layer and the lower layer (about 3 micrometers thick) in the sensor, the groove depth is about 5 micrometers, so that the sensor protrudes from the support surface 14 by about 5 micrometers. In this way, the sensor system is integrated with the support surface and protrudes from the wafer. And the distance between the contact surface and the chuck. 'The sensor is compressed by this distance or a part of it that extends beyond the contact plane' is sufficient to create a ~ variable piezoelectric signal (as detailed below) 'and the substrate 42 will still be Supported on the support surface 14, but not too large and unacceptably reduces the clamping force. Page 9 "The standard is applicable ^ iii " ^ s) A4 size ⑽ • public love) (Please read the note on the back first (Please fill in this page for matters) L · --------
· I I f I 線！ )-----1-——.-------------- 經濟部智慧財產局員工消費合作社印製 A7 τ 143258 Ο ^ 五、發明說明（） 於較佳實施例中，第1圖之信號量測電路22可以包 .含三個適當尖峰檢測電路3 1，32及3 3，其係為本技藝所 知用以檢測如由第1圖所示之壓電電流或壓電電力，藉由 壓電尖峰P。更町第1圖中注意到’壓電感應器18 ’ 及2 0係藉由導線2 8，2 9及3 〇分別連接至峰值撿測電路 3 1，3 2及3 3。尖+檢測器電路3 1，3 2及3 3係同時連接 至電路共同或接地1 6 ’並以連接於相關壓電感應器I 8， 19及20上。尖峰檢測電路31，32及33之輸出分別被導 線35, 35及37連接至一合適比較電路40。比較電路4〇~ 係為熟習於此技藝者所知用以接收輸入彳έ號及反應於比 較器内部電路架構’而產生各種輸出仏號者。 於一半導體晶圓上，例如示於第2圖之相關半導體晶 圓4 2係被放置於壓電感應器丨8 ’丨9及2 0上’用以鳴合 示於第1圖之壓電感應器18’丨9及20,如於第2圖所示’ 有關相關壓電感應器18中’於一適當電壓施加至内藏於 靜電夹頭I 2中之電極4 6 ’ 4 7及4 8時’半導體晶圓4 2係 依據上述強森-雷貝或庫倫效應’取決於夾頭所製造之材 料，而被吸引至靜電夾頭。當半導體晶圓42被吸引至靜 電夹頭1 2時1半導體晶圓4 2將嚙合並壓縮壓電感應器， 例如示於第2圖中之代表性壓電感應器1 8 ’造成相反電荷 被產生於上及下鈇層23及24之上。這些相反電荷產生壓 電電力之尖波，當感應器18係壓縮於晶圓42及支撐面14 之間時，其迅速上升，當夾持動作被完成時，電力將快速 地衰減至零，並且，壓電感應器將不再被壓縮。於被壓縮 第10頁 本紙張尺度適用中國國家標準（CNSM4規格（210x297公犮） (請先閱讀背面之注意事項再填寫本頁) —輋--------訂---------線！ ---------..-------------- A7 B7 五、 經濟部智慧財產局員工"費合作社印製 ,43258 發明說明（ 之至少一壓電感應器上，壓雨& Μ%# & 、 竖兒感應益產生整電電力，其係 被—尖峰檢測器所檢剛3及施 、 反應於菡電力，尖峰檢測器提供 —輸出信號至比較器4〇 »比如 車乂姦4 0 ίτ·硤提供以已知類型 内部電路，用以接收一來ή I女 ^ &自尖+檢測一之輪出信號， 並用以產生由箭頭42所指 和<•比較器輸出信號，以表示半 導體晶圓之出現於夹頭12上。 直到所有三個被壓喻 i Μ <壓電感應器丨8，19及2〇均反 應於上述半導體晶圓夾持 邮古腐+ : _ 乍用’所有壓電感應器產生壓電 電力，其係被三個尖峰檢目彳 U奋Jl，j，及33所檢測3所 有三個尖峰檢測器電路辐 代供州出信號給比較器4〇。比較器 包含為本技藝已知類型之 太又適當電路，用以接收來自所有三 個尖峰檢測器之輸出信號， 並楗供由箭頭43所指之輸出 化號’表示半導體晶圓之+ 出現，並對中於夾持支撐面14。 再者，尖峰檢測電路 _ 乂是為本技藝所知之類型，用 以於檢測到電力等於由第] ’ «弟丨圖 <平母T所表示之預定或臨 界位準時’提供一輸出信 、 ^ 了以了斛的是’預定或臨界 位準Τ係被決定為產生於後鋒 王於设^ +導體晶圓處理時，夾持力 係足狗以維持晶圓於夾頭上之強度。目此，當三個壓電感 應器均足夠被上述半導體晶圓夹持動作所壓縮時，所有三 個感應器產生至少等於預定或臨界位準Τ之電力，及所有 —大峰值檢測态3卜3 2及3 3提供輸出信號給比較器4〇。 輸出信號係被為本技藝者所知之適當内部電路所接收’用 以提供由箭頭44所指示之比較電路信號。此比較輸出信 號表示為靜電夾頭所施加至半導體晶圓之適當量之爽持 第Π頁 本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公釐） (琦先閲讀背面之注意事項再填寫本頁) I --------訂·--------線！ ----------^-------------- 經濟部智慧財產局員工消費合作社印製 隳4 325 8 〇 at _B7_五、發明說明（） 力，以作為進一步之半導體晶圓處理。應可以了解的是， 於至少一壓電感應器未被足夠地壓縮以產生至少等於該 預定位準或臨界T之電力時，相關尖峰檢測器並未產生一 信號給比較器4 0。結果，比較器内部電路產生由箭頭4 5 所指示之信號，以表示夾持力之強度並不足以作為進一步 之半導體晶圓處理。可以了解的是，來自比較器之輸出信 號可以是音訊或視訊信號或可以被傳送至中央處理單元 之信號，該處理單元控制整個丰導體晶圓處理系統》因 此，於Λ較器4 0產生輸出信號4 5時，此一中央處理單元一 將暫停半導體晶圓處理，並不會產生可能缺陷之積體電 路，或允許晶圓由於差夾持力而滑離開爽頭。 可以了解的是，本發明之設備1 0可以被實施以只檢 測一半導體晶圓之出現於夾頭1 2上。於此一實施例中， 第1圖中之比較器40可以提供一為本技藝中之已知類型 之内部電路，以接收來自所有或任一尖峰檢測器3 1，3 2 及3 3之輸出信號，於一信號由任一此尖峰檢測器所產生 時，比較器提供由箭頭42所指示之輸出信號，以表示一 半導體晶圓出現於半導體夾頭上。因此，可以了解的是， 本設備及方法發明可以實施以檢測一半導體晶圓之出現 於夾頭上，或被實施以檢測是否晶圓係對中於夾頭上，或 可以被實施以檢測夾持晶圓至夾頭之強度，或可以被實施 以提供前述半導體晶圓檢測之任一组合。 參考第4及5圖，本發明之另一半導體晶圓檢測設備 係被顯示並以參考數1 〇 Α加以表示。示於第丨及2圖中之 第12頁 〈請先閱讀背面之注意事項再填寫本頁>· I I f I line! ) ----- 1 -——.-------------- Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs A7 τ 143258 Ο ^ 5. Description of the invention () In the better implementation For example, the signal measurement circuit 22 of FIG. 1 may include three appropriate spike detection circuits 3 1, 32, and 3 3, which are known in the art to detect the piezoelectricity as shown in FIG. 1. Electric current or piezoelectric power, by piezoelectric spike P. It is noted in the figure 1 of the Gengmachi that the 'piezoelectric sensors 18' and 20 are connected to the peak detection circuits 3 1, 3 2 and 3 3 through wires 2 8, 29 and 30 respectively. The tip + detector circuits 3 1, 3 2 and 3 3 are connected to the circuit common or ground 1 6 ′ at the same time and are connected to the related piezoelectric sensors I 8, 19 and 20. The outputs of the spike detection circuits 31, 32 and 33 are connected to a suitable comparison circuit 40 by wires 35, 35 and 37, respectively. The comparison circuit 40 ~ is known to those skilled in the art to receive input signals and generate various output signals in response to the internal circuit structure of the comparator. On a semiconductor wafer, for example, the related semiconductor wafer 4 2 shown in FIG. 2 is placed on a piezoelectric sensor 丨 8 ′ 丨 9 and 20 ′ to mingle the piezoelectric shown in FIG. 1. Inductors 18 ′, 9 and 20, as shown in FIG. 2 'in the relevant piezoelectric sensor 18', an appropriate voltage is applied to the electrodes 4 6 '4 7 and 4 built in the electrostatic chuck I 2 At 8 o'clock, the "semiconductor wafer 42" is attracted to the electrostatic chuck according to the material of the chuck according to the Johnson-Raybe or Coulomb effect described above. When the semiconductor wafer 42 is attracted to the electrostatic chuck 12, the semiconductor wafer 42 will engage and compress the piezoelectric sensor, such as the representative piezoelectric sensor 1 'shown in FIG. Produced on the upper and lower palate layers 23 and 24. These opposite charges generate a sharp wave of piezoelectric power. When the inductor 18 is compressed between the wafer 42 and the support surface 14, it rises rapidly. When the clamping action is completed, the power will quickly decay to zero, and The piezoelectric sensor will no longer be compressed. On the compressed page 10, this paper size applies the Chinese national standard (CNSM4 specification (210x297 cm)) (Please read the precautions on the back before filling this page) — 輋 -------- Order ----- ---- Line! ---------..-------------- A7 B7 V. Printed by the staff of the Intellectual Property Bureau of the Ministry of Economic Affairs " Fee Cooperative, 43258 Invention Note (On at least one piezoelectric sensor, pressure rain & Μ% # &), the induction sensor generates the entire electric power, which is detected by the spike detector, and the response is to the radon power, the spike Detector provides-output signal to comparator 4 〇 »such as car 乂 rape 4 0 ίτ · 硖 provides a known type of internal circuit to receive a price I female ^ & since the tip + detection of a round out signal, It is also used to generate the < • comparator output signal indicated by the arrow 42 to indicate the presence of the semiconductor wafer on the chuck 12. Until all three are inferred i M < Piezoelectric sensors 8, 19 and Both are reflected in the above-mentioned semiconductor wafer holding post ancient rot +: _ At first glance 'all piezoelectric sensors generate piezoelectric power, which was inspected by three peaks U U Jl, J, and 33 All three spike detector circuits in Test 3 are used to output signals to the comparator 40. The comparator includes a suitable circuit of a type known in the art to receive the output signals from all three spike detectors. The output number 'as indicated by the arrow 43 indicates that the + of the semiconductor wafer appears and is centered on the clamping support surface 14. Furthermore, the spike detection circuit _ 乂 is a type known in the art and used to After detecting that the electric power is equal to the predetermined or critical level indicated by [] 丨 figure < flat mother T ', an output letter is provided, ^ In order to determine whether the' predetermined or critical level T system is determined as Produced by the rear striker Wang Yuzhang ++ Conductor wafer processing, the clamping force is sufficient to maintain the strength of the wafer on the chuck. For this reason, when all three piezoelectric sensors are sufficient to be clamped by the above semiconductor wafer When the action is compressed, all three sensors generate power at least equal to the predetermined or critical level T, and all—the large peak detection states 3, 32, and 3 3 provide output signals to the comparator 40. The output signals are Appropriate internal electricity known to the artist "Received" is used to provide the comparison circuit signal indicated by arrow 44. This comparison output signal represents the appropriate amount of heat applied by the electrostatic chuck to the semiconductor wafer. Page Ⅱ This paper applies Chinese National Standards (CNS) A4 specifications (210 X 297 mm) (Qi first read the precautions on the back and then fill out this page) I -------- Order · -------- Line! ------- --- ^ -------------- Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs 隳 4 325 8 〇at _B7_ V. Description of the invention () as a further semiconductor crystal Round processing. It should be understood that, when at least one piezoelectric sensor is not sufficiently compressed to generate power at least equal to the predetermined level or threshold T, the relevant spike detector does not generate a signal to the comparator 40. As a result, the internal circuit of the comparator generates a signal indicated by the arrow 4 5 to indicate that the strength of the clamping force is not sufficient for further semiconductor wafer processing. It can be understood that the output signal from the comparator can be an audio or video signal or a signal that can be transmitted to a central processing unit that controls the entire abundance conductor wafer processing system. Therefore, an output is generated at Λ comparator 40 When the signal is 45, this central processing unit will temporarily suspend the processing of semiconductor wafers, and will not generate integrated circuits that may have defects, or allow the wafers to slide away from the head due to poor clamping force. It can be understood that the apparatus 10 of the present invention can be implemented to detect only the presence of a semiconductor wafer on the chuck 12. In this embodiment, the comparator 40 in FIG. 1 can provide an internal circuit of a type known in the art to receive outputs from all or any of the spike detectors 3 1, 3 2 and 3 3 A signal. When a signal is generated by any of the spike detectors, the comparator provides an output signal indicated by arrow 42 to indicate that a semiconductor wafer is present on the semiconductor chuck. Therefore, it can be understood that the device and method invention can be implemented to detect the presence of a semiconductor wafer on the chuck, or can be implemented to detect whether the wafer system is centered on the chuck, or can be implemented to detect the chuck crystal. The round-to-chuck strength may be implemented to provide any combination of the aforementioned semiconductor wafer inspections. Referring to Figs. 4 and 5, another semiconductor wafer inspection apparatus of the present invention is shown and indicated by reference numeral 10A. Page 12 shown in Figures 丨 and 2 〈Please read the precautions on the back before filling in this page >
-I *11. — I —II 一=°4*ΪΙΙΙΙΪΙ1 I , ^ — — — — .— j I 本纸張尺度適用中國國家標準（CNS)A4規格（210 X 297公釐） ψ 鱭43258 Α7 經濟部智慧財產局員工消費合作社印製 -----------Β7 —___ 五、發明說明（） 靜電夾頭12间咕山--人4 u時也7F於弟4及5圖之中。夾頭12之支撐 面 1 4係被提怔c，丄& & πη ^ , 供以大致說明並揭示於美國專利第5,656,093-I * 11. — I —II 一 = ° 4 * ΪΙΙΙΙΪΙ1 I, ^ — — — —. — J I This paper size applies the Chinese National Standard (CNS) A4 (210 X 297 mm) ψ ψ43258 Α7 Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs ---------- B7 —___ V. Description of the invention () 12 electrostatic chucks Gushan-7F Yudi 4 and 5 In the picture. The support surface 1 4 of the chuck 12 is lifted 怔 c, 丄 & & πη ^, for general description and disclosed in U.S. Patent No. 5,656,093
案之日Θ圓間'V 1 h罩’其係併入作為參考。該晶圓支撐罩係 大致由參考數MO所表示’並包含多數向上延伸整或支撐 構件1 1 2用以於於夾持及後續半導體晶圓處理時，嚙合 及維持半導體與靜電夾頭12分隔開。 於本發明之此一實施例中，壓電感應器1 8 A，1 9 A及 2〇A係被提供以墊或支撐構件1 12之至少之一，以及，於 較佳實遠例巾，係被提供於塾或支撺構件1 1 2 A ’ 1 1 2 B及一 112C於較佳實施例中’墊或支撐元件112A,112B及112C 係彼此等距分離於夾持支撐面14之外圓周部，及預定之 支撐疋件（112A，112B，112C)係分別被感應器18八19A, 及20A所替換。此可以較佳參考第5圖加以了解，該圖描 述一代表壓電感應器18A作為一積層，其包含上下層24 及25之鈦及中間層26之二氧化鋅。除了替換支撐構件 112A’ 112B’ U2C 之至少之一’感應器 18A，19A, 2〇a 係被構建並以相同於第2及3圖所討論之見之方式作動。 然而’因為支撐構件Π2同時存在於支撐面14上，所以 吾人想要感應器之累積厚度略厚於支揮構件112之厚度。 明確地說’支撐構件1 1 2係包含一例如鈦之不可壓縮材 料。因此’感應器較支撐構件為厚，以提供一可壓縮距離 (d) ’ 一壓電信號才可以藉由該距離產生。較佳地，此距離 係約2至5微米（發明人確定）。於支撐構件材料為可壓縮 材料之環境中，支撐構件及感應器之厚度可以大約相等。 第13頁 本紙張尺度適用中國國家標準（CNS)A4規格（210X 297公釐〉 (請先閱讀背面之注意事項再填寫本頁) V— 線！ ^-----I-III-------------- 14 325 8 ΟOn the day of the case, the circle 'V 1 h cover' was incorporated as a reference. The wafer support cover is generally indicated by the reference number MO and includes most of the integral or supporting members extending upward 1 12 for engaging and maintaining the semiconductor and electrostatic chucks during clamping and subsequent semiconductor wafer processing for 12 minutes. Separated. In this embodiment of the present invention, the piezoelectric sensors 18 A, 19 A, and 20 A are provided with at least one of a pad or a support member 112, and, in a preferred embodiment, 1 1 2 A '1 1 2 B and 112C are provided in the preferred embodiment' pad or support element 112A, 112B and 112C are equidistant from each other outside the clamping support surface 14 The peripheral part and the predetermined supporting members (112A, 112B, 112C) are replaced by sensors 18A, 19A, and 20A, respectively. This can be better understood with reference to FIG. 5, which depicts a representative piezoelectric sensor 18A as a laminate, which includes titanium in the upper and lower layers 24 and 25 and zinc dioxide in the intermediate layer 26. With the exception of replacing at least one of the supporting members 112A '112B' U2C 'sensors 18A, 19A, 20a are constructed and operated in the same manner as the views discussed in Figures 2 and 3. However, because the supporting member Π2 exists on the supporting surface 14 at the same time, we want the accumulated thickness of the sensor to be slightly thicker than the thickness of the supporting member 112. Specifically, the 'support member 1 1 2 contains an incompressible material such as titanium. Therefore, the 'inductor is thicker than the supporting member to provide a compressible distance (d)' and a piezoelectric signal can be generated by the distance. Preferably, this distance is about 2 to 5 microns (as determined by the inventor). In an environment where the supporting member material is a compressible material, the thickness of the supporting member and the inductor may be approximately equal. Page 13 This paper size is in accordance with China National Standard (CNS) A4 (210X 297 mm) (Please read the precautions on the back before filling this page) V-line! ^ ----- I-III --- ----------- 14 325 8 Ο
AT Β7_ 五、發明說明（） 第6圖描繪另一實施例，其中感應器可以被安置於一 或多數支撐構件上（為清楚起見，只有代表感應器1 8 A安 置於代表支撐構件1 1 2 A上）。再者，感應器係相等於上述 者，明確地具有由鈦作成之下層24 A及上層，被安置於為 二氧化鋅作成之中間層 2 6 A之間》包含壓電感應器1 8 A 之諸層可以藉由物理氣相沉積法，安置於墊或支撐元件 H2A，112B，112C之上。上層24A及下層25A均個別具 有约1至9微米之厚度，而中間層2 6 A具有约1 1 - 5 0微米 之厚度V使得感應器之累積厚度是約I 3 - 7 0微米。甴第6 圖可注意的是，鈦2 5 A之外層係安置以嚙合以提供於靜電 支撐面1 4之外圓周部之導電材料層1 5 A作電氣接觸；導 電層i 5 A係以相同於示於第1及2圖所示之導電層1 5之 方式加以提供。第6圖之壓電感應器18A之内層鈦24 A 係為導線2 8 A所連接至信號量測電路2 2，其可以相同並 如上述之示於第1圖之信號量測電路。同樣地，如於第4 圖所示，壓電感應器19A，20A係同時藉由導線29A及30A 所連接至信號量測電路2 2 = 可以了解的是，除了提供於半導體晶圓間隔罩1 00之 墊或支撐元件1 12a，1 12B，及1 12C上之壓電感應器18A， 1 9 A，及2 0 A外，半導體晶圓檢測設備ί Ο A以相同於上述 半導體晶圓檢測設備1 〇之方式操作。明確地說，該設備 操作以檢測一半導體晶圓出現於夾頭1 2上，檢測是否一 半導體晶圓係對中於夾頭1 2，及檢測半導體晶圓被夾持至 夾頭之力量，以此晶圓檢測之組合。以半導體晶圓檢測設 第u頁 本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公釐） (請先閱讀背面之注意事項再填寫本頁) 經-部智慧財產局員工消費合作社印製 ·11111 I - « — — — — — — II I . > I f I I I I — I — I - I - I I I - ._ _ I I I 1 ^4 325 8 Ο Α7 Β7 五、發明說明（） 備 1 Ο A所提供之此等檢測可以以相同於上述之有關半導 體晶圓檢測設備1 0之檢測法加以完成 雖然，併入於本發明之教導之各種實施例已經加以顯 示並詳細描述，但熟習於此技藝者可以迅速想出併入這些 教導之很多其他各種實施例。 (請先閱讀背面之注意事項再填寫本頁) 經-部智慧財產局員工消費合作杜印製 第15頁 --------訂-------- ' ----------------------- 本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公爱）AT Β7_ 5. Description of the invention (6) Figure 6 depicts another embodiment, in which the inductor can be placed on one or more supporting members (for clarity, only the representative inductor 1 8 A is placed on the representative supporting member 1 1 2 A on). In addition, the inductor is equivalent to the above, and has a lower layer 24 A and an upper layer made of titanium, and is placed between the intermediate layers 2 6 A made of zinc dioxide. The layers can be placed on the pad or support elements H2A, 112B, 112C by physical vapor deposition. The upper layer 24A and the lower layer 25A each have a thickness of about 1 to 9 micrometers, and the middle layer 2 A has a thickness V of about 1 to 50 micrometers so that the cumulative thickness of the inductor is about I 3 to 70 micrometers.甴 Figure 6 It can be noted that the outer layer of titanium 2 5 A is arranged to engage to provide electrical contact with the conductive material layer 1 5 A on the outer peripheral portion of the electrostatic support surface 14; the conductive layer i 5 A is the same It is provided in the manner of the conductive layer 15 shown in Figs. The inner layer of titanium 24 A of the piezoelectric sensor 18A of FIG. 6 is connected to the signal measurement circuit 22 by the wire 2 8 A, which may be the same as the signal measurement circuit shown in FIG. 1 as described above. Similarly, as shown in FIG. 4, the piezoelectric sensors 19A and 20A are connected to the signal measurement circuit 2 through wires 29A and 30A at the same time. 2 = It can be understood that except for the semiconductor wafer spacer 1 00 pads or supporting elements 1 12a, 1 12B, and 1 12C piezoelectric sensors 18A, 1 9 A, and 2 0 A, except for semiconductor wafer inspection equipment ί Α A is the same as the above-mentioned semiconductor wafer inspection equipment 1 〇 way operation. Specifically, the device operates to detect the presence of a semiconductor wafer on the chuck 12, to detect whether a semiconductor wafer is centered on the chuck 12, and to detect the force with which the semiconductor wafer is clamped to the chuck, This combination of wafer inspection. The semiconductor wafer inspection is set on page u. The paper size is applicable to the Chinese National Standard (CNS) A4 specification (210 X 297 mm) (Please read the precautions on the back before filling out this page.) Printed · 11111 I-«— — — — — — II I. ≫ I f IIII — I — I-I-III-._ _ III 1 ^ 4 325 8 Α7 Β7 V. Description of the invention () Preparation 1 These inspections provided by 〇A can be performed in the same manner as described above for the semiconductor wafer inspection equipment 10. Although various embodiments incorporated in the teachings of the present invention have been shown and described in detail, they are familiar with A person skilled in the art can quickly come up with many other various embodiments incorporating these teachings. (Please read the notes on the back before filling out this page) Printed by the Consumer Affairs Department of the Ministry of Economics and Intellectual Property Bureau Du 15th page -------- Order -------- '---- ------------------- This paper size applies to China National Standard (CNS) A4 (210 X 297 public love)