經濟部智慧財產局員工消費合作社印製 42431& A7 _B7_ 五、發明說明（) 發明領域： 本發明與一種半導體製程有關，特別是一種有關形 成銅接觸結構於高縱橫比接觸孔中之方法。 發明背景= 隨著半導體技術不斷的發展，晶片封裝技術持續朝著 高積集度發展。並且，藉著降低晶片中各種元件之尺寸， 也有效的完成各式各樣高整合積集度之半導體1C元件。 但在此種1C的製程中，卻也面臨了諸多的困難與挑戰。 一般而言，在積體電路内部構造中，往往需要形成眾多的 内連線結構，以連結數以百萬計的元件，並用以交換元件 間之電子訊號，如此才能有效執行特定之功能。是以積體 電路的性能，除了有賴位於其結構中各種元件之性能及可 靠度外，更需依靠有效且高良率的内連線結構。其中，隨 著積集度的不斷提昇，目前在積體電路的設計上，往往採 用了大量的多重内連線設計。而在此多重内連線結構中， 則包括了大量諸如導電插塞（contact plug)與導電連結 (via)之接觸結構（contact)。 一般而言，在當今的半導體製程中，普遍的應用鋁 金屬來作為接觸結構之材質^因為鋁金屬除了具有極佳的 導電性，且造價便宜外，其易於進行沉積與蝕刻之特性， 更成為業界所優先者慮的導線材料。然而，隨著半導體元 件之積集度不斷上昇，使用金屬鋁來作為上述接觸結構亦 本紙張尺度滷用中國國家標準（CNS)A4規格（210x297公釐） Ί — f.l------- -,t-----!—訂-----1 i I 1 ^ (請先閱讀背面之;i意事項再填寫本頁) 經濟部智慧財產局員工消費合作社印製 4243i 8 A7 ------------- 五、發明說明（） 產生極多困難。首先，鋁原子在高溫下容易與矽底材發生 交互擴散（Inter，Diffusi〇n)，而在介面間產生“尖峰現 象” ’導致铭線產生接觸不良之問題。此外，當鋁線的尺 寸隨著元件縮小時，由於“電致遷移”所導致的銘原子移 動’將使所形成的鋁接觸結構發生短路。因此，隨著半導 體製程不斷的發展，在目前的半導體工業中，已試著使用 導電性較高且電阻率較低的銅金屬，來取代傳統大量使用 之is金屬。特別是由於銅金屬其電致遷移率較低’是以可 應用作為半導體製程中之接觸結構。 請參照第一圊，該圖所顯示為目前技術中進行錮接 觸結構製程之步驟。其中，首先提供一半導體底材2，且 在該半導體底材2上已形成所需之各層與各式元件。接 著’形成介電層4於該半導體底材2上，並使用微影蝕刻 製程在介電層4上形成接觸孔6,以曝露出位於半導體底 材2上之主動區域（未顯示於圖中）。然後，沿著該接觸孔 6之表面’形成一諸如氮化鈦材料之阻障層8。在形成阻 障層8後’再使用物理氧相沉積（physical vapor deposition; PVD)法’形成一薄銅層ι〇於阻障層8之表面，以作為銅 晶種（Cu seeding)層。接著，可使用電化學（ei ectrical chemical deposition; ECD)製程形成銅接觸結構以填充於 接觸孔6之中。 然而，值得注意的是曝露於空氧_之銅晶種層1 〇， 很容易發生氧化反應而形成氧化銅。如此一來，當後續將 半導體底材2置於硫酸銅溶液中，進行電化學反應以製造 3 泰纸張尺度適用令國國家標準（CNS)A4規格（210 x 297公釐） - i Η.;I· — — ί^. —---1--訂--- - ----- (請先閱讀背面之注意i項再填寫本頁) A7 42d§i§ B7_ 五、發明說明（） 銅接觸結構時，由於氧化銅之導電性不佳，且於硫酸銅溶 液中很容易被移除，是以造成沉積銅原子之效果不佳，進 而使得所形成之銅接觸結構具有空洞等缺陷。亦即由於氧 化銅之導電性不佳，且極易溶解於電化學反應溶液中，是 以會造成在進行電化學沉積程序時，產生了遮蔽效應 (shadowing effect)，從而使所形成的接觸結構具有空洞等 缺陷。請參照第二圖，該圖所顯示即為當位於接觸孔 6 底部之銅晶種層1 0發生氧化情形時，常常會導致在形成 銅接觸結構1 2後，產生如圖所示之空洞1 6。由此降低了 所製造銅接觸結構1 2之良率與導電性。 發明目的及概述= 本發明之主要目的在提供一種避免銅晶種層氧化之 銅接觸結構製造方法。 本發明之另一目的在提供一種使用過渡金屬以降低 銅原子氧化機率之銅接觸結構製造方法。 本發明之再一目的在提供一種銅接觸結構製程，可使 防止銅原子氧化之過渡金屬蓋層，於電化學沉積反應中， 自動移除" 一種在半導體底材上製造銅接觸結構之方法，包括了 下列步驟。首先形成介電層於半導體底材上，並蝕刻介電 層以形成開口於介電層上，其中開口用以曝露出半導體底 材之上表面。然後，再形成阻障層於開口之側壁與所曝露 之半導體底材上表面，並依序形成銅晶種層於阻障層之上 本紙張尺度適用中國國家標準（CNS)A4規格（210 x 297公t ) « I ϋ ! ϊ * -^· ----- f I 訂 --------I (請先閱讀背面之注意事項再填寫本頁) 經濟部智慧財產局員工消費合作社印製 經濟部智慧財產局員工消費合作社印製 4243 1 5 A7 _B7五、發明說明（） 表面，且形成蓋層於銅晶種層之表面上，用以防止銅晶種 層發生氧化反應。再沉浸半導體底材於銅離子溶液中，以 進行電化學沉積（E C D)反應，並形成銅接觸結構於開口 中，其中蓋層在該銅離子溶液中可形成錯化合物，而脫離 該銅晶種層表面° 圖式簡蕈說明： 藉由以下詳細之描述結合所附圖示，將可輕易的了 解上述内容及此項發明之諸多優點，其中： 術 技 統 傳 據 根 示 顯 圖 面 截 之 片 晶 艘 導 半 為 圖 第 驟 步 之 構 結 觸 接 銅 成 形 上 材 底 體 導 半 在 統L發 傳U本 據θ據 根 ί 根 空 示，示 之0^0 ， 有 ， J 具 3 Η ® ® ^ ® 載Μ載 一 結 一 片 - 片 asMBg 冑U冑 導、導 形 半-ff半 上 為 為 材 圖 圖 二砠三 II 第1第 導 半 在 結 觸 接 銅 成 形 上 材 底 體 導 半 在 例 施 實 步 之 術 技 第 明 第 明 發 本 據 根 示 顯 圖 面 載 之 片 晶 體 導 半 為 圖 四 第 實 實 第 明 發及 ;據罾 構ΐ纟 結Μ之 觸〃構 顯 接 結 夂面# 成截銅Λ纟 所 1形 片 1晶± 材g材 , 骨 、 體+體 —圖+ 夂五4 «第#J 施 施 第 明 發 本 據 根 示 顯 圖 面 載 之 片 晶 體 導 半 為 圖 六 第 結 觸 接 銅 之 成 形 所 上 材 底 體 導 半 在 例 施 實 明 說 細 詳 明 發 本紙張尺度適用中國國家標準（CNS)A4規格（210x 297公釐） . τ 11 — 麵^-----— II 訂· —----1 (請先閱讀背面之注意事項再填寫本頁) § A7 B7 五、發明說明（） (請先閱讀背面之泫意事項再填寫本頁) 本發明提供一個新方法用以形成銅接觸結構於接觸 孔中°其中藉著在形成鋼晶種層的程序中，摻入過渡金 屬，將可提高銅晶種層之穩定性’且防止銅原子與氧氣發 生反應而生成氧化銅。此外，也可在沉積銅晶種層後，再 形成過渡金屬層於其上’以達成避免產生氧化銅之效果。 值得注意的疋當開始進行電化學沉積製程時，在將半導體 底材沉浸於琉酸銅溶液中時，上述過渡金屬可與硫酸根發 生螯合反應生成錯化合物，而達成自動移除的目的。有關 本發明之詳細說明如下所述。 請參照第三圖，在本發明所提供之第一具體實施例 中’提供一具<100：>晶向之單晶矽底材1〇2。一般而言， 其它種類之半導體材料，諸如砷化鎵（gaUium arsenide)、 鍺（germanium)或是位於絕緣層上之矽底材（siHc〇n insulator, SOI)皆可作為半導體底材使用β另外’由於半 導體底材表面的特性對本發明而言，並不會造成特別的影 a尚’是以其晶向亦可選擇 經濟部智慧財產局員工消費合作社印w衣 接著在半導體底材102上形成介電層1〇4以產生絕緣 作用。此處要說明的是在形成介電層1〇4之前，該半導體 底材102之表面上已形成製造積體電路所需之各式主動元 件、被動元件、與週圍電路等等。亦即，料導體底材二 表面上已具有各式所需之功能層與材料層^在一較佳實施 例中，該介電層1 04可以為氧化矽或氮化矽所形成。一般 而言’使用化學氣相沈積法（CVD)以四乙基矽酸鹽（ΤΕ〇^) 在溫度約600至800°C ’壓力約（^至10i〇r^，可以形成氧 本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公蹵） A7Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs 42431 & A7 _B7_ V. Description of the Invention () Field of the Invention: The present invention relates to a semiconductor process, and particularly to a method for forming a copper contact structure in a high aspect ratio contact hole. Background of the Invention = With the continuous development of semiconductor technology, chip packaging technology continues to develop towards a high accumulation level. In addition, by reducing the size of various elements in the wafer, various semiconductor 1C elements with high integration and integration can be effectively completed. However, in this 1C process, it also faces many difficulties and challenges. Generally speaking, in the internal structure of the integrated circuit, it is often necessary to form a large number of interconnecting structures to connect millions of components and exchange electronic signals between the components in order to effectively perform specific functions. Therefore, in addition to the performance and reliability of various components in its structure, the performance of integrated circuits also depends on an efficient and high-yield interconnect structure. Among them, with the continuous improvement of the degree of accumulation, currently in the design of integrated circuits, a large number of multiple interconnect designs are often used. In this multiple interconnect structure, a large number of contact structures such as conductive plugs and vias are included. Generally speaking, in today ’s semiconductor manufacturing processes, aluminum metal is commonly used as the material of the contact structure. ^ Because aluminum metal has excellent electrical conductivity and low cost, it is easy to deposit and etch. Wire material that the industry prioritizes. However, with the increasing accumulation of semiconductor components, the use of metal aluminum as the contact structure also uses the Chinese National Standard (CNS) A4 specification (210x297 mm) for paper size. Fl — fl ------- -, t -----! — Order ----- 1 i I 1 ^ (Please read the back of the first page; i will fill in this page before filling in this page) Printed by the Intellectual Property Bureau Employee Consumer Cooperative of the Ministry of Economic Affairs 4243i 8 A7- ------------ 5. Description of the invention () There are many difficulties. First, aluminum atoms easily cross-diffuse with silicon substrates (Inter, Diffusion) at high temperatures, and “spikes” occur between the interfaces, which causes problems with poor contact in the inscription lines. In addition, when the size of the aluminum wire is reduced with the component, the atomic movement caused by "electromigration" will short-circuit the formed aluminum contact structure. Therefore, with the continuous development of semiconductors, in the current semiconductor industry, attempts have been made to use copper metal with higher conductivity and lower resistivity to replace the traditionally used is metal. In particular, because copper metal has a low electromobility, it is applicable as a contact structure in a semiconductor process. Please refer to the first step. The figure shows the steps of performing the contact structure process in the current technology. Among them, a semiconductor substrate 2 is first provided, and the required layers and various elements have been formed on the semiconductor substrate 2. Next, a dielectric layer 4 is formed on the semiconductor substrate 2, and a contact hole 6 is formed on the dielectric layer 4 using a lithographic etching process to expose the active area on the semiconductor substrate 2 (not shown in the figure). ). Then, along the surface 'of the contact hole 6, a barrier layer 8 such as a titanium nitride material is formed. After the barrier layer 8 is formed, a physical copper vapor deposition (PVD) method is used to form a thin copper layer on the surface of the barrier layer 8 as a Cu seeding layer. Next, a copper contact structure can be formed using an electrochemical (electrochemical chemical deposition; ECD) process to fill the contact holes 6. However, it is worth noting that the copper seed layer 10 exposed to air oxygen can easily cause oxidation reaction to form copper oxide. In this way, when the semiconductor substrate 2 is subsequently placed in a copper sulfate solution, an electrochemical reaction is performed to produce 3 Thai paper. The size of the paper is applicable to the national standard (CNS) A4 specification (210 x 297 mm)-i Η. ; I · — ί ^. —--- 1--Order --------- (Please read the note i on the back before filling this page) A7 42d§i§ B7_ V. Description of the invention ( ) When the copper contact structure is poor, copper oxide has poor conductivity and can be easily removed in copper sulfate solution, which results in the poor effect of depositing copper atoms, which in turn makes the formed copper contact structure have defects such as voids. . That is, because copper oxide has poor conductivity and is easily soluble in the electrochemical reaction solution, it will cause a shadowing effect when the electrochemical deposition process is performed, thereby making the contact structure formed. Has defects such as holes. Please refer to the second figure, which shows that when the copper seed layer 10 located at the bottom of the contact hole 6 is oxidized, it often results in the formation of the cavity 1 as shown in the figure after the copper contact structure 12 is formed. 6. This reduces the yield and conductivity of the manufactured copper contact structure 12. Object and Summary of the Invention = The main object of the present invention is to provide a method for manufacturing a copper contact structure that avoids oxidation of a copper seed layer. Another object of the present invention is to provide a method for manufacturing a copper contact structure using a transition metal to reduce the probability of copper atom oxidation. Another object of the present invention is to provide a copper contact structure process, which can prevent the transition metal capping layer of copper atoms from being oxidized automatically during the electrochemical deposition reaction " A method for manufacturing a copper contact structure on a semiconductor substrate , Including the following steps. First, a dielectric layer is formed on the semiconductor substrate, and the dielectric layer is etched to form an opening in the dielectric layer, wherein the opening is used to expose the upper surface of the semiconductor substrate. Then, a barrier layer is formed on the side wall of the opening and the upper surface of the exposed semiconductor substrate, and a copper seed layer is sequentially formed on the barrier layer. This paper applies the Chinese National Standard (CNS) A4 specification (210 x 297g t) «I ϋ! Ϊ *-^ · ----- f I Order -------- I (Please read the notes on the back before filling out this page) Staff Consumption of Intellectual Property Bureau, Ministry of Economic Affairs Cooperative printed by the Intellectual Property Bureau of the Ministry of Economic Affairs, printed by the Consumer Cooperative, 4243 1 5 A7 _B7 V. Description of the invention () Surface, and a cap layer is formed on the surface of the copper seed layer to prevent oxidation reaction of the copper seed layer. Then the semiconductor substrate is immersed in the copper ion solution to perform an electrochemical deposition (ECD) reaction and a copper contact structure is formed in the opening, wherein the capping layer can form a wrong compound in the copper ion solution and detach from the copper seed. Layer surface ° Description of the diagram: Through the following detailed description combined with the attached diagrams, the above content and the many advantages of this invention can be easily understood, of which: The guide of the plate crystal ship is the structure of the first step in the figure. The bottom guide of the copper forming upper material is transmitted in the system. According to the root, it is shown as 0 ^ 0. Yes, J with 3 Η ® ® ^ ® Load one load-one piece asMBg 胄 U 胄 guide, guide half-ff half is the material picture Figure II 材 III II The first guide half in the junction contact copper forming upper substrate The guide of the semi-annual technique of the actual step is shown in the figure. The guide of the crystal shown in the figure is shown in Figure 4.显 接 结 夂 面 # Cheng truncated copper Λ The 1-shaped piece 1 crystal ± material g, bone, body + body-picture + 夂 5 4 «## Shi Shi Di Mingfa According to the picture shown on the surface, the guide of the piece of crystal is shown in Figure 6 and the contact copper The guide of the substrate of the forming material is explained in detail in the example. The paper dimensions are applicable to the Chinese National Standard (CNS) A4 (210x 297 mm). Τ 11 — 面 ^ -----— II Order · —---- 1 (Please read the precautions on the back before filling this page) § A7 B7 V. Description of the invention () (Please read the intentions on the back before filling this page) The present invention provides a new method for Forming a copper contact structure in the contact hole ° Among them, by adding a transition metal in the process of forming a steel seed layer, the stability of the copper seed layer can be improved 'and the copper atoms are prevented from reacting with oxygen to generate copper oxide . In addition, after the copper seed layer is deposited, a transition metal layer may be formed thereon to achieve the effect of avoiding the formation of copper oxide. It is worth noting that when the electrochemical deposition process is started, when the semiconductor substrate is immersed in a copper ruthenate solution, the transition metal mentioned above can chelate with sulfuric acid to form the wrong compound, thereby achieving the purpose of automatic removal. A detailed description of the present invention is as follows. Referring to the third figure, in the first embodiment provided by the present invention, 'a single crystal silicon substrate 10 with < 100: > crystal orientation is provided. Generally speaking, other types of semiconductor materials, such as gaUium arsenide, germanium, or a silicon substrate (siHcon insulator (SOI)) on the insulating layer can be used as a semiconductor substrate. 'Because of the characteristics of the surface of the semiconductor substrate, for the present invention, it will not cause a special effect.' Depending on its crystal orientation, the employee's consumer cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs can also choose to print clothes and then form it on the semiconductor substrate 102. The dielectric layer 104 is used for insulation. What is to be explained here is that before the dielectric layer 104 is formed, various active elements, passive elements, peripheral circuits, and the like necessary for manufacturing integrated circuits have been formed on the surface of the semiconductor substrate 102. That is, the functional conductor layer and the material layer on the two surfaces of the material conductor substrate already have various required layers. In a preferred embodiment, the dielectric layer 104 may be formed of silicon oxide or silicon nitride. Generally speaking, using chemical vapor deposition (CVD) with tetraethyl silicate (TEE ^) at a temperature of about 600 to 800 ° C, and a pressure of about (^ to 10iOr ^), oxygen-based paper can be formed. Applicable to China National Standard (CNS) A4 (210 X 297 cm) A7
五、發明說明（） & *夕；或著也可以利用熱氧化的方式來形成氧化矽。至於 氮化石夕則可在大約400至450。<：的爐中形成，製程中的反 應氣體是SiH4，n20及NH3。此外，也可利用四乙基矽酸 鹽（Τ Ε Ο s)作為反應材料，並加入硼、磷原子，以低壓化 學氣相沉積法（LPCVD)形成硼磷矽玻璃（BPSG)，來作為上 述之介電層104。 然後’可藉由傳統微影及蝕刻技術在介電層104上定 義出如接觸孔1〇6之開口圖案，以曝露出半導體底材1〇2 之上表面。一般而言，可先在介電層1〇4之上形成一光阻 以定義接觸孔圖案，並作為後續蝕刻製程之罩幕。接著對 介.電層104進行蝕刻程序，以形成接觸孔1〇6於半導體底材 1 02上。在一較佳實施例中，可使用電漿蝕刻術來形成接 觸孔1 0 6。其中，用以移除氧化矽之蝕刻劑可選擇cci 2 F 2,、 CHF3/CF4、CHF3/〇2、CH3CHF2、CF4/〇2。至於用以移除 氮化矽之蝕刻劑則可選擇CF 4/H 2、CHF 3或CH 3CHF 2。 仍請參照第三圊，接著形成一氮化鈦（TiN)層108於接 觸孔106之側壁與所曝露的半導體底材1〇2上表面，以作為 阻障層，用以防止後續所形成之鋼層與介電層104與半導 艘底枯102彼此發生擴散現象，而造成尖峰效應（spiking effect)。在一較佳實施例中，可使用氮化反應（Nitridation) (請先閱讀背面之注意事項再填寫本頁) 經濟部智慧財產局員工消費合作社印製 以表，上 序02 程1 鍍材 滅底 行體 進導 先半 首與 。 壁 8 ο 側 *1 層之 欽06 化L1 Eii 爾 需ί 所於 成層 形鈦 來一 程積 製沉 之化 需氣 所成 成形 形來 而序 理程 處鍍 溫濺 高性 由應 經反 r 用 中利 境可 環也 的， 3 hi Η夕 Ν此 或8, 2 ο Ν 1 於層 再欽 -化 面氣 本紙張尺度適用令國國家標準（CNS)A4規格（210 X 297公楚）V. Description of the invention () & * Xi; Or it can also use thermal oxidation to form silicon oxide. As for nitride nitride, it can be around 400 to 450. <: formed in a furnace, and the reaction gases in the process are SiH4, n20, and NH3. In addition, it is also possible to form borophosphosilicate glass (BPSG) by using low pressure chemical vapor deposition (LPCVD) using tetraethyl silicate (T E 0 s) as a reaction material and adding boron and phosphorus atoms. The dielectric layer 104. Then, an opening pattern such as a contact hole 106 can be defined on the dielectric layer 104 by a conventional lithography and etching technique to expose the upper surface of the semiconductor substrate 102. Generally speaking, a photoresist can be formed on the dielectric layer 104 to define a contact hole pattern, and it can be used as a mask for the subsequent etching process. Then, an etching process is performed on the dielectric layer 104 to form a contact hole 106 on the semiconductor substrate 102. In a preferred embodiment, the contact holes 106 can be formed using plasma etching. Among them, cci 2 F 2, CHF3 / CF4, CHF3 / 〇2, CH3CHF2, CF4 / 〇2 can be selected as an etchant for removing silicon oxide. As the etchant for removing silicon nitride, CF 4 / H 2, CHF 3 or CH 3CHF 2 can be selected. Still referring to the third step, a titanium nitride (TiN) layer 108 is then formed on the sidewall of the contact hole 106 and the upper surface of the exposed semiconductor substrate 102 as a barrier layer to prevent subsequent formation. The steel layer, the dielectric layer 104, and the semi-conductor bottom substrate 102 diffuse to each other, causing a spiking effect. In a preferred embodiment, Nitridation can be used (please read the precautions on the back before filling this page). The table is printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs. The bottom row leads into the first half. Wall 8 ο side * 1 layer of Chin 06 Hua L1 Eii er need ί The layered titanium is used to accumulate the forming of Shen ’s chemical gas in one pass, and the high temperature of the plating at the sequence process should be reflected r It is also possible to use the medium and good environment, 3 hi Η 夕 Ν this or 8, 2 ο Ν 1 in the layer to re-Qin-Hua face gas This paper size applies the national national standard (CNS) A4 specifications (210 X 297) )
42431P A7 B7 五、發明說明（〉 ί锖先閱讀背面之注意事項再填寫本頁) 鈦層108。藉著利用電漿離子轟擊鈦金屬，且通入氬氣與 氮氣，以便經轟擊所濺出的鈦原子，可與經由解離反應 (Dissociation Reaction)所形成的氣原子，反應並形成氮 化鈦而沉積於半導體底材表面= 然後，形成銅晶種層（Cu seeding layer)110於該氣化 鈦層108表面上。其中值得注意的是在形成銅晶種層110 的程序中，並加入約0.0 1 %〜1 0°/。的過渡金屬摻質。亦即， 形成過渡金屬與銅原子所構成之合金層來作為銅晶種層 110。其中，由於過渡金屬在大氣中具有較穩定（stable) 之性質，是以在加入銅晶種層I 1 0後，可有效的提昇銅晶 種層1 1 0之穩定性，而達到降低銅原子發生氧化反應之機 會。其中，在一較佳實施例中，該銅晶種層Π 0可使用熟 知技術，諸如物理氣相沉積法（Physical vapor deposition; PVD)、濺鍍法等類似製程而加以形成，且具有約50至80 埃之厚度。至於所摻入之過渡金屬摻質可選擇鋁、鈦、鋅、 鎂、锆或其它過渡金屬及其任意組合。 經濟部智慧財產局員工消費合作社印製 接著，該參照第四圖，將該半導體底材1 02沉浸於一 硫睃铜溶液中，以進行電化學沉積（Electrical Chemical Deposition; ECD)反應，而形成銅接觸結構112於該接觸孔 106中。其中值得注意的是，由於位於銅晶種層110中之過 渡金屬摻雜物，在硫酸銅溶液令極容易溶解，且會與硫酸 根進行螫合反應並形成錯化合物，而脫離銅晶種層110。 因此，可藉著將半導體底材102置放於硫酸銅溶液中，而 達到移除過渡金屬掺雜物之目的。 本紙張尺度適用中國國家標準（CNS)A4規格<210x297公爱） 424§ 1 § A7 B7 五、發明說明（） {請先閱讀背面之注意事項再填寫本頁) 此外，藉著將銅晶種層110電性連接至一電源之陰 極，可以使位於硫酸銅溶液中之銅離子，進行還原並沉積 於該銅晶種層110之表面。亦即可經由進行電鍍程序，而 使銅原子沉積於銅晶種層1 1 0表面，而形成銅接觸結構丨i 2 於接觸孔106之中-一般而言’所形成之銅接觸結構U2 除了可作為介電層間銅連線（via)外，亦可用以作為銅導 電插塞（plug)。 再請參照第五圖，該圖所顯示為本發明之第二實施 例。其中’如同前述’首先形成介電層104於半導體底材 1 0 2上，且藉著使用傳統的微影姓刻製程，而形成諸如接 觸扎106之開口圊案於介電層104上，並曝露出半導體底材 102之上表面。然後’依序形成氮化鈦（TiN)層1〇8或氮化 钽（TaN)於接觸孔106侧壁與所曝露的半導體底材1〇2上表 面，以作為阻障層。並且’使用物理氣相沉積法形成銅晶 種層（Cu seeding layer) 110於該氮化鈦層表面上。 經濟部智慧財產局員工消費合作社印製 然後’形成一過渡金層蓋層111於該銅晶種層110之表 面，用以避免銅晶種層110與大氣接觸，而發生氧化反應3 其中，如同上述，由於過渡金屬在大氣令具有較穩定 (stable)之性質，是以在覆蓋於銅晶種層110表面上後，將 可有效的防止銅晶種層Π0中之銅原子與氧發生作用。在 一較佳實施例中，過渡金屬蓋層111之材質可選擇鋅、鎳、 鈷、鎂、鈣或其任意組合。 接著，該參照第六圖，如同前述，將半導體底材102 沉浸於一硫酸銅溶液中，以進行電化學沉積（Electrical 9 本紙張尺度適用中围國家標準（CNS)A4規格（2〗0 >^97公釐） 經濟部智慧財產局員工消費合作社印製 424 綱 A7 _____B7__ 五、發明說明（）42431P A7 B7 V. Description of the invention (〉 Please read the precautions on the back before filling this page) Titanium layer 108. By bombarding titanium metal with plasma ions, and passing in argon and nitrogen, the titanium atoms splashed by the bombardment can react with the gas atoms formed through the dissociation reaction to form titanium nitride. Deposited on the surface of the semiconductor substrate = Then, a Cu seeding layer 110 is formed on the surface of the vaporized titanium layer 108. It is worth noting that in the process of forming the copper seed layer 110, about 0.0 1% to 10 ° / is added. Transition metal dopants. That is, an alloy layer composed of a transition metal and copper atoms is formed as the copper seed layer 110. Among them, since the transition metal has a stable property in the atmosphere, the stability of the copper seed layer 1 1 10 can be effectively improved after adding the copper seed layer I 1 0 to reduce the copper atoms. Chance of oxidation reaction. Among them, in a preferred embodiment, the copper seed layer Π 0 can be formed by using a well-known technique, such as physical vapor deposition (PVD), sputtering, or the like, and has a thickness of about 50%. Up to 80 angstroms. As for the transition metal dopants to be incorporated, aluminum, titanium, zinc, magnesium, zirconium or other transition metals and any combination thereof can be selected. Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economy Next, referring to the fourth figure, the semiconductor substrate 102 is immersed in a copper thiosulfide solution to perform an Electrochemical Chemical Deposition (ECD) reaction to form The copper contact structure 112 is in the contact hole 106. It is worth noting that, due to the transition metal dopant in the copper seed layer 110, it is extremely easy to dissolve in the copper sulfate solution, and it will undergo a coupling reaction with sulfate and form the wrong compound, leaving the copper seed layer 110. Therefore, the purpose of removing the transition metal dopant can be achieved by placing the semiconductor substrate 102 in a copper sulfate solution. This paper size applies to China National Standard (CNS) A4 specifications < 210x297 public love) 424§ 1 § A7 B7 V. Description of the invention () {Please read the notes on the back before filling this page) In addition, by adding copper crystal The seed layer 110 is electrically connected to a cathode of a power source, so that copper ions in a copper sulfate solution can be reduced and deposited on the surface of the copper seed layer 110. That is, by performing a plating process, copper atoms are deposited on the surface of the copper seed layer 1 10 to form a copper contact structure 丨 i 2 in the contact hole 106-generally speaking, the formed copper contact structure U2 In addition to being used as a copper via between dielectric layers, it can also be used as a copper conductive plug. Please refer to the fifth figure, which shows a second embodiment of the present invention. Among them, as described above, a dielectric layer 104 is first formed on a semiconductor substrate 102, and an opening such as a contact 106 is formed on the dielectric layer 104 by using a conventional lithography process, and The upper surface of the semiconductor substrate 102 is exposed. Then, a titanium nitride (TiN) layer 108 or tantalum nitride (TaN) is sequentially formed on the sidewall of the contact hole 106 and the surface of the exposed semiconductor substrate 102 as a barrier layer. And a Cu seeding layer 110 is formed on the surface of the titanium nitride layer using a physical vapor deposition method. Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs and then 'formed a transitional gold layer cover layer 111 on the surface of the copper seed layer 110 to prevent the copper seed layer 110 from coming into contact with the atmosphere, and an oxidation reaction3 occurs. As mentioned above, because the transition metal has a stable property in the atmosphere, after covering the surface of the copper seed layer 110, the copper atoms in the copper seed layer Π0 can be effectively prevented from interacting with oxygen. In a preferred embodiment, the material of the transition metal cap layer 111 can be selected from zinc, nickel, cobalt, magnesium, calcium, or any combination thereof. Next, referring to the sixth figure, as described above, the semiconductor substrate 102 is immersed in a copper sulfate solution for electrochemical deposition (Electrical 9) This paper is applicable to the China National Standard (CNS) A4 specification (2) 0 > ^ 97mm) Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs, 424 A7 _____B7__ V. Description of the Invention ()
Chemical Deposition; ECD)反應，並形成銅接觸結構112 於接觸孔106中。此時，覆蓋於銅晶種層11〇上之過渡金屬 蓋層’會在硫酸銅溶液_溶解，並經由螫合反應而形成錯 化合物而加以移除。是以藉著將銅晶種層n 〇電性連接至 一電源之陰極，將可使硫酸銅溶液中之銅離子，沉積於銅 晶種層1 1 0之表面，而形成所需之銅接觸結構1 1 2。 本發明具有許多優點。首先，藉著在形成銅晶種層 時’加入過渡金層摻雜物，將可有效提高所形成銅晶種層 之穩定性，並降低銅原子與氧氣發生反應，形成氡化鋼之 機會。特別是，在後續進行電化學反應時，在將半導體底 材沉浸於硫酸銅溶液中時，所掺入之過渡金屬原子’可與 硫酸根發生蝥合反應，形成錯化合物而達到自動移除的效 果。同樣的，在本發明的第二實施例中，則形成過渡金屬 層以復蓋於鋼晶種層上，如此除了可更完整有效的達成防 止過渡金屬層氧化的效果外，更可在沉浸於硫酸銅落液中 +時，達成自動移除的效果。是以就整個製程而言’不需進 行額外的步驟，且製程週期亦不致延長°更重要的是可有 效的避免鋼晶種層與氧氣發生反應，因此將可大幅提昇銅 接觸結構之良率。 本發明雖以一較佳實例闡明如上，然其並非用以限定 本發明精神與發明實體，僅止於此一實施例爾。對熟悉此 領域技藝者，在不脫離本發明之精神與範圍内所作之修 改，均應包含在下述之申請專利範圍内。 本紙張尺度適用中國國家標準（CNS>A4規格（210 X 297公釐） t — I — — 1ft — · I I i I I I I I I » — — — — — — 1' -- 0 (請先閱讀背面之注意事項再填寫本頁>Chemical Deposition; ECD) reaction, and a copper contact structure 112 is formed in the contact hole 106. At this time, the transition metal capping layer 'covering the copper seed layer 11 will be dissolved in the copper sulfate solution, and the compound will be removed through the coupling reaction. The copper seed layer n 0 is electrically connected to the cathode of a power source, so that copper ions in the copper sulfate solution can be deposited on the surface of the copper seed layer 1 10 to form the required copper contact. Structure 1 1 2. The invention has many advantages. First, by adding a transition gold layer dopant when the copper seed layer is formed, the stability of the copper seed layer formed can be effectively improved, and the chance of copper atoms reacting with oxygen to form a hafnium steel is reduced. In particular, in the subsequent electrochemical reaction, when the semiconductor substrate is immersed in a copper sulfate solution, the incorporated transition metal atom 'can react with sulfate to form a wrong compound to achieve automatic removal. effect. Similarly, in the second embodiment of the present invention, a transition metal layer is formed to cover the steel seed layer, so that in addition to the effect of preventing the transition metal layer from being oxidized more completely and effectively, it can be immersed in When copper sulfate falls into the liquid, the effect of automatic removal is achieved. In terms of the entire process, 'no additional steps are required, and the process cycle is not prolonged.' More importantly, it can effectively prevent the steel seed layer from reacting with oxygen, so the yield of the copper contact structure can be greatly improved. . Although the present invention is explained as above with a preferred example, it is not intended to limit the spirit and the inventive substance of the present invention, but only to this embodiment. For those skilled in the art, modifications made without departing from the spirit and scope of the present invention should be included in the scope of patent application described below. This paper size applies to Chinese national standard (CNS > A4 specification (210 X 297 mm) t — I — — 1ft — · II i IIIIII »— — — — — — 1 '-0 (Please read the notes on the back first Fill this page again>