TW410441B - Manufacturing method for dielectric layer of capacitor - Google Patents

Manufacturing method for dielectric layer of capacitor Download PDF

Info

Publication number
TW410441B
TW410441B TW088110830A TW88110830A TW410441B TW 410441 B TW410441 B TW 410441B TW 088110830 A TW088110830 A TW 088110830A TW 88110830 A TW88110830 A TW 88110830A TW 410441 B TW410441 B TW 410441B
Authority
TW
Taiwan
Prior art keywords
titanium
dielectric layer
metal organic
patent application
capacitor
Prior art date
Application number
TW088110830A
Other languages
Chinese (zh)
Inventor
Guo-Tai Huang
Tsuei-Rung You
Original Assignee
United Microelectronics Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by United Microelectronics Corp filed Critical United Microelectronics Corp
Priority to TW088110830A priority Critical patent/TW410441B/en
Application granted granted Critical
Publication of TW410441B publication Critical patent/TW410441B/en

Links

Landscapes

  • Semiconductor Integrated Circuits (AREA)

Abstract

A manufacturing method for dielectric layer of capacitor is disclosed. The method uses the organic tantalum alkoxyl composite and the organic composite composed of titanium alkoxyl or titanium amide composite as the precursor to perform an organic metal chemical vapor deposition process to form the tantalum titanium oxide dielectric. The tantalum titanium oxide dielectric layer of the present invention is for single phase which can adjust the ratio of precursors to get high dielectric constant.

Description

4775twf.doc/ 辦0441 A7 B7 五'發明説明(丨) 本發明是有關於一種動態隨機存取記憶體(Dynamic Random Access Memory,DRAM)的製造方法,且特別是 HI In m» HH —^ϋ 士 、 J/u^ (請先閲讀背面之注意事項再填寫本頁) 有關於一種電容器之氧化鉬鈦介電層的製造方法。 當電腦微處理器功能逐漸增強、軟體所進行的程式與 運算愈來愈龐大時,記憶體的電容需求也就愈來愈高。而 隨著動態隨機存取記憶體積集度的增加,目前所發展之記 憶胞係由一個轉移場效電晶體與一個儲存電容器所構 成。 由於電容器爲DRAM藉以儲存訊號的心臟部位,當電 容器所儲存的電荷愈多,讀出放大器在讀取資料時受雜訊 的影響也就愈小。通常用以增加儲存電荷能力的方法可以 藉由增加電容器的面積、使用高介電常數的介電膜層、或 是減少介電層的厚度以達到目的。 雖然減少介電層的厚度可以增加儲存之電容量,但是 介電層的厚度並不能隨意地減少,而必須考量介電層厚度 過薄所導致的電場崩潰等因素,因此,介電層的厚度減少 到某一厚度之後即到達極限値。 經濟部智慧財產局員工消費合作社印製 基於介電層厚度的限制,目前的電容器係藉由電容器 之有效面積的增加以及高介電常數之介電層的使用,以達 到提昇儲存電容量的目的。 隨著積體電路元件的高度積集化’增加電容器有效面 積的方法,已需要利用三度空間的電容器來實現,例如所 謂的堆疊型(Stacked Type)或溝槽型(TrenCh Type)電 容器。但是,當記憶元件邁入下一世代之後’藉由三度空 間變化以增加電容器有效面積的方式仍有其限制存在。而 本紙張尺度適用中國國家襟率(CNS ) A4規格(210 X 297公釐) A7 B7 410441 4775twf,doc/008 五、發明説明(> ) 已發展的高介電常數之介電層則有五氧化二鉋(Ta2〇5)、 Pb(Zr,Ti)03,艮PZT 以及(Ba, Sr)Ti03,民[I BST。五氧化 二鉅的介電常數約爲2〇_25;BST的介電常數約爲2〇_6〇〇 ; PZT的介電常數約爲600-1000左右。 在上述三類型的介電層中,由於五氧化二鉬的製程與 傳統以氧化物/氮化物/氧化物結構作爲介電層的製程相容 性最局,而且以五氧化二鉬作爲介電層亦能符合目前儲存 電容量的需要,因此,現今所發展的電容器保以五氧化二 鉅作爲介電層。 然而’習知五氧化二钽在形成之後必須經由再結晶的 製程,以純化並強化其結構,而此再結晶過程中所使用氧 氣容易使複晶矽下電極發生氧化,而在複晶矽下電極與五 氧化二鉬介電層之間形成一層氧化層。由於氧化層的介電 常數較低,因此以習知方法形成的氧化二鉬介電層,其介 電常數並無法達到其基値25,而只有15左右。緣此,習 知方法所形成之五氧化二鉬介電層,並無法滿足未來元件 進一步高度積集化之後高儲存電容量的需求,而必須以 BST、PZT等高介電常數之介電材質替代。 但是’使用BST、. PZT作爲介電層時,由於介電常數 過高,容易造成漏電的行爲,因此,其製程必須多重的考 量,而且以BST、PZT作爲介電層亦將面臨整體製程相容 性的問題,因此並不易與目前的製程整合。 本發明提出一種電容器之介電層的製造方法,此方法 係以鉬金屬有機化合物與鈦金屬有機化合物爲前趨物,進 行一有機金屬化學氣相沉積製程,以形成一氧化钽鈦介電 4 本紙張尺度適用中國國家標準(CNS ) A4規格(210X297公釐) (請先閲讀背面之注意事項再填寫本頁) 經濟部智慧財產局員工消費合作社印製 - - 一 I .14 n . ----^^1 ^^1 - 1 - - .....I an n HW- —^ϋ I - - 11 1^1 n - - m、一^- - - - I ^^1 - -- --\v ^ I - I; In In IT ' I i 經濟部智慧財產局員工消費合作社印製 410441 4775twf.doc/008 五、發明説明(>7 ) 0 依照本發明實施例所述,上述之钽金屬有機化合物包 括選自於五-乙氧基化鉅(Tantalum penta-ethoxide, Ta(C2H50)5)、四乙氧基-二甲胺乙氧基化钽(Tantalum tetraethoxy dimethylaminoethoxide ,4775twf.doc / Office 0441 A7 B7 Five 'invention description (丨) The present invention relates to a method for manufacturing a dynamic random access memory (Dynamic Random Access Memory, DRAM), and in particular HI In m »HH — ^ ϋ Taxi, J / u ^ (Please read the notes on the back before filling out this page) About a manufacturing method of Molybdenum Titanium Dioxide dielectric layer for capacitors. As computer microprocessors become more powerful and programs and calculations performed by software become more and more large, the capacitance requirements of memory will become higher and higher. With the increase of the dynamic random access memory volume concentration, the currently developed memory cell system consists of a transfer field effect transistor and a storage capacitor. Since the capacitor is the heart of the DRAM where the signal is stored, the more charge the capacitor stores, the less the sense amplifier will be affected by noise when reading data. The methods commonly used to increase the charge storage capacity can be achieved by increasing the area of the capacitor, using a dielectric film layer with a high dielectric constant, or reducing the thickness of the dielectric layer. Although reducing the thickness of the dielectric layer can increase the storage capacity, the thickness of the dielectric layer cannot be reduced arbitrarily, and factors such as the collapse of the electric field caused by the thickness of the dielectric layer must be considered. Therefore, the thickness of the dielectric layer After reducing to a certain thickness, the limit 値 is reached. Printed by the Consumer Cooperative of Intellectual Property Bureau of the Ministry of Economic Affairs based on the thickness of the dielectric layer, the current capacitors are used to increase the effective area of the capacitor and the use of a high-k dielectric layer to achieve the purpose of increasing the storage capacity. . With the increasing integration of integrated circuit components, a method of increasing the effective area of a capacitor has been required to be realized by using a three-dimensional capacitor, such as a so-called Stacked Type or TrenCh Type capacitor. However, after the memory device enters the next generation, its limitation of increasing the effective area of the capacitor by a three-degree spatial change still exists. And this paper size applies to China's National Standard (CNS) A4 specification (210 X 297 mm) A7 B7 410441 4775twf, doc / 008 V. Description of the invention (>) The developed high dielectric constant dielectric layer has Second pentoxide (Ta205), Pb (Zr, Ti) 03, PZT and (Ba, Sr) Ti03, [I BST. The dielectric constant of pentoxide is about 20-25; the dielectric constant of BST is about 20-60; the dielectric constant of PZT is about 600-1000. Among the above three types of dielectric layers, the process of molybdenum pentoxide is most compatible with the traditional process of using oxide / nitride / oxide structure as the dielectric layer, and molybdenum pentoxide is used as the dielectric. The layer can also meet the needs of the current storage capacitance. Therefore, the capacitors developed today use pentoxide as the dielectric layer. However, 'the conventional tantalum pentoxide must be recrystallized after the formation to purify and strengthen its structure, and the oxygen used in this recrystallization process easily oxidizes the electrodes under the polycrystalline silicon, and under the polycrystalline silicon An oxide layer is formed between the electrode and the dielectric layer of molybdenum pentoxide. Due to the low dielectric constant of the oxide layer, the dielectric constant of the molybdenum oxide dielectric layer formed by the conventional method cannot reach its base 値 25, but only about 15. For this reason, the molybdenum pentoxide dielectric layer formed by the conventional method cannot meet the needs of future high-capacity storage elements after high-level accumulation. Instead, high-constant dielectric materials such as BST and PZT must be used. Instead. However, when using BST, .PZT as the dielectric layer, the dielectric constant is too high, and it is easy to cause leakage. Therefore, its process must be considered multiple times, and BST and PZT as the dielectric layer will also face the overall process phase. Capacitive issues, so it is not easy to integrate with the current process. The invention provides a method for manufacturing a dielectric layer of a capacitor. This method uses a molybdenum metal organic compound and a titanium metal organic compound as precursors, and performs an organometallic chemical vapor deposition process to form a tantalum oxide dielectric. 4 This paper size applies to China National Standard (CNS) A4 (210X297 mm) (Please read the precautions on the back before filling out this page) Printed by the Intellectual Property Bureau of the Ministry of Economic Affairs Consumer Cooperatives--I.14 n.- -^^ 1 ^^ 1-1--..... I an n HW--^ ϋ I--11 1 ^ 1 n--m, one ^----I ^^ 1-- -\ v ^ I-I; In In IT 'I i Printed by the Consumers ’Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs 410441 4775twf.doc / 008 V. Description of the invention (> 7) 0 According to the embodiment of the present invention, the above The tantalum metal organic compounds include those selected from the group consisting of penta-ethoxylated giant (Tantalum penta-ethoxide, Ta (C2H50) 5), and tantalum tetraethoxy dimethylaminoethoxide,

Ta(C2H50)4(C4H1QN0))、四乙氧基-四甲基庚二醇鉅 (Tantalum tetraethoxy tetramethylheptanedionate , Ta(C2H50)4(CnH1902))、四甲氧基-四甲基庚二醇钽 (Tantalum tetramethoxy tetramethylheptanedionate , TatCHsOMCnH^C^))、四異丙氧基-四甲基庚二醇鉅 (Tantalum tetra-i-propoxy tetramethylheptanedionate , Ta(C3H70)4(C, 902))所組成之烷氧基化鉬金屬族群之其 中一種,或是三-二乙胺·新丁亞胺化鉬(Tantalum tris-diethylamido-t>butylimide,(C4H10N)3Ta(NC4H9)) 〇 上述之鈦金屬有機化合物包括烷氧基化鈦或胺基化鈦 化合物。烷氧基化鈦係選自於四-異丙氧基化鈦(Titanium tetra-i-propoxide,Ti(C3H70)4)' 二-異丙氧基化駄(Titanium di-i-propoxide,Ti(C3H70)2)、二-異丙氧基-二-二甲胺乙氧 基化欽(Titanium di-i-propoxy bidimethylaminoethoxide, Ti(C3H70)2(C4H1()N0)2)、二-乙氧基-二二甲胺乙氧基化鈦 (Titanium diethoxy bidimethylaminoethoxide , Ti(C3H70)2(C4HlcN0)2)與四-新丁氧基化鈦(Titanium tetrakis-t-butoxide,Ti(C4H90)4)所組成之族群之其中一 種。胺基化鈦化合物係選自於四-二乙胺基化鈦(Titanium tetrakis-diethylamide,Ti(C8H10N)4)、四-二甲胺基化鈦 5 本紙張尺度適用中國國家標隼(CNS ) A4规格(210X297公釐) -----J---- (請先閱讀背面之注意事項再填寫本頁) 、?Ta (C2H50) 4 (C4H1QN0)), tetraethoxy-tetramethylheptanediol (Tantalum tetraethoxy tetramethylheptanedionate, Ta (C2H50) 4 (CnH1902)), tetramethoxy-tetramethylheptanediol tantalum ( Tantalum tetramethoxy tetramethylheptanedionate, TatCHsOMCnH ^ C ^)), Tantalum tetra-i-propoxy tetramethylheptanedionate, Ta (C3H70) 4 (C, 902)) One of the molybdenum metal groups, or tris-diethylamine · nebutimide (Tantalum tris-diethylamido-t > butylimide, (C4H10N) 3Ta (NC4H9)) 〇 The above titanium metal organic compounds include alkoxy Titanium or ammonium titanium compounds. Titanium alkoxylate is selected from Titanium tetra-i-propoxide (Ti (C3H70) 4) 'Titanium di-i-propoxide, Ti ( C3H70) 2), Titanium di-i-propoxy bidimethylaminoethoxide, Ti (C3H70) 2 (C4H1 () N0) 2), di-ethoxy -Titanium diethoxy bidimethylaminoethoxide (Ti (C3H70) 2 (C4HlcN0) 2) and Titanium tetrakis-t-butoxide (Ti (C4H90) 4) One of the ethnic groups. The titanium aminated compound is selected from the group consisting of Titanium tetrakis-diethylamide (Ti (C8H10N) 4), titanium tetrakis-diethylamide (5). This paper is applicable to the Chinese National Standard (CNS) A4 specification (210X297mm) ----- J ---- (Please read the precautions on the back before filling this page),?

經濟部智慧財產局員工消費合作社印製 410441 A7 4775twf.doc/008 B7 五、發明説明(6) (Titanium tetrakis-dimethylamide,Ti(C2H6N)4)所組成之族 群之其中一種。 由於本發明之氧化鉅鈦介電層中含有具有較高介電常 數之鈦金屬’因此可以使電容器之介電層的介電常數提升 至25以上。 此外’由於本發明之氧化鉅鈦介電層係以有機金屬化 學氣相沉積法形成,因此所形成之氧化鉬鈦介電層具有良 .好的階梯覆蓋能力,可以減少漏電的現象。而且,由於本 發明之氧化鉅鈦介電層在半導體元件的後續製程溫度之 下均能保持單一相,並不會發生相轉移的現象,故而,可 以增加元件的可靠度。 另’由於本發明之氧化鉅鈦介電層的沉積溫度約在攝 氏38〇度至攝氏500度之間,因此可以降低熱預算。 而且’由於本發明之氧化鉅鈦介電層係以鉅金屬有機 化合物與鈦金屬有機化合物爲前趨物,利用有機金屬化學 氣相沉積法所彤成者,因此,可以藉由鉅金屬有機化合物 與鈦金屬有機化合物所佔之莫耳百分比,以調控所形成之 氧化妲鈦介電層之中的鉬與鈦的莫耳比,進而得到具有高 介電常數,且少漏電現象之氧化鉅鈦介電層。 此外,由於本發明之製程可以相容於習知以五氧化二 鉅作爲介電層之製程當中,因此本發明之方法易於製彳呈之 整合。 再者,本發明之氧化鉅鈦介電層可以形成於具有半球 型砂晶粒層的下電極之上,因此本發明除了可以透過具 有局介電常數之氧化鉬鈦介電層的形成來提昇電容g之 6 本紙張尺度適用中國國家輕準(CNS ) A4規格(210 X :297公釐) -------‘--裝------訂 (請先閲讀背面之注意事項再填窝本頁) 410441 A7 4775twf.doc/008 D _ D / 五、發明説明(夕) 儲存電容値之外,亦可以進一步藉由半球型矽晶粒的彤 成,以達到增加電容器之儲存電容値的目的,而不需以BST 或PZT製作介電層,避免以BST或?2丁製作介電層時所 衍生製程相容性的問題。 爲讓本發明之上述目的、特徵、和優點能更明顯易懂, 下文特舉較佳實施例,並配合所附圖式,作詳細說明如 下: 圖式之簡單說明: 第1A圖至第1B圖,其繪示依照本發明第一較佳實施 例之一種動態隨機存取記憶體的製造流程剖面圖;以及 第2圖,其繪示依照本發明第一佳實施例之氧化鉅鈦 介電層之製造方法的流程圖。 圖式標記說明: 經濟部智慧財產局員工消費合作社印製 fn^— —HI— vm 1^1^1 ^^^^1 ^^^^1 -,J (請先閲讀背面之注意事項再填寫本頁) 1〇〇 基底 102 場效電晶體 104 位元線 106 介電層 108 節點接觸窗開口 110、116 導體層 112 半球型矽晶粒層 114 氧化鉅鈦介電層 200 钽金屬有機化合物與鈦金屬有機化合物 210 有機金屬化學氣相沉積製程 實施例一 請參照第1A圖至第1B圖,其繪示依照本發明一較佳 7 本紙張尺度適用中國國家標準(CNS ) A4規格(2Η)Χ29”,ϋ 經濟部智慧財產局員工消費合作社印製 410441 J5"775twf. doc/008 五、發明説明(G ) 實施例的一種動態隨機存取記憶體之電容器的製造流程 剖面圖。 首先,請參照第1A圖,提供一基底100,此基底100 例如是已形成場效電晶體102、位元線1〇4以及介電層106 等的半導體矽基底。接著,在基底100上形成一層導體層 110,以塡入介電層106中的節點接觸窗開口(Node Contact Hole)108。導體層110之材質例如爲具有摻雜之複晶矽, 其形成的方法例如爲化學氣相沉積法。 接著,在導體層110的表面上形成一層半球型矽晶粒 (Hemispherical-Grained Silicon,HSG-Si)層 112,以增 加電容器之下電極的表面積°半球型砂晶粒層1 12的形成 方式可以以化學氣相沉積法,或是以選擇性半球型矽晶粒 的技術形成之,其中較佳的方法係以選擇性半球型矽晶粒 之技術,其可以使下電極的表面積提昇2.0倍以上,而且 可以省去一道圖案定義的步驟。 其後,請參照第1B圖,在半球型矽晶粒層1 i2上形成 一層厚度例如爲80埃至200埃的氧化钽鈦(1^2 ?;1^〇5)介 電層1 Μ。本發明之氧化鉅鈦介電層II4的形成方法的示 意圖請參照第2圖。請參照第2圖,本發明之氧化鉅飲介 電層1Μ的形成法’係提供一钽金屬有機化合物與一欽金 屬有機化合物200,然後以鉬金屬有機化合物與鈦金屬有 機化合物爲前趨物’利用有機金屬化學氣相沉積製程 (MOCVD)210,以形成具有單一相的氧化鉬鈦介電層U4。 其較佳的沉積溫度約在攝氏380度至攝氏500度左右。 上述之鉅金屬有機化合物包括烷氧基化鉅金屬,例如Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs 410441 A7 4775twf.doc / 008 B7 V. Description of Invention (6) (Titanium tetrakis-dimethylamide, Ti (C2H6N) 4) is one of the ethnic groups. Since the titanium oxide dielectric layer of the present invention contains titanium metal having a higher dielectric constant, the dielectric constant of the dielectric layer of the capacitor can be increased to more than 25. In addition, because the giant titanium oxide dielectric layer of the present invention is formed by an organometallic chemical vapor deposition method, the formed molybdenum titanium oxide dielectric layer has good step coverage and can reduce the phenomenon of leakage. Moreover, the giant titanium oxide dielectric layer of the present invention can maintain a single phase under the subsequent process temperature of the semiconductor device, and no phase transfer phenomenon will occur. Therefore, the reliability of the device can be increased. In addition, since the deposition temperature of the giant titanium oxide dielectric layer of the present invention is about 38 ° C to 500 ° C, the thermal budget can be reduced. Moreover, since the giant titanium oxide dielectric layer of the present invention uses giant metal organic compounds and titanium metal organic compounds as precursors, and is formed by an organic metal chemical vapor deposition method, a giant metal organic compound can be used. And the molar ratio of titanium metal organic compounds in order to adjust the molar ratio of molybdenum to titanium in the formed titanium hafnium oxide dielectric layer, thereby obtaining giant titanium oxide with high dielectric constant and less leakage. Dielectric layer. In addition, since the process of the present invention can be compatible with the conventional process using pentoxide as the dielectric layer, the method of the present invention is easy to integrate. Furthermore, the giant titanium oxide dielectric layer of the present invention can be formed on a lower electrode having a hemispherical sand grain layer. Therefore, in addition to the invention, the capacitor can be improved by forming a molybdenum titanium oxide dielectric layer having a local dielectric constant. g-6 This paper size is applicable to China National Lightweight (CNS) A4 specification (210 X: 297 mm) -------'-- installation ------ order (please read the precautions on the back first) Refill this page) 410441 A7 4775twf.doc / 008 D _ D / V. Description of the invention (Even) In addition to storage capacitors, you can also further increase the storage capacity of capacitors through the formation of hemispherical silicon grains. For the purpose of capacitors, it is not necessary to use BST or PZT to make the dielectric layer. Avoid BST or? 2 D. Compatibility problems derived from making dielectric layers. In order to make the above-mentioned objects, features, and advantages of the present invention more comprehensible, the following describes specific embodiments in combination with the accompanying drawings in detail as follows: Brief description of the drawings: FIGS. 1A to 1B 2 is a cross-sectional view showing a manufacturing process of a dynamic random access memory according to the first preferred embodiment of the present invention; and FIG. 2 is a view showing a giant titanium oxide dielectric according to the first preferred embodiment of the present invention. A flowchart of a method of manufacturing a layer. Schematic mark description: printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs fn ^ — —HI— vm 1 ^ 1 ^ 1 ^^^^ 1 ^^^^ 1-, J (Please read the precautions on the back before filling (This page) 100 substrate 102 field effect transistor 104 bit line 106 dielectric layer 108 node contact window openings 110, 116 conductor layer 112 hemispherical silicon grain layer 114 titanium oxide dielectric layer 200 tantalum metal organic compound and Titanium organic compound 210 Organic metal chemical vapor deposition process Example 1 Please refer to FIG. 1A to FIG. 1B, which shows a preferred 7 according to the present invention. The paper size is applicable to the Chinese National Standard (CNS) A4 specification (2Η). Χ29 ", 印 Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs 410441 J5 " 775twf. Doc / 008 V. Description of Invention (G) A cross-sectional view of the manufacturing process of a dynamic random access memory capacitor. First, please Referring to FIG. 1A, a substrate 100 is provided. The substrate 100 is, for example, a semiconductor silicon substrate on which a field effect transistor 102, a bit line 104, and a dielectric layer 106 have been formed. Next, a conductive layer is formed on the substrate 100. 110, introduced by 塡The node contact hole 108 in the layer 106. The material of the conductive layer 110 is, for example, doped polycrystalline silicon, and the method of forming the conductive layer 110 is, for example, chemical vapor deposition. Next, on the surface of the conductive layer 110, A Hemispherical-Grained Silicon (HSG-Si) layer 112 is formed thereon to increase the surface area of the electrode below the capacitor. The hemispherical sand crystal layer 1 12 can be formed by chemical vapor deposition, or It is formed by the technology of selective hemispherical silicon grains, and the preferred method is the technology of selective hemispherical silicon grains, which can increase the surface area of the lower electrode by more than 2.0 times, and can omit a pattern definition Thereafter, referring to FIG. 1B, a dielectric layer 1 of titanium tantalum oxide (1 ^ 2 ?; 1 ^ 05) with a thickness of, for example, 80 angstroms to 200 angstroms is formed on the hemispherical silicon grain layer 1 i2. M. For a schematic diagram of the method for forming the titanium oxide dielectric layer II4 of the present invention, please refer to FIG. 2. Referring to FIG. 2, the method for forming the oxide giant dielectric layer 1M of the present invention is to provide a tantalum organic compound With a Chin metal organic Compound 200, and then using a molybdenum metal organic compound and a titanium metal organic compound as precursors to utilize a metal organic chemical vapor deposition process (MOCVD) 210 to form a single-phase molybdenum titanium dielectric layer U4. It is preferred The deposition temperature is about 380 ° C to 500 ° C. The above-mentioned giant metal organic compounds include alkoxylated giant metals, such as

S 本紙張尺度適用中國國家標率(CNS ) A4規格(210X297公釐) -- .. n-n I - - --- - ---- - n· - (請先閱讀背面之注意事項再填寫本頁) A7 B7 410441 4 7 7 5 t w f . d o c / .0 Ο 8 五、發明説明Π ) ------是-係-選-自-方令-五一--乙―氣基-化 I旦-.(-Τ^-η-ί·^1τΐΗΏ—.ρ.6-ρΐ.ΐ-α-6ΐ;-1ι-Θ-χ·Η-ε—,-—-S This paper size is applicable to China National Standards (CNS) A4 specifications (210X297 mm)-.. nn I-----------n ·-(Please read the precautions on the back before filling in this Page) A7 B7 410441 4 7 7 5 twf .doc / .0 〇 8 V. Description of the invention Π) ------ Yes-Department-Selection I 旦-. (-Τ ^ -η-ί · ^ 1τΐΗΏ—.ρ.6-ρΐ.ΐ-α-6ΐ; -1ι-Θ-χ · Η-ε —, ----

Ta(C2H50)5)、四乙氧基-二甲胺乙氧基化鉬(Tantalum tetraethoxy dimethyl am inoethoxide ,Ta (C2H50) 5), molybdenum tetraethoxy-dimethylamine ethoxylate (Tantalum tetraethoxy dimethyl am inoethoxide,

Ta(C2H50)4(C4H1QNO))、四乙氧基-四甲基庚二醇鉅 (Tantalum tetraethoxy tetramethylheptanedionate , Ta(C2H50)4(CnH1902))、四甲氧基-四甲基庚二醇鉬 (Tantalum tetramethoxy tetramethylheptanedionate , TaCC^OMCuH^Od)、四異丙氧基-四甲基庚二醇鉅 (Tantalum tetra-i-propoxy tetramethylheptanedionate , 1^(031170)4(«^ #19〇2))等烷氧基化钽金屬所組成之族群 之其中一種,或是三-二乙胺-新丁亞胺化鉅(丁3加&匕11111^-diethylamido-t-butylimide,(C4Hi〇N)3Ta(NC4H9)),其中較 佳的爲五-乙氧基化钽、四乙氧基-二甲胺乙氧基化钽。 上述之鈦金屬有機化合物包括烷氧基化鈦或胺基化鈦 化合物。烷氧基化鈦係選自於四-異丙氧基化鈦(Titanium tetra-i-propoxide,Ti(C3H70)4)、二-異丙氧基化欽(Titanium di-i-propoxide,Ti(C3H70)2)、二-異丙氧基-二-二甲胺乙氧 基化駄(Titanium di-i-propoxy bidimethylaminoethoxide > Ti(C3H70)2(C4Hl()N0)2)、二-乙氧基-二-二甲胺乙氧基化鈦 (Titanium diethoxy bidimethylaminoethoxide , Ti(C3H70)2(C4H1()NO)2)與四-新丁氧基化鈦(Titanium tetrakis-t-butoxide,Ti(C4H90)4)所組成之族群之其中一 種。胺基化鈦化合物係選自於四-二乙胺基化鈦(Titanium tetrakis-diethylamide,Ti(C8Ht0N)4)、四-二甲胺基化鈦 (Titanium tetrakis-dimethylamide,Ti(C2H6N)4)所組成之族 9 本紙張尺度適用中國國家標準(CNS > A4規格(210X297公釐) ----------ο 裝— {請先閲讀背面之注意事項再填寫本頁) 訂 經濟部智慧財產局員工消費合作社印製 A7 B7 4 7 7 5twf 五、發明説明(飞) 群之其中一種。 本發明之鉬金屬有機化合物與鈦金屬有機化合物可以 在沉積之前預先混合再進行沉積,或是分別以管件輸送鉅 金屬有機化合物與鈦金屬有機化合物,然後於沉積前再經 由臨場混合,以進行沉積之製程。氧化钽鈦介電層114中 所含的妲與鈦含量係決定氧化鉅鈦介電層1丨4之介電常數 高低的關鍵,因此本發明可以藉由鉅金屬有機化合物與鈦 金屬有機化合物的莫耳百分比的控制以調控介電常數,較 佳之氧化钽鈦介電層II4中之鈦含量約是氧化鉅鈦介電層 114之鉬與鈦含量的4%至I5%莫耳百分比,其可以得所 形成之介電常數達到25以上。 由於本發明之氧化鉅鈦介電層114係以有機金屬化學 氣相沉積法形成,因此所形成之氧化妲鈦介電層114具有 良好的階梯覆蓋能力,可以減少漏電的現象。而且,由於 本發明之氧化鉬鈦介電層114在半導體元件的後續製程溫 度之下均能保持單一相,在後續的製程以及製成成品的使 用期間並不會發生相轉移的現象,因此,本發明之氧化钽 鈦介電層可以維持一定的介電常數,以保持元件的特性與 元件的可靠度。 另’由於本發明之氧化鉅鈦介電層的沉積溫度約在攝 氏380度至攝氏500度之間,因此可以降低熱預算。 之後,請參照第1B圖,在氧化钽鈦介電層1 Η上形成 另一層導體層116 ’以作爲上電極。較佳之導體層II6的 材質例如是氮化鈦(TiN),其形成的較佳方法爲化學氣相沉 積法。 10 本紙張尺度適用中國國家標準(CNS ) A4規格(2丨0X 297公釐) -------ilo^------^ (請先聞讀背面之注意事項再填寫本頁) 經濟部智慧財產局員工消費合作社印製 經濟部智慧財產局員工消費合作社印製 410441 A7 4775twf.doc/008 五、發明説明(?) 本發明之氧化組鈦介電層可以形成於具有半球型矽晶 粒層的下電極之上,因此,本發明除了可以透過具有高介 電常數之氧化鉅鈦介電層的形成來提昇電容器之儲存電 容値之外,亦可以進一步藉由半球型矽晶粒的形成,以提 昇儲存電容値。此外,由於本發明之製程可以相容於習知 以五氧化二鉅作爲介電層之製程當中,因此本發明之方法 易於製程之整合。因此,在未來數年內,積體電路製程的 發展中,採用本發明之方法即可以達到預定之儲存電容 値,因此本發明可以延長進入BST、PZT介電層之世代的 時間,也就是,可以提供足夠的準備時間進入BST、PZT 介電層之世代,以避免現今以BST或PZT製作介電層時所 衍生製程相容性的問題。 綜合以上所述,本發明具有下列優點: 1. 由於本發明之氧化鉅鈦介電層中含有具有較高介 電常數之鈦金屬,因此可以使電容器之介電層的介電常數 提升至25以上。 2. 由於本發明之氧化鉅鈦介電層係以有機金屬化學 氣相沉積法形成,因此所形成之氧化鉬鈦介電層具有良好 的階梯覆蓋能力,可以減少漏電的現象。而且,由於本發 明之氧化钽鈦介電層在半導體元件的後續製程溫度之下 均能保持單一相,並不會發生相轉移的現象,故而,可以 增加元件的可靠度。 3. 由於本發明之氧化鉅鈦介電層的沉積溫度約在攝 氏380度至攝氏500度之間,因此可以降低熱預算。 4. 由於本發明之氧化钽鈦介電層係以鉅金屬有機化Ta (C2H50) 4 (C4H1QNO)), tetraethoxy-tetramethylheptanedioate (Tantalum tetraethoxy tetramethylheptanedionate, Ta (C2H50) 4 (CnH1902)), tetramethoxy-tetramethylheptanediol molybdenum Tantalum tetramethoxy tetramethylheptanedionate, TaCC ^ OMCuH ^ Od), Tantalum tetra-i-propoxy tetramethylheptanedionate, 1 ^ (031170) 4 («^ # 19〇2), etc. One of the groups consisting of tantalum oxymetal, or tris-diethylamine-nebutimidated giant (butyl 3 plus < 111111 ^ -diethylamido-t-butylimide, (C4Hi〇N) 3Ta ( NC4H9)), of which tantalum penta-ethoxylate and tetraethoxy-dimethylamine ethoxylate are preferred. The above-mentioned titanium metal organic compounds include titanium alkoxylates or titanium amine compounds. Titanium alkoxide is selected from the group consisting of Titanium tetra-i-propoxide (Ti (C3H70) 4), Titanium di-i-propoxide, Ti ( C3H70) 2), Titanium di-i-propoxy bidimethylaminoethoxide > Ti (C3H70) 2 (C4Hl () N0) 2), di-ethoxy Titanium diethoxy bidimethylaminoethoxide (Ti (C3H70) 2 (C4H1 () NO) 2) and Titanium tetrakis-t-butoxide, Ti (C4H90 ) 4) One of the ethnic groups. The titanium aminated compound is selected from the group consisting of Titanium tetrakis-diethylamide (Ti (C8Ht0N) 4), Titanium tetrakis-dimethylamide (Ti (C2H6N) 4) The paper family is composed of 9 national paper standards (CNS > A4 size (210X297 mm) ---------- ο Installation— {Please read the precautions on the back before filling this page) Order Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs A7 B7 4 7 7 5twf V. One of the invention description (flying) groups. The molybdenum metal organic compound and the titanium metal organic compound of the present invention can be mixed and deposited in advance before the deposition, or the giant metal organic compound and the titanium metal organic compound can be transported by pipe respectively, and then mixed on-site before the deposition to perform the deposition. The process. The content of hafnium and titanium contained in the tantalum titanium oxide dielectric layer 114 is the key to determining the dielectric constant of the giant titanium oxide dielectric layer 1 丨 4. Therefore, the present invention can use the The Moire percentage is controlled to adjust the dielectric constant. The titanium content in the preferred tantalum titanium dielectric layer II4 is about 4% to I5% Moore percentage of the molybdenum and titanium content of the giant titanium oxide dielectric layer 114. It is found that the formed dielectric constant reaches more than 25. Since the giant titanium oxide dielectric layer 114 of the present invention is formed by an organometallic chemical vapor deposition method, the formed hafnium-titanium oxide dielectric layer 114 has a good step coverage ability and can reduce the leakage phenomenon. Moreover, since the molybdenum titanium oxide dielectric layer 114 of the present invention can maintain a single phase under the subsequent process temperature of the semiconductor device, phase transfer does not occur during the subsequent process and the use of the finished product. Therefore, The tantalum oxide titanium dielectric layer of the present invention can maintain a certain dielectric constant to maintain the characteristics of the device and the reliability of the device. In addition, since the deposition temperature of the giant titanium oxide dielectric layer of the present invention is about 380 ° C to 500 ° C, the thermal budget can be reduced. After that, referring to FIG. 1B, another conductive layer 116 'is formed on the tantalum oxide titanium dielectric layer 1' as an upper electrode. A preferred material of the conductive layer II6 is, for example, titanium nitride (TiN), and a preferred method for forming it is a chemical vapor deposition method. 10 This paper size applies to China National Standard (CNS) A4 (2 丨 0X 297 mm) ------- ilo ^ ------ ^ (Please read the precautions on the back before filling this page ) Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs Printed 410441 A7 4775twf.doc / 008 V. Description of the Invention (?) The titanium oxide layer of the present invention can be formed in a hemispherical Above the lower electrode of the silicon grain layer, the invention can not only improve the storage capacity of the capacitor by forming a giant titanium oxide dielectric layer with a high dielectric constant, but also further use a hemispherical silicon crystal. The formation of particles to increase the storage capacitance. In addition, since the manufacturing process of the present invention is compatible with the conventional manufacturing process using pentoxide as the dielectric layer, the method of the present invention is easy to integrate the manufacturing process. Therefore, in the development of the integrated circuit manufacturing process in the next few years, the method of the present invention can be used to achieve the predetermined storage capacitance 値, so the present invention can extend the time to enter the BST, PZT dielectric layer generation, that is, Can provide enough preparation time to enter the generation of BST, PZT dielectric layer, to avoid the process compatibility issues derived from the BST or PZT dielectric layer. In summary, the present invention has the following advantages: 1. Since the titanium oxide dielectric layer of the present invention contains titanium metal having a higher dielectric constant, the dielectric constant of the dielectric layer of the capacitor can be increased to 25. the above. 2. Since the giant titanium oxide dielectric layer of the present invention is formed by an organometallic chemical vapor deposition method, the formed molybdenum titanium oxide dielectric layer has a good step coverage ability and can reduce the leakage phenomenon. In addition, since the tantalum-titanium oxide dielectric layer of the present invention can maintain a single phase at a subsequent process temperature of a semiconductor device, and no phase transition occurs, the reliability of the device can be increased. 3. Since the deposition temperature of the giant titanium oxide dielectric layer of the present invention is about 380 ° C to 500 ° C, the thermal budget can be reduced. 4. As the tantalum oxide titanium dielectric layer of the present invention is organicized with giant metal

1 I 本紙張尺度適用中國國家標準(CNS ) A4規格(210X297公釐) ------,--------ΐτ (請先閱讀背面之注意事項再填寫本頁) A7 B7 410441 775twf,doc/008 五、發明説明(γ ) 合物與鈦金屬有機化合物爲前趨物,利用有機金屬化學氣 相沉積法形成,因此,可以藉由鉬金屬有機化合物與鈦金 屬有機化合物之間的莫耳百分比,以調控所形成之氧化鉅 鈦介電層之中的钽與鈦之間的莫耳比,進而得到具有高介 電常數’且少漏電現象之氧化鉬鈦介電層 5.由於本發明之製程可以相容於習知以五氧化二鉅 作爲介電層之製程當中’因此本發明之方法易於製程之整 合。 本發明之氧化鉅鈦介電層可以形成於具有半球型 矽晶粒層的下電極之上,因此,本發明除了可以透過具有 高介電常數之氧化組鈦介電層的形成來提昇電容器之儲 存電容値之外,亦可以進一步藉由半球型矽晶粒的形成, 以達到增加電容器之儲存電容値的目的,而不需以BST或 PZT製作介電層,避免以BST或PZT製作介電層時所衍生 製程相容性的問題。 雖然本發明已以一動態隨機存取記憶體爲較佳實施例 揭露如上,然其並非用以限定本發明,本發明可以應用於 各種的記憶元件之中,例如是混合電路的電容器之中,故 任何熟習此技藝者,在不脫離本發明之精神和範圍內,當 可作各種之更動與潤飾,因此本發明之保護範圍當視後附 之申請專利範圍所界定者爲準。 本紙張尺度適用中國國家標準(CNS〉A4规格(210 X 297公釐) (請先閲讀背面之注意事項再填寫本頁) 嚳裝------ir---- 經濟部智慧財產局員工消費合作社印製1 I This paper size applies to Chinese National Standard (CNS) A4 specifications (210X297 mm) ------, -------- ΐτ (Please read the precautions on the back before filling this page) A7 B7 410441 775twf, doc / 008 V. Description of the Invention (γ) Compounds and titanium metal organic compounds are precursors and are formed by organometallic chemical vapor deposition. Therefore, it is possible to use molybdenum metal organic compounds and titanium metal organic compounds. Molar percentage in order to adjust the molar ratio between tantalum and titanium in the formed titanium oxide dielectric layer, thereby obtaining a molybdenum titanium oxide dielectric layer with a high dielectric constant and low leakage. 5 Since the process of the present invention can be compatible with the conventional process using pentoxide as the dielectric layer, the method of the present invention is easy to integrate the process. The giant titanium oxide dielectric layer of the present invention can be formed on a lower electrode having a hemispherical silicon grain layer. Therefore, in addition to the invention, the capacitor can be improved by forming a titanium oxide dielectric layer having a high dielectric constant. In addition to the storage capacitor ,, the formation of hemispherical silicon grains can be further used to increase the storage capacitor 値 of the capacitor without the need to make a dielectric layer using BST or PZT, and avoid making a dielectric using BST or PZT. Process compatibility issues. Although the present invention has been disclosed above with a dynamic random access memory as the preferred embodiment, it is not intended to limit the present invention. The present invention can be applied to various memory elements, such as capacitors of hybrid circuits. Therefore, anyone skilled in this art can make various modifications and retouching without departing from the spirit and scope of the present invention. Therefore, the scope of protection of the present invention shall be determined by the scope of the attached patent application. This paper size applies to Chinese national standards (CNS> A4 size (210 X 297 mm) (Please read the precautions on the back before filling out this page)) Outfitting ------ ir ---- Intellectual Property Bureau, Ministry of Economic Affairs Printed by Employee Consumer Cooperative

Claims (1)

4 4 ο 1 4 A8B8C8D8 經濟部智慧財產局員工消費合作社印製 t、申請專利範圍 1. 一種電容器之介電層的製造方法,該方法包括: 提供一鉬金屬有機化合物與一鈦金屬有機化合物;以 及 以該ϋ金屬有機化合物與該鈦金屬有機化合物爲前 趨物’進行一有機金屬化學氣相沉積製程,以形成該介電 層。 2·如申請專利範圍第1項之電容器之介電層的製造 方法’其中’該钽金屬有機化合物包括烷氧基化鉅化合 物。 3.如申請專利範圍第1項之電容器之介電層的製造 方法’其中’該鉅金屬有機化合物係選自於五-乙氧基化 組、四乙氧基-二甲胺乙氧基化鉬、四乙氧基-四甲基庚二 醇鉅、四甲氧基-四甲基庚二醇鉬、四異丙氧基-四甲基庚 二醇鉅與三-二乙胺-新丁亞胺化鉬所組成之族群之其中一 種。 4·如申請專利範圍第1項之電容器之介電層的製造 方法’其中’該鈦金屬有機化合物包括烷氧基化鈦化合 物。 5. 如申請專利範圍第4項之電容器之介電層的製造 方法,其中,該鈦金屬有機化合物係選自於四-異丙氧基化 鈦、二-異丙氧基化鈦、二-異丙氧基-二-二甲胺乙氧基化 鈦、二-乙氧基-二-二甲胺乙氧基化鈦與四-新丁氧基化鈦所 組成之烷氧基化鈦化合物族群之其中一種。 6. 如申請專利範圍第1項之電容器之介電層的製造 方法,其中,該鈦金屬有機化合物包括胺基化鈦化合物。 --------*---Φ裝--------訂---------線 (請先閱讀背面之注意事項再填寫本頁) 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公釐) 經濟部智慧財產局員工消費合作社印製 410441 b 4775twf.doc/008 六、申請專利範圍 7. 如申請專利範圍第6項之電容器之介電層的製造 方法,其中,該鈦金屬有機化合物係選自於四-二乙胺基化 鈦、四-二甲胺基化鈦所組成之胺基化鈦化合物族群之其中 一種。 8. 如申請專利範圍第1項之電容器之介電層的製造 方法,其中該有機金屬化學氣相沉積製程之溫度約在攝氏 380度至攝氏500度之間》 9. 一種電容器之製造方法,該方法包括: 提供一基底,並在該基底上形成一第一導體層; 於該第一導體層上形成一半球型砂晶粒層; 以一鉬金屬有機化合物與一鈦金屬有機化合物爲前 趨物,進行一有機金屬化學氣相沉積製程,以在該半球型 矽晶粒層上形成一氧化钽鈦介電層;以及 於該氧化钽鈦介電層上形成一第二導體層。 10. 如申請專利範圍第9項所述之電容器之製其 中,該組金屬有機化合物包括烷氧基化鉅化合物。 11. 如申請專利範圍第9項所述之電容器之製造 中,該鉬金屬有機化合物係選自於五-乙氧基化鉅、 基-二甲胺乙氧基化鉅、四乙氧基_四甲基庚二醇钽、四甲 氧基-四甲基庚二醇鉅、四異丙氧基··四甲基庚二醇鉬^三-二乙胺-新丁亞胺化鉬所組成之族群之其中一種。 12. 如申請專利範圍第9項所述之電容器之製^#\其 中,該鈦金屬有機化合物包括烷氧基化鈦化合物。 13. 如申請專利範圍第12項所述之電容器之製 其中,該鈦金屬有機化合物係選自於四-異丙氧基化鈦^: (請先閲讀背面之注意事項再填寫本頁) ❿裝----- 訂---------^)τ . 本紙張尺度適用中國國家標準(CNS)A4規格(21〇 X 297公釐) 410441 4775twf·d〇c/008 Λ8 BS C3 D8 申請專利範圍 -異丙氧基化鈦、二-異丙氧基-二-二甲胺乙氧基化鈦、二-乙氧基-二-二甲胺乙氧基化鈦與四-新丁氧基化鈦所組成 之烷氧基化鈦化合物族群之其中一種。 中 申請專利範圍第9項所述之電容器之製造汾、、 ~該鈦金屬有機化合物包括胺基化鈦化合樣^ 專利範圍第14項所述之電容器之製 其中,其鈦金屬有機化合物係選自於四-二乙胺g 鈦、四-二&^^化鈦所組成之胺基化鈦化合物族群’之其中 一'種 1 申請專利範圍第9項所述之電容器之製 中,·該有機金屬化學氣相沉積製程之溫度乾fl 380度氏500度之間 17^^請專利範圍第9項所述之電容器之製造; 中,其第一導體層之材質包括複晶矽。 申請專利範圍第9項所述之電容器之製其 中,\^jp該第二導體層之材質包括金屬。4 4 ο 1 4 A8B8C8D8 Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs, printed by T. Patent application scope 1. A method for manufacturing a dielectric layer of a capacitor, the method comprising: providing a molybdenum metal organic compound and a titanium metal organic compound; And using the hafnium metal organic compound and the titanium metal organic compound as precursors to perform an organic metal chemical vapor deposition process to form the dielectric layer. 2. A method for manufacturing a dielectric layer of a capacitor according to item 1 of the scope of the patent application, wherein the tantalum metal organic compound includes an alkoxylated macro compound. 3. The method for manufacturing a dielectric layer of a capacitor according to item 1 of the patent application 'wherein' the giant metal organic compound is selected from the group consisting of penta-ethoxylation and tetraethoxy-dimethylamine ethoxylation Molybdenum, tetraethoxy-tetramethylheptanediol macro, tetramethoxy-tetramethylheptanediol molybdenum, tetraisopropoxy-tetramethylheptanediol macro, and tri-diethylamine-neobutyl One of the groups of imidized molybdenum. 4. The method of manufacturing a dielectric layer of a capacitor according to item 1 of the patent application, wherein 'the titanium metal organic compound includes a titanium alkoxy compound. 5. The method for manufacturing a dielectric layer of a capacitor according to item 4 of the patent application, wherein the titanium metal organic compound is selected from the group consisting of tetra-isopropoxytitanium, di-isopropoxytitanium, and di- Titanium alkoxylate compound composed of isopropoxy-di-dimethylamine titanium ethoxylate, di-ethoxy-di-dimethylamine ethoxylate and tetra-nebutoxy titanium One of the ethnic groups. 6. The method for manufacturing a dielectric layer of a capacitor as claimed in claim 1, wherein the titanium metal organic compound includes an aminated titanium compound. -------- * --- Φ Pack -------- Order --------- Line (Please read the precautions on the back before filling this page) This paper size applies China National Standard (CNS) A4 Specification (210 X 297 mm) Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs 410441 b 4775twf.doc / 008 6. Scope of Patent Application 7. Such as the application of capacitors in the scope of patent application No. 6 The method for manufacturing an electric layer, wherein the titanium metal organic compound is one selected from the group of titanium aminated compounds composed of titanium tetra-diethylamine and titanium tetra-dimethylamine. 8. The method for manufacturing a dielectric layer of a capacitor, such as the item 1 of the scope of patent application, wherein the temperature of the organometallic chemical vapor deposition process is about 380 ° C to 500 ° C. 9. A method of manufacturing a capacitor, The method includes: providing a substrate, and forming a first conductor layer on the substrate; forming a hemispherical sand grain layer on the first conductor layer; using a molybdenum metal organic compound and a titanium metal organic compound as a precursor An organic metal chemical vapor deposition process is performed to form a tantalum titanium oxide dielectric layer on the hemispherical silicon grain layer; and a second conductor layer is formed on the tantalum titanium oxide dielectric layer. 10. The capacitors described in item 9 of the scope of patent application, the group of metal organic compounds include alkoxylated macro compounds. 11. In the manufacture of the capacitor as described in item 9 of the scope of the patent application, the molybdenum metal organic compound is selected from the group consisting of penta-ethoxylated macro, dimethyl-dimethylamine ethoxylated macro, and tetraethoxy_ Tetramethylheptanediol tantalum, tetramethoxy-tetramethylheptanediol macro, tetraisopropoxy ·· tetramethylheptanediol molybdenum ^ tri-diethylamine-nemobutylimide One of the ethnic groups. 12. The production of a capacitor as described in item 9 of the scope of patent application, wherein the titanium metal organic compound includes a titanium alkoxide compound. 13. The capacitor system described in item 12 of the scope of patent application, wherein the titanium metal organic compound is selected from titanium tetra-isopropoxy ^: (Please read the precautions on the back before filling this page) ❿ Loading ----- Order --------- ^) τ. This paper size applies to China National Standard (CNS) A4 (21〇X 297 mm) 410441 4775twf · d〇c / 008 Λ8 BS C3 D8 patent application scope-titanium isopropoxylate, di-isopropoxy-di-dimethylamine ethoxylate, di-ethoxy-di-dimethylamine ethoxylate and tetra- One of the alkoxylated titanium compound groups composed of neobutoxylated titanium. The application of the capacitors described in item 9 of the scope of patent application in China, ~ The titanium metal organic compounds include titanium aminated compounds ^ The system of capacitors described in item 14 of the patent scope, among which the titanium metal organic compounds are selected Since the tetra-diethylamine g titanium, tetra-di & titanium compounds are one of the aminated titanium compound family '1' 1 in the production of the capacitor described in the 9th scope of the patent application, The temperature of the organometallic chemical vapor deposition process is between 380 ° C and 500 ° C. The manufacture of the capacitor described in item 9 of the patent scope; wherein, the material of the first conductor layer includes polycrystalline silicon. Among the capacitors described in item 9 of the scope of the patent application, the material of the second conductor layer includes metal. ^_\申請專利範圍第18項所述之電容器之製 導體層之材質包括氮化鈦。 其中^ _ \ Production of the capacitor described in item 18 of the scope of patent application The material of the conductor layer includes titanium nitride. among them (請先閱讀背湎之注意事項再填寫本頁) ^-丨------訂----- -¾¾ 線、 經濟部智慧財產局員工消費合作社印製 1 5 本紙張尺度適用中國國家標準(CNS)A4規格(210 x 297公釐)(Please read the precautions of the back page before filling out this page) ^-丨 ------ Order ----- -¾¾ Printed by the Consumers' Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs 1 5 This paper is applicable to China National Standard (CNS) A4 (210 x 297 mm)
TW088110830A 1999-06-28 1999-06-28 Manufacturing method for dielectric layer of capacitor TW410441B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
TW088110830A TW410441B (en) 1999-06-28 1999-06-28 Manufacturing method for dielectric layer of capacitor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
TW088110830A TW410441B (en) 1999-06-28 1999-06-28 Manufacturing method for dielectric layer of capacitor

Publications (1)

Publication Number Publication Date
TW410441B true TW410441B (en) 2000-11-01

Family

ID=21641293

Family Applications (1)

Application Number Title Priority Date Filing Date
TW088110830A TW410441B (en) 1999-06-28 1999-06-28 Manufacturing method for dielectric layer of capacitor

Country Status (1)

Country Link
TW (1) TW410441B (en)

Similar Documents

Publication Publication Date Title
TW492161B (en) Method to increase the capacity in a memory-trench and memory-capacitor with increased capacity
TW405249B (en) Semiconductor memory device and method for fabricating the same
US8846468B2 (en) Methods to improve leakage of high K materials
TW427014B (en) The manufacturing method of the capacitors of DRAM
TW423147B (en) Method for fabricating capacitor of semiconductor memory device
TW584957B (en) Semiconductor integrated circuit and the manufacturing method thereof
TW410441B (en) Manufacturing method for dielectric layer of capacitor
TW408487B (en) The manufacture method of capacitor
TW418531B (en) Manufacture method of capacitor of DRAM cell
JP2000196035A (en) Manufacture of capacitor of memory device
TW507299B (en) Method for manufacturing semiconductor device
TW399327B (en) The manufacturing method of DRAM capacitor
US6893963B2 (en) Method for forming a titanium nitride layer
TW418529B (en) Method of fabricating DRAM capacitor
TW316328B (en) Manufacturing method of silicon nitride/silicon dioxide dielectric of stacked capacitor by inductively-coupled nitrogen plasma
TW432698B (en) Method for fabricating capacitor of dynamic random access memory
TW415098B (en) Self-aligned rugged crown-shaped capacitor of high density RAM
TW471165B (en) Self-aligned extended rough crown-type capacitor of high density DRAM
TW308731B (en) Manufacturing method of two step capacitor dielectric
TW426895B (en) Method for producing gate oxide layer
TW432685B (en) Dual crown-shaped rough polysilicon capacitor
TW414951B (en) Method of forming electrode
TWI229445B (en) Folded type capacitor structure and fabrication method
TW447115B (en) Storage electrode with porous, rough inner wall and the DRAM capacitor
TW388124B (en) Method of producing DRAM capacitance

Legal Events

Date Code Title Description
GD4A Issue of patent certificate for granted invention patent
MM4A Annulment or lapse of patent due to non-payment of fees