3506t\vf.doc/008 Λ7 五、發明説明（） 本發明是有關於一種導線架(Lead Frame)的製造方法， 且特別是有關於一種應用於覆晶（Flip Chip，F/C)技術之晶 片接點型(Lead On Chip Type, LOC Type)導線架的製造方 法。 在半導體產業中，積體電路(Integrated Circuits, 1C)的 生產，主要分爲三個階段：矽晶片的製造、積體電路的製 作及積體電路的封裝（Package)等。以積體電路的封裝而 言，可說是完成積體電路成品的最後步驟。在封裝製程中， 導線架是提供晶粒(Die)安放於導線之基座，並以電性連接 晶粒與印刷電路板（Printed Circuit Board)或其他適當兀 件。 由於積體電路的發展越加精密及複雜，爲達到緊密封 裝之目的，因而發展出晶片尺寸封裝(Chip Scale Package, CSP)技術’晶片接點型(LOC)結構即是其中之一，可以使 封裝的體積略大於晶粒的尺寸，而且在允許的範圍內儘可 能縮小。請參照第1A個與第1B _，其所繪示的是晶片 接點型導線架之俯視圖與剖面圖。其中第1B圖係相對於 第1A圖之接點型導線架1〇〇沿B-B剖面線之剖面圖。 經濟部中央標率局貝工消費合作社印«. (請先閲讀背面之注意事項再填寫本頁) 然而在積體電路的模組(Module)中，大量的導線由晶 片中釋出，需要數以百計的連接來形成完整的線路。因此 封裝時所需的導線大量增加，所以需要發展新的封裝方 式，以容納及連接更多的導線，完成更複雜的線路，而覆 晶技術即是其中之一。請參照第2A圖、第2B圖及第2C 圖’其所繪示的是應用於覆晶技術之晶片接點型導線架的 3 本紙張尺度適用中國國家榡準（CNS ) Α4規格（210Χ 297公釐） 3506twf.doc/008 3506twf.doc/008 經濟部中央標準局員工消費合作社印裝 _____^ 五、發明説明（） 俯視圖與剖面圖。覆晶所採用的方式，是以焊接球 206(Solder Ball)在晶片與電路基板或導線架200(Substrate) 的配線電極之間進行電性連接。爲避免焊接球206在覆晶 時與基板2〇〇上其他線路連接產生不必要之導通或造成短 路’因而必須在基板上塗佈綠漆形成焊罩202(Solder Mask) 用以保護線路’只曝露出需要進行電性連接的電極部分， 使焊接球在覆晶時能正確地連接至配線電極204，如第2C 圖所示。 習知應用於覆晶技術之晶片接點型導線架的製造，從 金屬基板例如銅合金（C151、C194、C7025、KCF125、 FEFFTEC等）或鐵鎳合金(Ni_Fe 42 Alloy)等之金屬板材形 成導線架，都必須先經過微影（Photolithography)、触刻步 驟，以形成導線架結構。然後再於導線架結構上形成焊罩， 以利後續之封裝製程。 請參照第3圖，其所繪示的是習知一種導線架製造方 法的流程圖。請參照第3圖中之步驟300，首先提供製作 導線架所需之金屬基板，並在金屬基板的表面上形成光阻 層。再採取微影步驟，對光阻層進行曝光、顯影，將導線 架結構圖案轉移至光阻層。 其次，請參照第3圖之步驟302，以具有導線架結構 圖案之光阻層爲罩幕(Mask)，對金屬基板進行蝕刻，以形 成導線架結構，然後再將光阻層剝除。具有導線架結構之 金屬基板的俯視圖如第1A圖所示。 接著，請參照第3圖之步驟304,利用印刷電路(Printed 4 (請先閱讀背面之注意事項再填寫本頁)3506t \ vf.doc / 008 Λ7 V. Description of the Invention The present invention relates to a method for manufacturing a lead frame, and in particular, to a technology applied to flip chip (F / C) technology. A method for manufacturing a lead on chip type (LOC type) lead frame. In the semiconductor industry, the production of integrated circuits (1C) is mainly divided into three stages: the manufacture of silicon wafers, the manufacture of integrated circuits, and the packaging of integrated circuits. In terms of the package of the integrated circuit, it can be said that it is the final step to complete the finished integrated circuit. In the packaging process, the lead frame is provided with a die to be placed on the base of the wire, and the die is electrically connected to the printed circuit board or other appropriate components. As the development of integrated circuits becomes more and more sophisticated and complex, in order to achieve the purpose of tight packaging, the development of Chip Scale Package (CSP) technology 'chip contact type (LOC) structure is one of them. The volume of the package is slightly larger than the size of the die, and it is as small as possible within the allowable range. Please refer to 1A and 1B_, which show the top view and cross-sectional view of the chip contact type lead frame. FIG. 1B is a cross-sectional view taken along the line B-B of the contact type lead frame 100 in FIG. 1A. Printed by the Shell Standard Consumer Cooperative of the Central Standards Bureau of the Ministry of Economic Affairs «(Please read the precautions on the back before filling out this page) However, in the module of the integrated circuit (Module), a large number of wires are released from the chip. Hundreds of connections form a complete circuit. Therefore, the number of wires required for packaging has increased significantly, so new packaging methods need to be developed to accommodate and connect more wires and complete more complex circuits. Chip-on-chip technology is one of them. Please refer to Figures 2A, 2B, and 2C. 'It shows 3 wafer contact type lead frames used for flip chip technology. This paper size is applicable to China National Standard (CNS) A4 specification (210 × 297). (Mm) 3506twf.doc / 008 3506twf.doc / 008 Printed by the Consumer Cooperatives of the Central Standards Bureau of the Ministry of Economic Affairs _____ ^ V. Description of the invention () Top view and section view. The method used for flip-chip is to use a solder ball 206 (Solder Ball) to electrically connect the wafer to the circuit substrate or the wiring electrodes of the lead frame 200 (Substrate). In order to avoid that the solder ball 206 is connected to other circuits on the substrate 200 when it is flipped, unnecessary conduction or short circuit is caused. Therefore, a green paint must be coated on the substrate to form a solder mask 202 to protect the circuit. The electrode portion that needs to be electrically connected is exposed, so that the solder ball can be correctly connected to the wiring electrode 204 when the chip is covered, as shown in FIG. 2C. Known for the manufacture of wafer contact type lead frames used in flip-chip technology, the wires are formed from metal substrates such as copper alloys (C151, C194, C7025, KCF125, FEFFTEC, etc.) or iron-nickel alloys (Ni_Fe 42 Alloy), etc. Frames must first undergo photolithography and touch engraving steps to form a lead frame structure. A solder mask is then formed on the lead frame structure to facilitate subsequent packaging processes. Please refer to FIG. 3, which shows a flowchart of a conventional lead frame manufacturing method. Referring to step 300 in FIG. 3, firstly provide a metal substrate required for making a lead frame, and form a photoresist layer on the surface of the metal substrate. Then, a photolithography step is performed to expose and develop the photoresist layer, and transfer the lead frame structure pattern to the photoresist layer. Secondly, referring to step 302 of FIG. 3, using a photoresist layer having a lead frame structure pattern as a mask, the metal substrate is etched to form a lead frame structure, and then the photoresist layer is stripped. A top view of a metal substrate having a lead frame structure is shown in FIG. 1A. Next, please refer to step 304 in Figure 3, using printed circuit (Printed 4 (Please read the precautions on the back before filling this page)
本紙張尺度適用中國國家標準（CNS ) A4規格（210X297公釐） 3506twf.doc/〇〇8This paper size applies to China National Standard (CNS) A4 (210X297 mm) 3506twf.doc / 〇〇8
經濟部中央棣準局貝工消費合作社印製 五、發明説明（）Printed by the Shellfish Consumer Cooperative of the Central Provincial Bureau of the Ministry of Economic Affairs
Circuit)的製作方式，依照所需之焊罩圖案將綠漆塗佈於具 有導線架結構之金屬基板的表面’覆蓋導線架之部分表 面，以形成焊罩。表面覆有焊罩之導線架的俯視圖如第2A 圖所示。 然後，請參照第3圖之步驟3〇6 ’對表面覆有焊罩之 導線架的導腳部分進行下偏(Downset)的加工處理，並將導 線架以黏貼帶加以黏貼（Taping)固定，以利後續晶粒封裝 製程之進行。其中表面覆有焊罩之導線架經下偏加工後的 剖面圖如第2B圖所示。此一方法的缺點是在以印刷電路 方式進行綠漆塗佈形成焊罩時’會使得導線架的內導線 (Inner Lead)產生變形，因而影響後續封裝製程，使得良率 降低。 請參照第4圖，其所繪示的是習知另一種導線架製造 方法的流程圖。請參照第4圖中之步驟4〇〇 ’與前一種導 線架製作方法之步驟300相同’首先提供製作導線架所需 之金屬基板，並於其表面形成光阻層。再進行微影’將導 線架結構圖案轉移至光阻層。 其次，請參照第4圖之步驟402 ’仍與前一種導線架 製作方法之步驟302相同，以光阻層爲罩幕’對金屬基板 進行蝕刻，形成導線架結構，然後再將光阻層剝除。具有 導線架結構之金屬基板的俯視圖如第1A圖所示。 接著，請參照第4圖之步驟404 ’在進行綠漆塗佈形 成焊罩時，爲減少對導線架內導線所造成的變形’因而對 金屬基板之導線架結構的導腳部分先進行下偏的加工處 5 (請先閱讀背面之注意事項再填寫本頁)Circuit) is manufactured by applying a green lacquer on the surface of a metal substrate having a lead frame structure to cover a part of the surface of the lead frame in accordance with a desired solder mask pattern to form a solder mask. The top view of the lead frame covered with a solder mask is shown in Figure 2A. Then, please refer to step 3006 in FIG. 3 to perform a downset processing on the guide leg portion of the lead frame covered with the welding cover, and fix the lead frame with an adhesive tape. To facilitate the subsequent die packaging process. The cross-sectional view of the lead frame covered with a solder mask on the surface is shown in FIG. 2B. The disadvantage of this method is that when the green lacquer is applied to form a solder mask in a printed circuit mode, the inner lead of the lead frame will be deformed, which will affect the subsequent packaging process and reduce the yield. Please refer to FIG. 4, which shows a flowchart of a conventional method for manufacturing another lead frame. Please refer to step 4 ′ in FIG. 4, which is the same as step 300 of the previous method of manufacturing a lead frame. ’First, a metal substrate required for manufacturing the lead frame is provided, and a photoresist layer is formed on the surface. Then lithography 'is used to transfer the lead frame structure pattern to the photoresist layer. Secondly, please refer to step 402 of FIG. 4 'It is still the same as step 302 of the previous method of making a lead frame, using a photoresist layer as a cover' to etch a metal substrate to form a lead frame structure, and then peel the photoresist layer except. A top view of a metal substrate having a lead frame structure is shown in FIG. 1A. Next, please refer to step 404 of FIG. 4 when applying green paint to form a welding cover, in order to reduce the deformation caused by the wires in the lead frame. Processing Office 5 (Please read the notes on the back before filling this page)
'1T 本紙張尺度適用中國國家標準（CNS ) A4規格（210X297公釐) 3506twf.doc/008'1T This paper size applies to Chinese National Standard (CNS) A4 specification (210X297 mm) 3506twf.doc / 008
經濟部中央標準局貝工消费合作社印掣 五、發明説明（） 理，並將導線架結構加以黏貼固定。其中經下偏加工後之 導線架結構的剖面圖如第1B圖所示。 然後，請參照第4圖之步驟406，利用印刷電路的製 作方式，依照所需之焊罩圖案，對經下偏加工後之導線架 結構的部分表面進行綠漆塗佈，以形成焊覃。其中經下偏 加工後再於表面形成焊罩之導線架的剖面圖如第2B圖所 示。由於導線架經過下偏加工處理之後並不是呈一平面結 構，所以在進行綠漆塗佈時，必須以單線印刷的方式進行， 因此非常耗費時間，導致產能降低，而且在單線印刷的過 程中，仍然會造成導線架之內導線產生變形，使得後續封 裝製程良率降低。 因此本發明的主要目的就是在提供一種導線架的製作 方法，避免進行綠漆塗佈形成焊罩使得導線架內導線的變 形，提昇晶粒封裝之良率。 根據本發明之上述目的，提出一種導線架的製造方 法’包括下列步驟：首先提供製作導線架所需之金屬基板， 於表面處理後進行綠漆塗佈，並形成具有所需焊罩圖案之 綠漆層，以覆蓋後續步驟所製作出之導線架的部分表面作 爲焊罩。再以光阻層塗蓋金屬基板的所有表面，經曝光、 顯影後，將導線架結構圖案轉移至光阻層。接著以光阻層 爲罩幕，將金屬基板蝕刻出所需之導線架結構。再對導線 架的導腳部分進行下偏加工處理，並將導線架黏貼固定， 以利後續晶粒封裝製程。 爲讓本發明之上述和其他目的、特徵、和優點能更明 6 本紙張尺度適用中國國家標準（CNS〉A4規格（210X297公漦） (請先閱讀背面之注意事項再填寫本頁)Printed by the Central Bureau of Standards of the Ministry of Economic Affairs, Shellfish Consumer Cooperatives. 5. Description of the invention (), and fixed the lead frame structure. The cross-sectional view of the lead frame structure after the lower bias processing is shown in FIG. 1B. Then, referring to step 406 in FIG. 4, a part of the surface of the lead frame structure after the under-developing processing is coated with green paint to form a soldering tin by using a printed circuit manufacturing method in accordance with a desired solder mask pattern. The cross-sectional view of the lead frame on which the solder mask is formed on the surface after the downward deflection processing is shown in FIG. 2B. Because the lead frame does not have a flat structure after the lower bias processing, it must be printed in a single line when applying green paint, which is very time consuming and leads to a reduction in production capacity. In the process of single line printing, Deformation of the wires in the lead frame will still be caused, which will reduce the yield of subsequent packaging processes. Therefore, the main object of the present invention is to provide a method for manufacturing a lead frame, which avoids the formation of a solder cover by applying green paint to deform the wires in the lead frame, and improves the yield of die packaging. According to the above object of the present invention, a method for manufacturing a lead frame is proposed. The method includes the following steps: firstly providing a metal substrate required for manufacturing the lead frame, applying green paint after surface treatment, and forming a green with a desired solder mask pattern The lacquer layer is used to cover a part of the surface of the lead frame produced in the subsequent steps as a welding cover. Then, all surfaces of the metal substrate are covered with a photoresist layer. After exposure and development, the lead frame structure pattern is transferred to the photoresist layer. The photoresist layer is then used as a mask to etch the metal substrate into the required lead frame structure. Then, the lead frame of the lead frame is subjected to downward bias processing, and the lead frame is adhered and fixed to facilitate the subsequent die packaging process. In order to make the above and other objects, features, and advantages of the present invention clearer 6 This paper size applies the Chinese national standard (CNS> A4 specification (210X297 cm)) (Please read the precautions on the back before filling this page)
3506twf.doc/008 3506twf.doc/008 經濟部中央樣準局員工消費合作社印製 Η 7 五、發明説明（） ^ 顯易懂，下文特舉一較佳實施例，並配合所附圖示，作詳 細說明如下： 圖示之簡單說明： 第1A圖繪示晶片接點型導線架的俯視圖。 第1B圖繪示晶片接點型導線架的剖面圖。 第2A圖繪示應用於覆晶技術之晶片接點型導線架的 俯視圖。 第2B圖繪示應用於覆晶技術之晶片接點型導線架的 剖面圖。 第2C圖繪示應用於覆晶技術之晶片接點型導線架與 焊接球連接的剖面示意圖。 第3圖繪示習知一種導線架製造方法的流程圖。 第4圖繪示習知另一種導線架製造方法的流程圖。 第5圖繪示依照本發明之一較佳實施例，一種導線架 製造方法的流程圖。 第6A圖至第6D圖繪示依照本發明之一較佳實施例， 一種導線架製造方法各步驟的剖面圖。 圖示之標記說明： 100、200 :導線架 202 :焊罩 204 :配線電極 206 :焊接球 300〜306:習知一種導線架製造方法的步驟 400〜406:習知另一種導線架製造方法的步驟 7 (請先閱^背面之注意事項再填寫本頁) -β 本紙張尺度適用中國國家標ί ( CNS ) A4規格（210X297^ ) ' id乳> 姻 <302 國ϋ畜落1 —黑望 s I w ^ 1 S 6 0 0 -霞凉播商Κ裔左u 5 d逮热Λ掛S βοΜ函落翁_。 ii - s f s 1 5 國 N 媒 i 502，爵 3 1 t 湿 i ec 函*掛挪到_撕1姻β〇2 :^咏_|商βοο _tl 1逮热法面_ βο 私。s- i βο 私 —13ΙΙ^ϋ^1-ϋ w> ^ s 商βοο 3 m甜撕3 o 》聲法面潍eo-4 ife 额法 ' 翻赞j —if淞前—画姍e〇4_ti。 m t 1 5 画 N 味 i 504* 择 sit通i βϋ i >^ i A- i I ^ n i i ^ s- ί e〇 私 i 5 - ^ ϋ i, 涵侧602 N盼_ _ i aoo |1^黑爸二m射费热搞薪港龍載, 酬$决面靡eo> t乘> i I撕g藏册S姻602 w i 1潘> 画普满國。 ^ 0 < m 5 画 5〇β < 聲si掛i 姻； 戴港3·_ιφι~τ蠢：tmH麵猫4 _|箱黎黹Is哲遥曾 泛s S画沛*它4U i i N齣露S锻1 i I β。 &_t留斜激Ss — Λ _句一一 4汾口 ' il钟锻δίκίϋ 落味_ _ t知k讲逮热m蘼；^逾姻-I它δ 1冰抖f夺—難 f II >辣ϋ K _ i dnΗ择sS画陆j规热i墨港 f fi - 4泛i袖®许S蝤杏蚧描泛S ϋ泰β3霧镑 ϋ i S ϋ S β滕弭|難凇；^3ϋϋ3骑鄉* imi o画1 *钟锻溫丑n棄丨分隊亩规 β。_a 4 ϋ ί達赞：^*乳规热* i i姻露mp聖> ^Γ戒爸3 i ϋ ^ ^ ϋ '爵NSTW^_遂 f。 411¾¾^) ( czs ) > 厶斧$ ( 2 1 o X 2S/7»泠 > 3506twf,doc/008 A? H7 五、發明説明（） 雖然本發明已以一較佳實施例揭露如上，然其並非用 以限定本發明，任何熟習此技藝者，在不脫離本發明之精 神和範圍內，當可作各種之更動與潤飾，因此本發明之保 護範圍當視後附之申請專利範圍所界定者爲準。 (請先閱讀背面之注意事項再填寫本頁) 經濟部中央標準局貝工消费合作社印製 本紙張尺度適用中國國家標準（CNS ) Λ4規格（210X297公釐）3506twf.doc / 008 3506twf.doc / 008 Printed by the Consumer Cooperatives of the Central Procurement Bureau of the Ministry of Economic Affairs 7 V. Description of the invention () ^ It is easy to understand. The following gives a preferred embodiment and the accompanying drawings. The detailed description is as follows: Brief description of the figure: FIG. 1A shows a top view of a chip contact type lead frame. FIG. 1B is a cross-sectional view of a chip contact type lead frame. Fig. 2A shows a top view of a wafer contact type lead frame applied to a flip chip technology. Fig. 2B shows a cross-sectional view of a wafer contact type lead frame applied to a flip chip technology. Fig. 2C is a schematic cross-sectional view showing the connection of a wafer contact type lead frame and a solder ball applied to the flip chip technology. FIG. 3 shows a flowchart of a conventional method for manufacturing a lead frame. FIG. 4 is a flowchart of another conventional method for manufacturing a lead frame. FIG. 5 is a flowchart of a method for manufacturing a lead frame according to a preferred embodiment of the present invention. 6A to 6D are cross-sectional views of steps of a method for manufacturing a lead frame according to a preferred embodiment of the present invention. The description of the marks in the illustration: 100, 200: lead frame 202: welding cover 204: wiring electrode 206: solder ball 300 ~ 306: steps of a method for manufacturing a lead frame 400 ~ 406: knowing of another method of manufacturing a lead frame Step 7 (please read the notes on the back of ^ before filling this page) -β This paper size applies to China National Standard (CNS) A4 specification (210X297 ^) 'id milk > Heiwang s I w ^ 1 S 6 0 0-Xia Liang broadcaster K Zuo u 5 d catches heat Λ hanging S βοΜ 函 落 翁 _. ii-s f s 1 5 country N media i 502, Jie 3 1 t wet i ec function * hanging to _ tear 1 marriage β〇2: ^ 咏 _ | 商 βοο _tl 1 catch heat method _ βο private. s- i βο 私 —13ΙΙ ^ ϋ ^ 1-ϋ w > ^ s quotient βοο 3 m sweet tear 3 o "Sound method surface Weieo-4 ife amount method 'praise" j —if 淞 前 — 画 姗 e〇4_ti . mt 1 5 Painting N 味 i 504 * Optional sittong i βϋ i > ^ i A- i I ^ nii ^ s- ί e〇 私 i 5-^ ϋ i, culvert 602 N hope_ _ i aoo | 1 ^ Hey, my dad is shooting hot and doing a long job in Hong Kong, and the pay is declining. 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H7 V. Description of the invention () Although the present invention has been disclosed as above with a preferred embodiment, However, it is not intended to limit the present invention. Any person skilled in the art can make various modifications and retouches without departing from the spirit and scope of the present invention. Therefore, the protection scope of the present invention shall be regarded as the scope of the attached patent application. The definition shall prevail. (Please read the notes on the back before filling in this page.) The paper size printed by the Central Standards Bureau of the Ministry of Economic Affairs, Shellfish Consumer Cooperative, is printed in accordance with the Chinese National Standard (CNS) Λ4 specification (210X297 mm).