經 濟 部 智 慧 財 產 局 貝 X 消 费 合 作 社 印 製 A7 B7 五、發明說明（/ ) 本發明之45垃： 本發明係有關於一種顯示裝置，特別為一種有關於依 據微電腦初始狀態而防止DDC操作不良之修正DDC錯誤 的顯示裝置電路及其控制方法^以當資訊被傳送到電腦（或 當資訊由電腦處接收）時，該顯示裝置提供有DDC 1與DDC 2B等兩種修正DDC錯誤模式。 左A明之背景： 一般而言，顯示裝置是一種典型的電腦輸出裝置，其 可顯示出營自電腦之影像信號，而使得使用者可以辨視。 請配合參閱第1圖，該圖所示為習知顯示裝置内部電路之 基本架構，·气:習知之顯示裝置内部電路包含有一影像卡 10、一微電腦20、一垂直偏向電路3〇、一水平偏向電路 4〇、一高壓電路50、一影像前置放大器6〇以及一影像主 要放大器70。 該影像卡10,其係安裝於電腦内（圖未示），其可用 以提供形成色彩所需之色彩信號（紅綠藍三原色）以及水 平/垂直同步訊號（H_Sync/V_Sync );該微電腦20，其可 用以接受來自於該影像卡丨〇之水平/垂直同步訊號，並且 產生一畫面控制信號來控制監視器畫面；一垂直偏向電路 與一水平偏向電路40,其可分別用來接收垂直同步信號 (V_Sync )與水平同步信號（H_Sync )，且水平偏向與垂 直偏向可使得由一陰極射線管（CRT ) 80的電子槍所產生 之電子束藉由一偏位軛，而從CRT 80的左上部份到右下 + (CNS)A4 ^ (210 X 297¾-) • I--— — — ^· I — I — 1!' 訂—--· (請先閱讀背面之注項再填寫本頁) A7 A7 經濟部智慧財產局員工消費合作社印製 '-----_ B7 五、發明說明（2 ) 部份而達到連續地偏向，因此形成一如同畫面之影像；該 阿壓電路50，其可用以供應一高電壓到CRT 80之陽極， 依據切換電路以及高電壓技術之原理，該CRT 80之陽極 可藉由利用水平偏向電路40的輸出埠而產生空白脈衝；該 影像前置放大器60,其可用以放大被傳送來自影像卡1〇 之一低位準影像信號（r，G，B)，以保持一低位準信號於固 定的電壓位準；而該影像主要放大器70,其可用以再放大 來自影像前置放大器60之信號，其電壓信號位準從4〇伏 特峰値提升到60伏特峰値，以提供能量到每一個影像圖 素。 將水平/垂直同步信號以及影像信號從電腦或其他資 料處理裝置傳輸到顯示裝置的方法有兩種。其中一種方法 為如第2A '厨所示，係藉由一電纜線來傳輸影像信號 (R，G，B )的影像信號線及同步信號線，但在此種情況了， 傳輸到連結器端子的信號會依顯示器製造廠商的不同而有 所差異。而另一種方法，則如第2B圖所示，影像信號 (R，G，B )的影像信號線及水平/垂直同步信號係藉由個別 的電纜線來被傳輸，於此，一 D-sub方法需使用於—可用 以操作電腦之操作系統程式，此係因電腦的執行，其本身 具有弱高頻特性。BNC則是用以改善高頻帶區之解析度， 其經常被用於如CAD這種程式的執行。藉由顯示輸出與電 腦之間使用D-sub的方法而做資訊交換功能，即稱為顯示 資料頻道（DDC )。此意即，即使在監視器上沒有使用者 之資訊，使用者仍可運用各種相關監視器的資訊而將之傳 4 本紙張尺度適用中國國家標準（CNS)A4規格（210* 297公釐） (請先閱讀背面之注意事項再填寫本頁)Printed by Intellectual Property Bureau of the Ministry of Economic Affairs X Printed by Consumer Cooperative A7 B7 V. Description of the Invention (/) 45 of the present invention: The present invention relates to a display device, and in particular to a method for preventing poor DDC operation based on the initial state of a microcomputer A display device circuit for correcting DDC errors and a control method thereof. When information is transmitted to a computer (or when information is received by a computer), the display device provides two DDC error correction modes such as DDC 1 and DDC 2B. Background of left A Ming: Generally speaking, the display device is a typical computer output device, which can display the video signal from the computer, so that the user can see it. Please refer to Figure 1. This figure shows the basic structure of the internal circuit of the conventional display device. Qi: The internal circuit of the conventional display device includes an image card 10, a microcomputer 20, a vertical deflection circuit 30, and a horizontal The bias circuit 40, a high-voltage circuit 50, an image preamplifier 60, and an image main amplifier 70. The image card 10 is installed in a computer (not shown), and can be used to provide the color signals (three primary colors of red, green and blue) and horizontal / vertical synchronization signals (H_Sync / V_Sync) required for forming the color; the microcomputer 20, It can be used to receive the horizontal / vertical synchronization signal from the video card and generate a picture control signal to control the monitor picture; a vertical deflection circuit and a horizontal deflection circuit 40 can be used to receive the vertical synchronization signal respectively. (V_Sync) and horizontal synchronization signal (H_Sync), and the horizontal and vertical deflection can make the electron beam generated by the electron gun of a cathode ray tube (CRT) 80 pass a deflection yoke, and the upper left part of the CRT 80 Go to the bottom right + (CNS) A4 ^ (210 X 297¾-) • I --— — — ^ · I — I — 1! 'Order —-- · (Please read the note on the back before filling this page) A7 A7 Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs' -----_ B7 V. The description of the invention (2) has been continuously biased, so it forms an image like a picture; the voltage circuit 50, which Can be used to supply a high voltage to the anode of CRT 80, According to the switching circuit and the principle of high-voltage technology, the anode of the CRT 80 can generate a blank pulse by using the output port of the horizontal deflection circuit 40. The video preamplifier 60 can be used to amplify the signal transmitted from the video card 10. A low-level image signal (r, G, B) to maintain a low-level signal at a fixed voltage level; and the image main amplifier 70, which can be used to re-amplify the signal from the image pre-amplifier 60, its voltage signal The level was raised from 40 volts peak to 60 volts peak to provide energy to each image pixel. There are two methods for transmitting the horizontal / vertical sync signal and image signal from a computer or other data processing device to the display device. One method is to transmit the image signal (R, G, B) image signal line and synchronization signal line through a cable as shown in Section 2A '. However, in this case, it is transmitted to the connector terminal. The signal varies depending on the monitor manufacturer. In another method, as shown in FIG. 2B, the image signal lines and horizontal / vertical synchronization signals of the image signals (R, G, B) are transmitted through separate cable lines. Here, a D-sub The method needs to be used-an operating system program that can be used to operate the computer. This is due to the execution of the computer, which itself has weak high-frequency characteristics. BNC is used to improve the resolution of high frequency bands. It is often used for the execution of programs such as CAD. The D-sub method is used to exchange information between the display output and the computer, which is called the display data channel (DDC). This means that even if there is no user information on the monitor, the user can still use the information of various related monitors to transmit it. 4 paper sizes are applicable to the Chinese National Standard (CNS) A4 specification (210 * 297 mm). (Please read the notes on the back before filling this page)
經濟部智慧財產局貝工消費合作社印製 A7 ----------B7____ 五、發明說明（3 ) 运到電腦，使得電腦可顯示出最合適的監視器畫面。 大多數的電腦使用者並不具備監視器解析度的提升之 知識’也不瞭解提升監視器解析水準所適合的軟體等常 識。因此，即使使用者具有機能良好的監視器，當軟體需 要高解析畫面時，例如CAD或電玩遊戲，亦將因未具備有 提升解析度方面的知識以及未具備有轉換解析度的能力， 以致於無法充份利用。然而，如果DDC可支援監視器，而 由該監視器發出其本身的資訊（EDID )到電腦，且電腦接 收到所發出的資訊，而在監視器支援的範圍内自動地顯示 出最理想的畫面，而無需顧慮使用者所使用之軟體。這將 使得監視器可顯示出最合適於使用者的狀態。 從監珥器發送到電腦的資訊（EDID )中，其包含有指 不出製造廠商其本身之身份確認證明、指示產品型式名稱 的產品身份確認證明、告知是否顯示電源管理信號 (DPMS )功能支援的資料、crt的特性以及支援的時機 等資訊。關於由監視器傳送到電腦的資訊傳輸模式可被區 分為DDC1以及DDC 2B等兩種模式。請參閱第3A圖，在 DDC1模式中，資料係經由D_sub信號電纜線的第12端子 以一個位元接著下一個位元的方式，由監視器將資訊傳輪 到電腦，並經由D-sub信號電欖的第14端子，以傳送來自 電腦的垂直同步信號（V Sync )，而與DDC1模式之資料 同步’故只要垂直同步信號輸入，128 byte的EDID資訊 將會持續地被傳送著。 請參閲第3B圖，在DDC 2B的模式中，其要求電腦經 ___ 5 本紙張尺度適用中國國家標準（CNS)A4規格⑵〇 x 297 ) — II-----il.——T2------1—t---------- ---線 (锖先閱讀背面之注意事項再填寫本頁) A7 B7 五、發明說明（+) 由信號電纜的第12端子（資料）以及第15端子（時序） 而傳送資料到監視器，然後，該監視器經由信號電纜的第 12端子而傳送EDID資料到電腦。當電腦送出一停止傳輸 信號到監視器，於該停止傳輸信號的判斷資料傳送到監視 器上時，該監視器即停止資料傳輸。大多數〇〇(：模式的監 視器都支援以上的兩種模式，而為了支援Ddc 1與DDC 2B 這兩種模式，一微電腦内部模组將會被使用到。然而在大 多數情形下，一種用於DDC1/2B的精密1C會被採用到， 請參閲第4圖所示。一種資料信號（SDA )與一種時序信 號（SCL)分別經由D-sub電纜線的第12端子與第15端 子來傳輸〇·當時序信號線（第15端子）變成低位準狀態時， 就會完成咚DDC1模式轉移到DDC 2B模式的模式執行。 當模式再次轉移成DDC 2B時，除非監視器的電源被重新 重置’否則將不會再轉移回到DDC1的模式。 其間’當由製造麻商自動控制之畫面資料儲存在外部 設定之電子式可消除可程式准讀記憶體（EEpR〇M)時， 微電腦的時序信號線（SCL)與資料信號線（sda)係透 過信號電境線的第12端子與第15端子，而將資料儲存起 來。因此，如第5圖所示，D D C i / 2 B的資料以及時序線係 與微電腦的資料及時序線互相共用。在這種情況時，當微 電腦的電源是在該微電腦所有的蟀處於低位準狀態而被重 置時，則EEPR0M的時序信號（SCL)與微電腦的時序 (SCL)互相重疊’且亦會維持錢位準狀態。所以， EEPROM因為本身的時序信錢成低位準而轉換為職 I_— _— _ 6 本紙張尺度剌巾關家鮮（CK)A4 (請先wil背面之注意事項再填窝本頁) d • n Bi ----訂----線· A7 A7 經濟部智慧財產局員工消费合作社印製 的 五、發明說明（i) 2B模式。因此，微電腦的電源重置狀態係取決於當監視器 處於低位準狀態時被開啓，而使DDC丨之操作停止。 為更加瞭解上述操作的程序，以下請—併配合參閲第 6A圖與第6B圖的圖示説明。第6A囷係指出EEpR〇M的 操作電壓確實處於電源開啓狀態，而第6B圖則是指出在 EEPROM尚未確實穩住操作電壓前，該微電腦是無法完成 電源開啓的重置操作程序。當該微電腦在大約8到1〇毫秒 的時間内完成電源開啓重置時，該微電腦的所有的埠皆會 維持在約12微秒的低位準狀態。然後，當埠完成啓動時， 微電腦即可開始正常操作。在此種情況下的問題是，於準 備操作的EEPROM依照維持12微秒之低位準狀態去執行 模式移轉。，意即，12微秒的高位準到低位準模式之轉換將 造成時序信號線（SCL)由高位準到低位準模式的轉換| 而產生DDC1錯誤。易言之，處於DDC1模式狀態下的 EEPROM，在該微電腦剛開始判斷轉換進入DDC 2β操作 模式的12微秒重置期間中，即產生了 DDC1錯誤。當微電 腦的所有的埠在電源開啓狀態時皆處於低位準狀態，且診 微電腦的資料信號（SDA)與時序信號（SCL)係彼此2 相連結一起，此為無可避免的現象。 本發明之簡介及功效： 因此，本發明為提供改正顯示裝置DDC錯誤的電路 及其方法，經過改正DDC錯誤的顯示裝置能夠排除習知 相關技術限制及其所產生的問題。 K紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公釐）_ ! I 111111.111^ i— — I 1、1 I 訂· l· I [ I h! I —· <請先《讀背面之注意事項再填寫本1} 五、發明說明（厶） 本發明之目的在於提供一種修正DDC錯誤的電路及 其方法’其可修正微電腦電源開啓重置後強迫性地重置 EEPROM而產生的DDC1錯誤的顯示裝置。 為達成本發明之目的，一種被建構成以一切換元件 (Tr )連線到EEPR〇M的電源供應端子上方式的錯 誤修正*路，且微電腦上一特定埠的輸出信號被傳輸到該 切換元件，在微電腦開始正常操作之後，經由該特定埠去 再次切換該切換元件。 能明瞭的是前面的簡介説明以及接下來的詳細説明， 皆是針對本發明之申請專利範圍而所提出之解釋説明與更 進一步的箦施例説明。 1示簡單説蝻 為求得對本發明有更詳盡的瞭解，在以下所提供的圖 示説明中，其係配合本説明書所例舉之較佳具體實施例， 而對本發明提供更進一步詳細說明。 在以下的圖示説明中： 第1圖係顯示習知顯示裝置架構之方塊圖。 第2A圖係顯示一連結至一電腦系統之顯示裝置信號 線路示意圖。 第2B圖係顯示一連結顯示裝置信號線路之電腦系統 示意圖。 第3 A圖與第3B圖係顯示電腦系統與顯示裝置之間之 DDC傳送模式示意圖。 本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公爱 ) A7 Β7 五、發明說明（，） 第4圖係顯示一種依據Ddc傳送模式之精密積體電路 之連結方式方塊圖。 第5圖係顯π — EEPROM與一微電腦之資料傳輸線以 及時序傳輸線之連結架構示意圖。 第6A圖與第6B圖係顯示EEpR〇M與微電腦操作電 壓之波型示意圖。 圖0 第7圖係顯不依據本發明所提供之DDC錯誤修正電路 第8圖係顯示依據本發明所提供之DDC錯誤修正操作 流程圖。 圖號説明： 信號電境線ΐ -微電腦3 微電腦20 水平偏向電路40 影像前置放大器60 陰極射線管（CRT ) 80 EEPROM 2 影像卡10 垂直偏向電路30 高壓電路50 影像主要放大器7〇 I n i tme ϋ ϋ n i_i at ^ »1 n ϋ *~^PJ· ϋ-at l·— ϋ 1 I · Γ靖先閱讀背面之注委項再填寫本頁) 經 濟 部 智 慧 財 產 局 消 费 合 作 社 印 製 校佳具體實施例之詳評气態明： 請一併參閲圖示說明，以瞭解以下_舉之 佳具體實施例詳細説明。 常月. 請參閲第7圖，該圖係為顯示依據本發明席 施例之DDC錯誤修正電路圖。第 μ i應用. 國 弟7圖所示，DDC錯: 本紙張尺度財關家料（C_NS)A4規格 A7 A7 經 濟 部 智 慧 財 產 局 消 费 合 作 社 印 製 B7 五、發明說明（Z ) 修正電路係包括一可接收色彩信號（R，G，B三原色）之D_ sub信號纜線、一來自電腦之同步信號（水平/垂直同步）、 一執行資訊傳送/接受所利用之特別端、一分別透過信號電 纜線1的第12端子與第15端子進行接收資料信號（Sda) 與時序信號（SCL )之EEPROM 2、一連結到信號電纜線i 上的弟12端子與第15端子以進行傳送/接收時序信號與資 料信號之微電腦3，且該微電腦3會發出一控制信號去一 特疋崞以重置EEPROM 2、一切換元件（Tr)，該切換元 件可用以接收由微電腦3之特定埠所發出到基埠之控制信 號、以及一經由本身輸出EEPROM控制信號之收集埠。 以下7斤述為本發明之DDC錯誤修正電路之操作説 明。隨電源的供應，EEPROM 2維持8到10毫秒之正常操 作電壓。 ‘· · 該微電腦3在完成電源開啓重置後，其會維持其所有 埠保持於12微秒之低位準狀態。然後，EEpR〇N1 2轉換成 DDC 2B模式。在微電腦3完成重置的瞬間，該微電腦3 會輸出一控制信號以驅動切換元件（Tr )到特定埠，該控 制k號將被傳送到切換元件（Tr )之基極，並瞬間開啓切 換元件。因此被提供到EEPR〇M 2電源供應端子之電源瞬 間切斷，而使EEPROM 2被重置回到DDC1的初始狀態。 第8圖係顯示依據本發明之DDC錯誤修正程序之流程 圖。首先，在步驟S1中，EEPROM 2隨著電源的供應而維 持正常操作電壓，在此時，該微電腦尚未完成正常操作之 初始程序。在步驟S2中，該微電腦3完成電源開啓重置約 (請先閲讀背面之注意事項再填寫本頁)Printed by the Shelley Consumer Cooperative of Intellectual Property Bureau of the Ministry of Economic Affairs A7 ---------- B7____ V. Description of Invention (3) Shipped to a computer so that the computer can display the most suitable monitor screen. Most computer users do not have the knowledge to improve the resolution of the monitor ’, nor do they have the general knowledge of software that is suitable for improving the resolution of the monitor. Therefore, even if the user has a well-functioning monitor, when the software requires high-resolution images, such as CAD or video games, they will not have the knowledge to improve the resolution and the ability to convert the resolution, so that Not fully utilized. However, if the DDC can support the monitor, and the monitor sends its own information (EDID) to the computer, and the computer receives the issued information, and automatically displays the optimal picture within the range supported by the monitor Without having to worry about the software the user uses. This will allow the monitor to display the status most suitable for the user. The information (EDID) sent from the monitor to the computer contains the identification confirmation of the manufacturer, product identification confirmation indicating the type name of the product, and notification of whether the power management signal (DPMS) is displayed. Data, crt features, and timing of support. The information transmission mode of the monitor to the computer can be divided into two modes, DDC1 and DDC 2B. Please refer to Figure 3A. In DDC1 mode, the data is transmitted from the monitor to the computer via the 12th terminal of the D_sub signal cable in a bit-by-bit manner, and via the D-sub signal. The 14th terminal of Denim is used to transmit the vertical synchronization signal (V Sync) from the computer and synchronize with the data in DDC1 mode. Therefore, as long as the vertical synchronization signal is input, 128 bytes of EDID information will be continuously transmitted. Please refer to Figure 3B. In the DDC 2B mode, the computer is required to pass ___ 5 This paper size is applicable to the Chinese National Standard (CNS) A4 specification ⑵〇x 297) — II ----- il .—— T2 ------ 1--t ---------- --- line (锖 Read the precautions on the back before filling this page) A7 B7 V. Description of the invention (+) The 12 terminal (data) and the 15th terminal (sequence) transmit data to the monitor, and then the monitor transmits the EDID data to the computer via the 12th terminal of the signal cable. When the computer sends a stop transmission signal to the monitor and the judgment data of the stop transmission signal is transmitted to the monitor, the monitor stops the data transmission. Most 〇〇 (: mode monitors support the above two modes, and in order to support both Ddc 1 and DDC 2B modes, a microcomputer internal module will be used. However, in most cases, A precision 1C for DDC1 / 2B will be adopted, please refer to Fig. 4. A data signal (SDA) and a timing signal (SCL) pass through the 12th and 15th terminals of the D-sub cable respectively. The terminal is used to transmit. When the timing signal line (terminal 15) becomes the low level, the mode execution of DDC1 mode to DDC 2B mode is completed. When the mode is changed to DDC 2B again, unless the monitor power is Re-setting 'Otherwise it will not transfer back to DDC1 mode. In the meantime', when the screen data automatically controlled by the manufacturer is stored in an externally set electronically erasable programmable read-only memory (EEpROM), The microcomputer's timing signal line (SCL) and data signal line (sda) store data through the 12th and 15th terminals of the signal electrical line. Therefore, as shown in Figure 5, the DDC i / 2 B's Data and timing line The data and timing lines of the microcomputer are shared with each other. In this case, when the power of the microcomputer is reset when all the microcomputers are at a low level, the timing signal (SCL) of EEPR0M and the timing of the microcomputer (SCL) ) Overlap with each other 'and will also maintain the level of money. Therefore, the EEPROM is converted to a job because of its own timing letter and money is at a low level. I__ __ Note on the back of wil, please fill in this page again) d • n Bi ---- order ---- line · A7 A7 V. Invention Description (i) 2B model printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs. The power reset state of the microcomputer depends on the monitor being turned on when the monitor is in a low level state, so that the operation of the DDC is stopped. In order to understand the procedure of the above operation, please refer to Figure 6A and Figure 6B together Figure 6A shows that the operating voltage of EEPROM is indeed in the power-on state, and Figure 6B shows that the microcomputer cannot complete the power-on reset before the EEPROM has actually stabilized the operating voltage. Operation process When the microcomputer completes the power-on reset in about 8 to 10 milliseconds, all the ports of the microcomputer will be maintained at a low level of about 12 microseconds. Then, when the port completes the startup, the microcomputer Normal operation can be started. In this case, the problem is that the EEPROM that is ready to operate performs the mode shift according to the state of maintaining the low level of 12 microseconds. That is, the high level of 12 microseconds to the low level mode The conversion will cause the transition of the timing signal line (SCL) from the high level to the low level mode | and DDC1 error will occur. In other words, the EEPROM in the DDC1 mode state, just before the microcomputer started to judge the transition to the DDC 2β operation mode. During the microsecond reset period, a DDC1 error occurred. When all the ports of the microcomputer are at a low level when the power is on, and the data signal (SDA) and timing signal (SCL) of the microcomputer are connected to each other, this is an unavoidable phenomenon. Brief introduction and effects of the present invention: Therefore, the present invention is to provide a circuit and method for correcting DDC errors of a display device. The display device after correcting DDC errors can eliminate the limitations of the conventional technology and the problems that arise. K paper size is applicable to China National Standard (CNS) A4 specification (210 X 297 mm) _! I 111111.111 ^ i — — I 1, 1 I order Note on the back, please fill in this 1) V. Description of the invention (厶) The purpose of the present invention is to provide a circuit and method for correcting DDC errors, which can correct the problem caused by forcibly resetting the EEPROM after the microcomputer power is turned on and reset. DDC1 wrong display device. In order to achieve the purpose of the present invention, an error correction circuit is constructed in which a switching element (Tr) is connected to the power supply terminal of the EEPROM, and an output signal of a specific port on the microcomputer is transmitted to the switch. Component, after the microcomputer starts normal operation, switch the switching component through the specific port again. What can be understood is that the foregoing brief description and the following detailed description are the explanations and further examples for the scope of patent application of the present invention. In order to obtain a more detailed understanding of the present invention, the illustrations provided below are provided in conjunction with the preferred specific embodiments exemplified in this specification to provide a more detailed description of the present invention. . In the following illustrations: Figure 1 is a block diagram showing the structure of a conventional display device. Figure 2A is a schematic diagram showing a signal line of a display device connected to a computer system. Figure 2B is a schematic diagram of a computer system connected to a signal line of a display device. Figures 3A and 3B are schematic diagrams showing the DDC transmission mode between the computer system and the display device. This paper size applies to China National Standard (CNS) A4 specification (210 X 297 public love) A7 B7 V. Description of the invention (,) Figure 4 is a block diagram showing the connection method of a precision integrated circuit based on the Ddc transmission mode. Fig. 5 is a schematic diagram showing the connection structure of the data transmission line between EEPROM and a microcomputer in time sequence transmission line. Figures 6A and 6B are schematic diagrams showing waveforms of EEPROM and microcomputer operating voltage. Fig. 0 and Fig. 7 show a DDC error correction circuit provided according to the present invention. Fig. 8 shows a flowchart of a DDC error correction operation provided according to the present invention. Description of drawing number: Signal electric line ΐ-microcomputer 3 microcomputer 20 horizontal deflection circuit 40 image preamplifier 60 cathode ray tube (CRT) 80 EEPROM 2 image card 10 vertical deflection circuit 30 high voltage circuit 50 main image amplifier 70i ni tme ϋ i n i_i at ^ »1 n ϋ * ~ ^ PJ · ϋ-at l · — ϋ 1 I · Γ Jing first read the note on the back before filling out this page) Printed by the Intellectual Property Bureau of the Ministry of Economic Affairs Detailed description of the examples: Please refer to the illustrations together to understand the detailed description of the following specific examples. Changyue. Please refer to FIG. 7, which is a diagram showing a DDC error correction circuit according to an embodiment of the present invention. Application #i. DDC shown in Figure 7, DDC is wrong: This paper scales financial materials (C_NS) A4 specifications A7 A7 Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economics B7 V. Description of the invention (Z) The correction circuit includes A D_ sub signal cable that can receive color signals (R, G, B three primary colors), a synchronization signal from the computer (horizontal / vertical synchronization), a special terminal used for information transmission / reception, and a signal cable respectively The 12th and 15th terminals of line 1 perform EEPROM for receiving data signals (Sda) and timing signals (SCL) 2. A 12th terminal and 15th terminal connected to the signal cable i are used for transmitting / receiving timing signals And the data signal of the microcomputer 3, and the microcomputer 3 will send a control signal to reset the EEPROM 2, and a switching element (Tr), which can be used to receive the basic port sent from the specific port of the microcomputer 3 Control signal of the port, and a collection port that outputs an EEPROM control signal through itself. The following 7 pounds is an operation description of the DDC error correction circuit of the present invention. With the power supply, the EEPROM 2 maintains a normal operating voltage of 8 to 10 milliseconds. ‘·· After the microcomputer 3 completes the power-on reset, it will keep all its ports at a low level of 12 microseconds. Then, EEPRON1 2 is switched to DDC 2B mode. When the microcomputer 3 finishes resetting, the microcomputer 3 will output a control signal to drive the switching element (Tr) to a specific port. The control k number will be transmitted to the base of the switching element (Tr) and the switching element will be turned on instantly. . Therefore, the power supplied to the power supply terminal of EEPROM 2 is cut off momentarily, and the EEPROM 2 is reset to the initial state of DDC1. Fig. 8 is a flowchart showing a DDC error correction procedure according to the present invention. First, in step S1, the EEPROM 2 maintains a normal operating voltage as power is supplied. At this time, the microcomputer has not completed the initial procedure for normal operation. In step S2, the microcomputer 3 completes power-on reset (please read the precautions on the back before filling this page)
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