1438twf/MuIder Hu/002 A7 1438twf/MuIder Hu/002 A7 經濟部中央標準局員工消費合作社印製 五、發明説明（I ) 本發明是有關於積體電路製程，且特別是有關於一積 體電路阻障層形成之方法。 氮化鈦（TiN)是現在高密度積體電路製程裡，使用最 廣泛的一種阻障材料，且爲了提昇金屬對矽進行歐姆式接 觸的能力，氮化鈦阻障層在接觸金屬化製程上是和金屬鈦 一起搭配，而以鈦/氮化鈦形式存在。以合金的接觸製程 爲例，整個金屬的結構將是由鈦/氮:化鈦/合金所組合成 的，以便使接觸界面的功函數降低，並達到抑制尖峰及電 移現象發生。 習知一種積體電路阻障層及內連線形成之方法是先 形成一金屬鈦層，然後以物理氣相沈積方式形成一氮化欽 層於金屬鈦層上，以作爲阻障層，其厚度約爲800〜1200A ; 之後’施以一快速熱回火氮化程序（Rapid Thermal NitindaUon : RTN) ’使其晶粒間充滿氮氣，形成—與金 屬鈦層接觸性較佳之氮化鈦阻障層。然後，再形成一耐熱 且導電性佳的金屬層例如是金屬鎢層於其上，再回蝕刻 之，構成一連接不同金屬層之鎢插栓；刷洗晶面表面後， 可進行另層金屬連線之佈局；此習知之方法在第u〜1D 圖詳細說明之。 首先，請先參照第1A圖，一絕緣層例如是二氧化砂層 12形成於半導體基底1〇上，其上包含有裸露出基底表面 之開□ 13 ’用以作爲連接不同金屬層間的內連線通道。 其次，請參照第1B圖，先形成一黏著金屬層14例如 是金屬鈦層於絕緣層12及開口 13底部之基底表面，然後 _ 3 本紙張尺度適用中國CNS) A4規格（21GX297公羞) (請先閱讀背面之注意事項再填寫本頁) -裝_1438twf / MuIder Hu / 002 A7 1438twf / MuIder Hu / 002 A7 Printed by the Consumer Cooperatives of the Central Standards Bureau of the Ministry of Economic Affairs V. Description of the Invention (I) The present invention relates to the process of integrated circuits, and in particular to an integrated circuit Method for forming barrier layer. Titanium nitride (TiN) is the most widely used barrier material in high-density integrated circuit manufacturing. In order to improve the ability of metal to make ohmic contact with silicon, the titanium nitride barrier layer is used in the contact metallization process. It is paired with metallic titanium and exists in the form of titanium / titanium nitride. Taking the alloy contact process as an example, the structure of the entire metal will be composed of titanium / nitrogen: titanium / alloy in order to reduce the work function of the contact interface and to suppress the occurrence of spikes and electromigration. A method for forming an integrated circuit barrier layer and interconnects is known. First, a titanium metal layer is formed, and then a nitride layer is formed on the titanium metal layer as a barrier layer by physical vapor deposition. The thickness is about 800 ~ 1200A; afterwards, a “rapid thermal NitindaUon: RTN” is applied to fill the grains with nitrogen, forming—a titanium nitride barrier with better contact with the metal titanium layer Floor. Then, a heat-resistant and highly conductive metal layer such as a metal tungsten layer is formed thereon, and then etched back to form a tungsten plug connecting different metal layers; after the surface of the crystal plane is brushed, another metal connection can be performed. The layout of the lines; this conventional method is explained in detail in the u ~ 1D drawings. First, please refer to FIG. 1A. An insulating layer is, for example, a sand dioxide layer 12 formed on a semiconductor substrate 10, which includes an opening exposed on the surface of the substrate □ 13 ′, which is used as an interconnection between different metal layers. aisle. Secondly, please refer to FIG. 1B, first form an adhesive metal layer 14 such as a metal titanium layer on the base surface of the insulating layer 12 and the bottom of the opening 13, and then _ 3 This paper size is applicable to China CNS) A4 size (21GX297) (Please read the notes on the back before filling out this page)-装 _
-、1T _ B7 I4j8twf/Mulder Hu/002 五、發明説明（上） 再以物理氣相沈積法，形成一厚度約爲800〜1200A之阻 障層例如是氮化鈦層15於金屬鈦層Η上。 然後，請參照第1C圖，在溫度約爲550〜900的環 境下進行快速熱回火氮化反應（raPid thermal nitridation : RTN) ’使氮化鈦層16之晶粒間充滿氮氣， 形成一與黏著金屬層14接觸能力較佳之氮化鈦阻障層 。接著，形成一耐熱性佳且導電性良好之材質，例如是 ‘金屬鎢層18於氮化鈦阻障層16’上’並將開口 13塡滿. 接著，請參照第1D圖，以氮化鈦層15’爲蝕刻終點， 回蝕刻金屬鎢層18，形成一鎢插栓18’ ；其中，部份氮化 鈦層在回蝕刻過程中亦被蝕刻掉，形成一較薄的氮化欽層 15，，〇 最後，請參照第IE圖，形成一導電層例如是鋁矽銅或 鋁銅合金於氮化欽層15’’及鎢插栓18’上，然後經微影成 像程序及蝕刻定義後，形成一連接鎢插栓18’之金屬內連 線20。 然此氮化鈦層是以物理氣相沈積法所形成的，其厚度 較厚，造成鎢插栓之塡滿能力下降，故本發明提出一種以 化學氣相沈積法來取代習知製程中以物理氣相沈積法沈 積阻障層’而形成一厚度爲習知技術之約十分之、一的氮化 鈦阻障層’但若繼續沿用習知之製程，則在後續回蝕刻過 程中’此薄度甚薄的氮化鈦阻障層會在蝕刻過程中產生缺 陷’甚至完全被飩刻掉，裸露出其下層之金屬鈦層，且金 屬鈦層極易氧化，會造成金屬連線蝕刻不易，會產生短路。 ___ 4 尺度適用中國國家系^( CNS) M規格（210 X 297公釐） - _ I .-------CI、丫裝-- (請先閲讀背面之注意事項再填寫本頁} 訂 經濟部中夬標準局員工消費合作杜印製 A7 B7 1 438twf/Mulder Hu/002 五、發明説明（3 ) 此改良習知技術之製程以第2A〜2E圖詳細說明之。 ,、裝 (請先閱讀背面之注意事項再填寫本頁) 首先/請先參照第2 A圖，一絕緣層例如是二氧化5夕層 12位於半導體基底10上，其上包含有裸露出基底表面之 開口 13，用以作爲不同金屬層間的內連線。 其次，請參照第2B圖，先形成一黏著金屬層14例如 是金屬鈦層於絕緣層12及開口 13底部之基底表面，然後 再以化學氣相沈積法，形成一厚度約离50〜300A之氮化 鈦阻障層16於金屬鈦層14上。 然後，請參照第2C圖，形成一耐熱性佳且導電性良好 之材質，例如是金屬鎢層18於氮化黏著金屬層16上，並 塡滿該開口 13。 接著，請參照第2D圖，回蝕刻金屬鎢層18，形成一 鎢插栓18’ ；其中，此一薄的化學氣相沈積法形成之部份 氮化鈦層16，在回触刻過程中（over-etching step)亦被 蝕刻掉，甚至完全被去除，並裸露出金屬鈦層，如標號 17 a、17 b所示之區域。 經濟部中央標準局員工消費合作社印製 最後，請參照第2E圖，形成一導電層例如是鋁矽銅合 金、鋁矽銅合金、或金屬鋁層於氮化鈦層16”及鎢插栓18’ 上，然後經微影成像程序及餽刻定義後，形成一連接鎢插 栓18’之金屬內連線20。但其中因區域17a及17b已曝露 出金屬鈦14表面，極易被氧化，而在金屬內連線20的蝕 刻過程中不易被蝕刻完全，易留下殘留物於金屬內連線 間，而造成短路。 有鑒於此，本發明提出一積體電路阻障層形成之方 5 本紙張尺度適用中國國家標準（CNS ) A4規格（210X297公釐） !438twf/Muider Hu/002 A7 !438twf/Muider Hu/002 A7 經濟部中央標率局員工消費合作社印製 五、發明説明（^) 法，其步驟包括：提供一半導體基底，其上並形成有電子 元件；形成一絕緣層於該半導體基底元件上，該絕緣層上 並形成至少一開口，以作爲連接金屬內連線之通道；形成 一第一金屬層於該絕緣層及該開口之側壁及底部；以化學 氣相沈積法形成一第一阻障層於該第一金屬層上；形成一 第二金屬層於該第一阻障層上，並塡滿該開口；回蝕刻該 第二金屬層，在該開口內形成一第二金屬構成之插栓；以 及再沈積一薄的第三金屬層於該第一金屬層及該金屬插 栓表面，並進行快速熱回火氮化反應，形成一第二阻障層， 並覆蓋該金屬插栓表面及在蝕刻過程中裸露出來之該第 一金屬層表面。 藉此，可降低在製造金屬連線時所造成的元件缺陷， 避免產生短路現象，提昇產率，且其表面以一薄阻障層保 護亦可避免在刷洗過程中損壞表面元件。 爲讓本發明之上述和其他目的、特徵、和優點能更明 顯易懂，下文特舉一較佳實施例，並配合所附圖式，作詳 細說明如下= 圖式之簡單說明： . 第1A〜1E圖是習知一種積體電路阻障層及內連線之 剖面製造流程圖。 第2A〜2E圖是根據習知積體電路阻障層及內連線之 製程加以改良之剖面製造流程圖。 第3A〜3F是根據本發明之積體電路阻障層及內連線 之剖面製造流程圖。 6 本紙張尺度適用中國國家標準（CNS ) A4規格（210X297公釐） (請先閱讀背面之注意事項再填寫本頁) >裝- 訂 A7 B7 1 438twf/MuIder Hu/002 五、發明説明（Γ) 實施例： 首先，請參照第3A圖’提供一如第U瞻所示之積體 電路結構，其具有一絕緣層例如是二氧化砂膺12位於半導 體基底10上，其上包含有裸露出基底表面之開口 13，用 以作爲不同金屬層間的內連線。 其次，請參照第3B圖，先形成一黏箸金屬層（Glue layer)14，例如是金屬鈦餍’於絕緣層丨2及開口底部之 基底表面，然後再以化學氣相沈積法’形成〜厚度約爲50 〜300A之阻障金屬層（Barrier metal) ’例如是一氮化欽 層16，位於金屬鈦層14上；其中，是以含鈦金屬之無機 物如四氯化鈦（TiCIO與含氮氣體如氨氣（NH〇反應，或是 含欽與氮所構成之有機金屬化合物如四，二甲基胺鈦 T i (丽e 2) 4，作爲化學氣相沈積之氣fe來源。 然後，請參照第3C圖，選取耐熱性佳且導電性良好之 材質例如是鎢、鈦、鉑或鉬，在本實施例是形成一金屬鎢 層18於氮化鈦阻障層16上，並塡滿開口 13。 接著，請參照第3D圖，回蝕刻金屬鎢曆18，形成一 鎢插检18 ’，其中，部份氮化欽層16在回軸刻過程中亦被 蝕刻掉，使得金屬鈦層14裸露出來。 然後’請參照第3E圖，在溫度約爲550〜900 °C瓌境 下進行快速熱回火氮化反應（Rapid Thermal Nitridation : RTN) ’時間約介於20〜120秒，形成一薄 的氮化鈦層17於在回蝕刻過程被蝕刻掉的氮化鈦區域所 裸露的金屬鈦層14上。 〜 7 氏張尺度適用中國國家標準（CNS ) A4規格（21〇'χ297公釐 (請先閲讀背面之注意事項再填寫本頁) 訂 ,ΐ. 經濟部中央標準局員工消費合作社印製 A7 1 4381wf/MuIder Hu/002 五、發明説明（t ) 最後，請參照第3F圖，形成—導電層例如是鋁矽銅合 金、鋁銅合金或是金屬鋁層於氮化鈦層17及鎢插栓18, 上’然後經微影成像程序及蝕刻定義後，形成一連接鎢插 栓18’之金屬內連線20。 藉此，本發明利用化學氣相沈積法來製作氮化鈦阻障 餍14，使金屬鎢之塡滿能力提昇，且本發明在鎢插栓18, 製作完成後，再沈積一薄金屬鈦層並施一快速熱回火氮化 反應’再生另薄一氮化鈦層17，修補因回蝕刻金屬鎢層 18時所造成的氮化鈦表面缺陷’防止金屬欽層14的裸露， 排除習知製程的缺點。 雖然本發明已以一較佳實施例揭露如上，然其並非用 以限定本發明，任何熟習此技藝者，在不脫離本發明之精 神和範圍內，當可作些許之更動與潤飾，因此本發明之保 護範圍當視後附之申請專利範圍所界定者爲準。 ---------^ (Γ 裝-- (請先閱讀背面之注意事項再填寫本頁) 訂 經濟部中央揉準局員工消費合作.社印製 本紙張尺度適用中國國家榇準（CNS ) M規格（210X 297公釐}-、 1T _ B7 I4j8twf / Mulder Hu / 002 5. Description of the invention (top) Then a physical vapor deposition method is used to form a barrier layer with a thickness of about 800 ~ 1200A, such as a titanium nitride layer 15 and a metal titanium layer. on. Then, referring to FIG. 1C, a rapid thermal tempering nitridation (RTN) reaction is performed in an environment with a temperature of about 550 ~ 900. 'The grains of the titanium nitride layer 16 are filled with nitrogen to form an The titanium nitride barrier layer with better contact ability of the adhesive metal layer 14. Next, a material with good heat resistance and good conductivity is formed, for example, 'the metal tungsten layer 18 is on the titanium nitride barrier layer 16' and the opening 13 is filled. Next, please refer to FIG. 1D to nitride The titanium layer 15 'is the end point of the etch. The metal tungsten layer 18 is etched back to form a tungsten plug 18'. Part of the titanium nitride layer is also etched away during the etch-back process to form a thinner nitride layer. 15 ,, Finally, please refer to the IE diagram, and form a conductive layer such as aluminum silicon copper or aluminum copper alloy on the nitride layer 15 "and tungsten plug 18 ', and then define it by lithography imaging and etching. Then, a metal interconnect 20 is formed to connect the tungsten plug 18 '. However, the titanium nitride layer is formed by a physical vapor deposition method, and its thickness is thicker, which reduces the capacity of tungsten plugs. Therefore, the present invention proposes a chemical vapor deposition method to replace the conventional method in the conventional process. The physical vapor deposition method deposits a barrier layer to form a titanium nitride barrier layer having a thickness of about one-tenth that of the conventional technology. However, if the conventional process is continued, it will be thinner in the subsequent etch-back process. The extremely thin titanium nitride barrier layer will cause defects during the etching process, or even be completely etched away, exposing the underlying metal titanium layer, and the metal titanium layer is extremely easy to oxidize, which will make it difficult to etch the metal wiring. A short circuit may occur. ___ 4 scales are applicable to the Chinese National System ^ (CNS) M specification (210 X 297 mm)-_ I .------- CI, Y ----- (Please read the precautions on the back before filling this page} Order the consumer cooperation of the China Standards Bureau of the Ministry of Economic Affairs Du printed A7 B7 1 438twf / Mulder Hu / 002 V. Description of the invention (3) The process of this improved conventional technology is described in detail in Figures 2A ~ 2E. Please read the precautions on the back before filling in this page.) First / please refer to Figure 2A. An insulating layer such as a sulphur dioxide layer 12 is located on the semiconductor substrate 10, which includes an opening 13 that exposes the surface of the substrate. For the interconnection between different metal layers. Secondly, please refer to FIG. 2B, first form an adhesive metal layer 14 such as a metal titanium layer on the base surface of the insulating layer 12 and the bottom of the opening 13, and then use the chemical vapor phase. The deposition method forms a titanium nitride barrier layer 16 with a thickness of about 50 to 300 A on the metal titanium layer 14. Then, referring to FIG. 2C, a material with good heat resistance and good conductivity is formed, such as metal tungsten. The layer 18 is on the nitride-bonded metal layer 16 and fills the opening 13. Then, please Referring to FIG. 2D, the metal tungsten layer 18 is etched back to form a tungsten plug 18 '; wherein, a part of the titanium nitride layer 16 formed by this thin chemical vapor deposition method is over-etched (over- The etching step) is also etched away, or even completely removed, and the titanium metal layer is exposed, as shown by the areas 17a and 17b. Finally, printed by the Consumer Cooperatives of the Central Standards Bureau of the Ministry of Economic Affairs, please refer to Figure 2E. A conductive layer is formed, for example, an aluminum-silicon-copper alloy, an aluminum-silicon-copper alloy, or a metal aluminum layer on the titanium nitride layer 16 ″ and the tungsten plug 18 ′, and then is defined by a lithography imaging program and a feed definition to form a connection Tungsten plug 18 'has a metal interconnect 20. However, because the areas 17a and 17b have exposed the surface of the metal titanium 14, it is very easy to be oxidized, and it is not easy to be completely etched during the etching process of the metal interconnect 20, which is easy to stay The bottom residue is between the metal interconnects, causing a short circuit. In view of this, the present invention proposes a method for forming an integrated circuit barrier layer 5 The paper size is applicable to the Chinese National Standard (CNS) A4 specification (210X297 mm)! 438twf / Muider Hu / 002 A7! 438twf / Muider Hu / 002 A7 Printed by the Consumers' Cooperative of the Central Standards Bureau of the Ministry of Economic Affairs 5. The invention description method includes the following steps: providing a semiconductor substrate on which electronic components are formed; and forming an insulating layer on the semiconductor substrate components. At least one opening is formed on the insulating layer to serve as a channel for connecting metal interconnects; a first metal layer is formed on the insulating layer and the sidewalls and the bottom of the opening; and a first barrier layer is formed by a chemical vapor deposition method On the first metal layer; forming a second metal layer on the first barrier layer and filling the opening; etch back the second metal layer to form a second metal plug in the opening And depositing a thin third metal layer on the first metal layer and the surface of the metal plug, and performing a rapid thermal tempering nitridation reaction to form a second barrier layer and covering the surface of the metal plug and The surface of the first metal layer is exposed during the etching process. This can reduce component defects caused during the manufacture of metal wiring, avoid short-circuiting, improve yield, and protect the surface with a thin barrier layer to prevent damage to surface components during the brushing process. In order to make the above and other objects, features, and advantages of the present invention more comprehensible, a preferred embodiment is exemplified below, and in conjunction with the accompanying drawings, the detailed description is as follows = Brief description of the drawings:. 1A Figure ~ 1E is a cross-section manufacturing flowchart of a conventional integrated circuit barrier layer and interconnects. Figures 2A to 2E are cross-section manufacturing flowcharts that have been modified based on the process of the conventional integrated circuit barrier layer and interconnects. Sections 3A to 3F are cross-sectional manufacturing flowcharts of the integrated circuit barrier layer and interconnects according to the present invention. 6 This paper size applies Chinese National Standard (CNS) A4 specification (210X297 mm) (Please read the precautions on the back before filling this page) > Binding-Order A7 B7 1 438twf / MuIder Hu / 002 5. Description of the invention ( Γ) Example: First, please refer to FIG. 3A to provide a integrated circuit structure as shown in FIG. U, which has an insulating layer such as sand dioxide 12 on a semiconductor substrate 10, which includes an exposed layer. An opening 13 is formed on the surface of the substrate, and is used as an interconnection between different metal layers. Next, please refer to FIG. 3B. First, a gluing metal layer (Glue layer) 14 is formed, for example, metal titanium is formed on the surface of the insulating layer 2 and the bottom of the opening, and then formed by chemical vapor deposition. A barrier metal layer (barrier metal) having a thickness of about 50 to 300 A is, for example, a nitride layer 16 on the metal titanium layer 14; among them, an inorganic substance containing titanium metal such as titanium tetrachloride (TiCIO and Nitrogen gas such as ammonia gas (NH0 reaction, or organic metal compounds such as tetrakis, dimethylamine titanium T i (Li e 2) 4 containing Chin and nitrogen), as the source of the gaseous chemical vapor deposition. Then Please refer to FIG. 3C, select a material with good heat resistance and good conductivity, such as tungsten, titanium, platinum or molybdenum. In this embodiment, a metal tungsten layer 18 is formed on the titanium nitride barrier layer 16, and The full opening 13. Next, referring to FIG. 3D, the metal tungsten calendar 18 is etched back to form a tungsten insertion test 18 ', in which a part of the nitrided layer 16 is also etched away during the etch back process, so that the metal titanium Layer 14 is exposed. Then 'Refer to Figure 3E, at a temperature of about 550 ~ 900 ° C 瓌Rapid Thermal Nitridation (RTN) is performed in the environment. The time is about 20 ~ 120 seconds. A thin titanium nitride layer 17 is formed in the titanium nitride area that is etched away during the etch-back process. Exposed metal titanium layer 14. The 7-square scale is applicable to China National Standard (CNS) A4 specifications (21〇'297 mm (please read the precautions on the back before filling this page) Order, ΐ. Central Standard of the Ministry of Economic Affairs Printed by the Consumer Cooperative of the Bureau A7 1 4381wf / MuIder Hu / 002 V. Description of the Invention (t) Finally, please refer to Figure 3F to form-the conductive layer is, for example, aluminum silicon copper alloy, aluminum copper alloy or metal aluminum layer on nitrogen After the titaniumization layer 17 and the tungsten plug 18 are formed, a metal interconnect 20 connected to the tungsten plug 18 'is formed after the lithography imaging process and the etching definition. Thus, the present invention utilizes a chemical vapor deposition method to The titanium nitride barrier rhenium 14 is produced to enhance the full capacity of the metal tungsten. After the tungsten plug 18 is completed, a thin metal titanium layer is deposited and a rapid thermal tempering nitridation reaction is performed. Another thin titanium nitride layer 17, repairing metal tungsten due to etch back The surface defect of titanium nitride caused at 18 o'clock prevents the bare metal layer 14 from being exposed and eliminates the disadvantages of the conventional process. Although the present invention has been disclosed above with a preferred embodiment, it is not intended to limit the present invention. Those skilled in the art can make some modifications and retouching without departing from the spirit and scope of the present invention. Therefore, the scope of protection of the present invention shall be determined by the scope of the attached patent application. ------ --- ^ (Γ equipment-(Please read the notes on the back before filling out this page) Order the consumer cooperation of the Central Bureau of the Ministry of Economic Affairs. The paper size printed by the company is applicable to China National Standards (CNS) M specifications ( 210X 297 mm}