TW381346B - Manufacturing method for metal reflection layer of CMOS semiconductor photo sensor - Google Patents

Manufacturing method for metal reflection layer of CMOS semiconductor photo sensor Download PDF

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TW381346B
TW381346B TW87113485A TW87113485A TW381346B TW 381346 B TW381346 B TW 381346B TW 87113485 A TW87113485 A TW 87113485A TW 87113485 A TW87113485 A TW 87113485A TW 381346 B TW381346 B TW 381346B
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Taiwan
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metal
reflective layer
layer
metal reflective
manufacturing
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TW87113485A
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Chinese (zh)
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Ming-Yi Chen
Yung-Jie Fan
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United Microelectronics Corp
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Abstract

A kind of manufacturing method for metal reflection layer which can increase the sensitivity of CMOS semiconductor photo sensor. The method includes additionally forming a layer of metal material with high reflection coefficient which can reflect the inclined incident photons into sensing area so that the incident photons can enter the sensing area from multiple directions; therefore, by increasing the number of photons entering sensing area to increase the sensitivity of photo sensor.

Description

3504twf.RTF/0〇6 __________ B7 五、發明説明(/ ) 本發明是有關於一種光感測器的結構及其製造方法, 且特別是有關於一種互補式金氧半導體光感測器之金屬反 射層的製造方法,以在隔離區內額外形成—層具有高反射 係數的物質,使得射入感測區的光子數目增加。 習知中用於影像擷取之數位(Digital)感測器,常使 用電荷耦合兀件(Charge Coupled Device; CCD),其應用 方面包括監視器、攝影機、照像機等,然而CCD的成本 昂貴’而且其體積無法有效縮小。因此爲了因應目前體積 小型化、低耗能量和低製造成本的要求,故而發展出一種 具有互補式金氧半導體(CMOS)光二極體(Photo Diode) 元件的光感測器(Photo Sensor),以應用既有的半導體製 程技術,來降低生產的成本,並減小感測器的體積。而且 CMOS本身又有低耗能量的優點,因此便逐漸成爲目前發 展的趨勢。而此種具有CMOS感光二極體元件的光感測器 更可應用至PC照相機(PC Camera)以及數位式照相機 (Digital Camera)等商業應用上。 光二極體係利用P-N接合(P-N Junction),將光能變 換爲電氣信號的半導體受光元件(或稱爲光感測元件)。 當在沒有入射光照射之狀態時,因爲P-N接合內部有電場 存在’ N層中的電子或P層中的電洞’不會向相對層中擴 散。然而,當具有足夠能量的入射光入射時,因爲光能的 激發而產生電子-電洞對,兩者均擴散至接合部。當達到 接合部後,由於所存在之內部電場的作用,電子向N側且 電洞向P側分離,進而積蓄,使P-N接合電極間發生電流。 3 ___ 本紙張尺度適州中國國家標準(CNS ) A4規格(210X297公釐) -------------裝------訂------線 (誚先閲讀背面之注意事項再填寫本頁) A7 B7 3 5 04twf.RTF/006 五、發明説明(i ) 理想上,光二極體在黑暗之中的作用相當於開路(Open Circuit),亦即沒有光電流的產生。 第1圖爲繪示習知一種CMOS感_器的結構剖面示意 圖。如第1圖所示,習知傳統之CMOS感測器的結構包括: 基底100 ; P型井101,位於基底100上;第一與第二場氧 化層102, 103,位於p型井101上,定義出元件主動區104 ; 閘極氧化層105,位於該元件主動區104上;閘極導電層 106,位於閘極氧化層105上;第一與第二間隙壁層107, 108,分別位於閘極導電層106兩側邊及閘極氧化層105上; 第一與第二淡摻雜汲極109, 110,分別位於第一與第二間 隙壁層107, 108下方之p型井101表面上;第一源極/汲極 112,位於第一淡摻雜汲極109與第一場氧化層102之間的 P型井101表面上;以及’第二源極/汲極113,位於該第 二淡摻雜汲極110與該第二場氧化層103之間的p型井101 表面上。第一源極/汲極113作爲感光缺乏(depletion region) 區。 當入射光子穿透閘極氧化層105而進入感光缺乏區113 時’便會引起上述之光電效應,而在P-N接合面上形成光 電流。對任一光感測器而言’在相同入射光的條件下,能 使得較多的光子到達感光缺乏區,便能具有更高的靈敏度 (Sensitivity)。一般而言,增加入射光子數目最簡易的方 法便是增加受光面的表面積,亦即感光缺乏區113的上表 面。 然而,當對元件積集度的要求越來越高時,以增加受 4 本紙張尺度適;1】中囡國家標準(CMS ) A4規格(210X297公釐) — -----------裝------訂------線 (誚先閲讀背面之注意事項/}填寫本頁)3504twf.RTF / 0〇6 __________ B7 V. Description of the Invention (/) The present invention relates to the structure and manufacturing method of a light sensor, and in particular to a metal of a complementary metal-oxide-semiconductor light sensor The manufacturing method of the reflective layer is to additionally form a layer with a high reflection coefficient in the isolation region, so that the number of photons entering the sensing region increases. Digital sensors used for image capture in the past often use a Charge Coupled Device (CCD). Applications include monitors, cameras, and cameras. However, the cost of CCDs is expensive. 'And its volume cannot be effectively reduced. Therefore, in order to meet the current requirements of miniaturization, low energy consumption and low manufacturing costs, a photo sensor with complementary metal-oxide-semiconductor (CMOS) photo diodes has been developed. The existing semiconductor process technology is used to reduce the cost of production and reduce the size of the sensor. And CMOS itself has the advantage of low power consumption, so it has gradually become the current development trend. Such a light sensor with a CMOS photodiode element can be further applied to commercial applications such as a PC camera and a digital camera. Photodiode systems use P-N junctions (P-N junctions) to convert light energy into electrical signals, which are semiconductor light-receiving elements (also called light-sensing elements). When there is no irradiation with incident light, there is an electric field existing in the P-N junction, and the electrons in the N layer or the holes in the P layer will not diffuse into the opposite layer. However, when incident light having sufficient energy is incident, electron-hole pairs are generated due to the excitation of the light energy, and both diffuse to the junction. After reaching the junction, due to the effect of the internal electric field, the electrons are separated toward the N side and the holes are separated toward the P side, and then accumulated, so that a current flows between the P-N junction electrodes. 3 ___ This paper is compliant with China State Standard (CNS) A4 size (210X297 mm) ------------- installation ------ order ------ line (诮Read the notes on the back before filling this page) A7 B7 3 5 04twf.RTF / 006 V. Description of the Invention (i) Ideally, the role of a photodiode in the dark is equivalent to an open circuit, that is, there is no Generation of photocurrent. FIG. 1 is a schematic cross-sectional view showing a structure of a conventional CMOS sensor. As shown in FIG. 1, the structure of a conventional CMOS sensor includes: a substrate 100; a P-type well 101 on the substrate 100; first and second field oxide layers 102 and 103 on the p-type well 101 The gate active layer 104 is defined; the gate oxide layer 105 is located on the element active area 104; the gate conductive layer 106 is located on the gate oxide layer 105; the first and second gap wall layers 107 and 108 are respectively located Gate conductive layer 106 on both sides and gate oxide layer 105; first and second lightly doped drain electrodes 109, 110 are located on the surface of p-type well 101 below first and second spacer layers 107, 108, respectively On; the first source / drain 112 is located on the surface of the P-type well 101 between the first lightly doped drain 109 and the first field oxide layer 102; and the 'second source / drain 113 is located on the On the surface of the p-type well 101 between the second lightly doped drain electrode 110 and the second field oxide layer 103. The first source / drain 113 functions as a depletion region. When the incident photons penetrate the gate oxide layer 105 and enter the photodeficiency region 113 ', the above-mentioned photoelectric effect is caused, and a photocurrent is formed on the P-N junction surface. For any light sensor, under the condition of the same incident light, more photons can reach the photodeficiency region, and it can have higher sensitivity (Sensitivity). In general, the easiest way to increase the number of incident photons is to increase the surface area of the light-receiving surface, that is, the upper surface of the photodeficiency region 113. However, when the requirements for component accumulation are getting higher and higher, it is appropriate to increase the size of 4 papers; 1] China National Standard (CMS) A4 specification (210X297 mm) — -------- --- install -------- order ------ line (诮 read the precautions on the back first /) fill in this page

I 35〇4twf.RTF/006 A 7 B7 五、發明説明(>) -- 光表面積而提昇光感測靈敏度的方法便有實行上的困難。 因此本發明的主要目的就是在提供—種互補式金氧半 導體光感測翻結構及其製造方法,包括在隔離區內額外 形成-顧有高反射係數的物質,能將光子反射進入感測 區內,使得入射光子能由多個方向進入感_@,增_ 入感測區內的光子數目,以提昇光感測器的靈敏度。 爲讓本發明之上述和其他目的、特徵、和優點能更明 顯易懂’下文特舉一較佳實施例,並配合所附圖式,作詳 細說明如下: 圖式之簡單說明: 第1圖爲繪示習知一種CMOS感測器的結構剖面示意 圖; 第2A圖至第21圖爲繪示依照本發明一較佳實施例之 互補式金氧半導體光感測器的製造流程剖面圖。 圖式中標示之簡單說明: 100,200 :矽基底 102,1〇3,202 :場氧化層 2〇2a :隔離島 2〇4 :磊晶矽層 2〇6,206a :金屬層 2〇8 ’ 208a :絕緣層 第2A圖至第21所示者,爲說明與本發明有關之一較 佳實施例中,CMOS光感測器之光反射層的製造流程剖面 _5 _______ 本紙張尺度4則鋼家轉(CNS ) A4規格(21GX297公楚) (誚先閲讀背面之注意事項再硪寫本頁) 裝. 線. 經浐部中夾i?.£f而^: >-,消贽合作.衫印^ 經泸部中火樣^消於合作妇印繁 3504twf.RTF/006 A7 B7 ,..., —— — —- -· — 1 *1 _ 五'發明説明(7) 圖。 請參照第2A圖’首先在一提供之矽基底200上形成 一層厚的場氧化層(Field Oxide) 202,其中場氧化層 例如是二氧化矽(Si〇2),並將場氧化層202以微影触刻 步驟定義成隔離島202a ’如桌2B圖中所示。 接著’如第2C圖中所示,在隔離島202a之間,以例 如選擇性之磊晶製程方式,形成P型井之矽磊晶層204。 再於隔離島202a其中之一上,以微影蝕刻的方式形成一 道深渠溝205,如第2D圖中所示。其中在鄰近此形成深渠 溝205支隔離島202a之磊晶矽層204部分,爲後續製程中 將形成CMOS感測器之感光區的部分。 請參照第2E圖,在基底200上沉積一層具有高反射 率的金屬層206,例如鎢或鈦金屬,此沉積之金屬層並塡 滿深渠溝205。再對金屬層206進行一例如乾蝕刻製程之 回倉虫手續,將位於磊晶矽層204以及隔離島202a上之金屬 層206去除,於深渠溝205內形成金屬反射層206a,並使 金屬反射層206a之高度略低於隔離島202a之上表面,以 形成一淺渠溝205a,如第2F圖中所示。 再如第2G圖中所示,在基底200上,以例如化學氣 相沉積法(Chemical Vapor Deposition ; CVD),形成一層 絕緣層208,如二氧化矽(Si02)或氮化矽(SiN),並塡 滿淺渠溝205a。再將隔離島202a以及晶晶砂層204表面 之絕緣層208以一回蝕製程移除,以形成一絕緣層208a, 以隔絕金屬反射層206a與後續製程中所形成之其他導電 6 本紙张尺度通州中國國家標準(CNS ) Α4規格(210X297公釐) ---u n — I - ---έτ n I n l·— -!--丁— I I —__ l-a ~-辞先閱讀背面之注意事項再填寫本頁} 3504twf.RTF/006 A7 B7 ————————— "丨,· _____一....丨 .. _ 丨· . ' - ~~ 五、發明説明(ί) 層,如第2Η圖中所示。 接著,如第21圖所示,再依習知之方法,在磊晶矽 層204上形成一CMOS光感測器,其中,光感測器之感光 區220緊鄰具有金屬反射層206a之隔離島202a。 當接收外界之入射光時,除了直接穿透絕緣層212而 進入感光區220之入射光外,傾斜入射之入射光亦可藉由 金屬反射層206a之作用,而反射進入感光區220,以增加 CMOS光感測器之靈敏度。 雖然本發明已以一較佳實施例揭露如上,然其並非用 以限定本發明,任何熟習此技藝者,在不脫離本發明之精 神和範圍內,當可作各種之更動與潤飾,因此本發明之保 護範圍當視後附之申請專利範圍所界定者爲準。 ----^-----批衣------ΪΤ------線' (誚先閱讀背面之注意事項再填寫本萸) ^米部中次^^^’*^^"价合作^印$ 7 本紙張尺度通扣中囤國家栋準(CNS ) A4規格(210X297公釐)I 35〇4twf.RTF / 006 A 7 B7 5. Explanation of the invention (>)-The method of improving the light sensing sensitivity by the light surface area has difficulty in implementation. Therefore, the main purpose of the present invention is to provide a complementary metal-oxide-semiconductor photo-sensing structure and a manufacturing method thereof, which include additional formation in an isolation region-a substance having a high reflection coefficient can reflect photons into the sensing region So that incident photons can enter the sensor from multiple directions, and increase the number of photons entering the sensing area to improve the sensitivity of the light sensor. In order to make the above and other objects, features, and advantages of the present invention more comprehensible, a preferred embodiment is exemplified below, and in conjunction with the accompanying drawings, the detailed description is as follows: Brief description of the drawings: FIG. 1 FIG. 2A to FIG. 21 are cross-sectional views illustrating a manufacturing process of a complementary metal-oxide-semiconductor optical sensor according to a preferred embodiment of the present invention. Brief descriptions indicated in the figure: 100, 200: silicon substrate 102, 103, 202: field oxide layer 202a: isolation island 204, epitaxial silicon layer 206, 206a: metal layer 208 208a: The insulating layer is shown in Figures 2A to 21, in order to explain the manufacturing process of the light reflection layer of the CMOS light sensor in a preferred embodiment related to the present invention. _5 _______ 4 dimensions of this paper Steel House Turning (CNS) A4 Specification (21GX297). (Please read the precautions on the back before writing this page.) Install. Thread. Warp clip i ?. £ f and ^: >-, eliminate Cooperation. Shirt printing ^ Fire-like in the warp section ^ Disappeared in cooperation with women printed traditional 3504twf.RTF / 006 A7 B7, ..., —— — — — — — — 1 * 1 _ Five 'Description of the invention (7) Figure . Please refer to FIG. 2A. 'First, a thick field oxide layer 202 is formed on a provided silicon substrate 200. The field oxide layer is, for example, silicon dioxide (SiO2). The lithography step is defined as an isolated island 202a 'as shown in the table 2B. Next, as shown in FIG. 2C, a silicon epitaxial layer 204 of a P-type well is formed between the isolated islands 202a by, for example, a selective epitaxial process. Then, on one of the isolated islands 202a, a deep trench 205 is formed by lithographic etching, as shown in FIG. 2D. Among them, the epitaxial silicon layer 204 forming a deep trench 205 branch isolation island 202a is a part of a photosensitive region of a CMOS sensor in a subsequent process. Referring to FIG. 2E, a metal layer 206 having high reflectivity, such as tungsten or titanium, is deposited on the substrate 200. The deposited metal layer fills the deep trench 205. Then, the metal layer 206 is subjected to a procedure such as a dry etching process to remove the metal layer 206 located on the epitaxial silicon layer 204 and the isolation island 202a. A metal reflective layer 206a is formed in the deep trench 205, and the metal is formed. The height of the reflective layer 206a is slightly lower than the upper surface of the isolated island 202a to form a shallow trench 205a, as shown in FIG. 2F. As shown in FIG. 2G, an insulating layer 208, such as silicon dioxide (Si02) or silicon nitride (SiN), is formed on the substrate 200 by, for example, chemical vapor deposition (CVD). And filled the shallow trench 205a. Then the insulating layer 208 on the surface of the isolated island 202a and the crystal sand layer 204 is removed by an etch-back process to form an insulating layer 208a to isolate the metal reflective layer 206a from other conductive forms formed in subsequent processes. 6 Paper size Tongzhou China National Standard (CNS) Α4 specification (210X297 mm) --- un — I---- ττ n I nl · —-!! 丁 — II —__ la ~-Read the notes on the back before filling This page} 3504twf.RTF / 006 A7 B7 ————————— " 丨, · _____ 一 .... 丨 .. _ 丨 ·. '-5. Description of the invention (ί) layer , As shown in the second figure. Next, as shown in FIG. 21, a CMOS light sensor is formed on the epitaxial silicon layer 204 according to a conventional method. The photosensitive region 220 of the light sensor is next to the isolation island 202a having the metal reflective layer 206a. . When receiving incident light from the outside, in addition to incident light that directly penetrates the insulating layer 212 and enters the photosensitive area 220, oblique incident incident light can also be reflected into the photosensitive area 220 by the role of the metal reflective layer 206a to increase Sensitivity of CMOS light sensor. Although the present invention has been disclosed as above with a preferred embodiment, it is not intended to limit the present invention. Any person skilled in the art can make various modifications and decorations without departing from the spirit and scope of the present invention. The scope of protection of the invention shall be determined by the scope of the attached patent application. ---- ^ ----- Approval ------ ΪΤ ------ Line '(诮 Read the precautions on the back before filling in this note) ^ 米 部 中 次 ^^^' * ^^ " Price cooperation ^ print $ 7 This paper size pass buckle in the national standard (CNS) A4 specification (210X297 mm)

Claims (1)

ABCD 3504twf.RTF/006 六、申請專利範圍 1. 一種互補式金氧半導體光感測器之金屬反射層的 製造方法,包括: 提供一矽基底; 形成一第一隔離島以及一第二隔離島於該矽基底上; 形成一磊晶矽層於該矽基底上,並位於該第一隔離島 以及該第二隔離島之間; 形成一渠溝於該第一隔離島上; 形成一金屬反射層於該渠溝中,其中該金屬反射層之 上表面低於該第一隔離島之上表面; 形成一絕緣層於該金屬反射層上,其中該絕緣層之上 表面與該第一隔離島之上表面共一平面;以及 形成一互補式金氧半導體光感測器於該磊晶矽層上, 其中該互補式金氧半導體光感測器之一感光區緊鄰該第一 隔離島。 2. 如申請專利範圍第1項所述之金屬反射層的製造 方法,其中形成該金屬反射層之步驟包括: 沉積一金屬層於該基底上;以及 移除位於該磊晶矽層、該第一隔離島以及該第二隔離 島上之該金屬層,以及一部份位於該渠溝中之該金屬層, 其中位於該渠溝中剩餘之該金屬層爲該金屬反射層。 3. 如申請專利範圍第2項所述之金屬反射層的製造 方法,其中該金屬反射層包括金屬鎢。 4. 如申請專利範圍第2項所述之金屬反射層的製造 方法,其中該金屬反射層包括金屬鈦。 8 ---------I------、訂-----—.^ (請先閱讀背面之注意事項再填寫本頁) 經濟部中央標準局員工消費合作社印製 本紙張尺度適用中國國家標準(CNS ) A4規格(210 X 297公釐) ABCD 5 U & 6 3504twf.RTF/006 六、申請專利範圍 5. 如申請專利範圍第2項所述之金屬反射層的製造 方法,其中移除該金屬層之步驟包括一乾蝕刻製程。 6. 如申請專利範圍第1項所述之金屬反射層的製造 方法,其中形成該絕緣層之步驟包括: 沉積一層絕緣物質於該基底上;以及 移除位於該磊晶矽層、該第一隔離島以及該第二隔離 島上之該絕緣物質,以在該渠溝中形成該絕緣層。 7. 如申請專利範圍第6項所述之金屬反射層的製造 方法,其中該絕緣層包括二氧化矽。 8. 如申請專利範圍第6項所述之金屬反射層的製造 方法,其中該絕緣層包括氮化矽。 9. 如申請專利範圍第6項所述之金屬反射層的製造 方法,其中形成該絕緣層之步驟包括化學氣相沉積法。 ---------裝------訂-----—線 (請先閱讀背面之注意事項再填寫本頁) 經濟部中央標準局員工消費合作社印製 本紙張尺度適用中國國家標準(CNS ) A4说格(210X297公釐)ABCD 3504twf.RTF / 006 6. Application scope 1. A method for manufacturing a metal reflective layer of a complementary metal-oxide-semiconductor light sensor, including: providing a silicon substrate; forming a first isolation island and a second isolation island On the silicon substrate; forming an epitaxial silicon layer on the silicon substrate between the first isolation island and the second isolation island; forming a trench on the first isolation island; forming a metal reflective layer In the trench, an upper surface of the metal reflective layer is lower than an upper surface of the first isolated island; an insulating layer is formed on the metal reflective layer, and an upper surface of the insulating layer is in contact with the first isolated island. The upper surface is coplanar; and a complementary metal-oxide-semiconductor light sensor is formed on the epitaxial silicon layer, wherein a photosensitive region of the complementary metal-oxide-semiconductor light sensor is adjacent to the first isolation island. 2. The method for manufacturing a metal reflective layer according to item 1 of the scope of patent application, wherein the step of forming the metal reflective layer includes: depositing a metal layer on the substrate; and removing the epitaxial silicon layer, the first An isolated island and the metal layer on the second isolated island, and a part of the metal layer in the trench, wherein the remaining metal layer in the trench is the metal reflective layer. 3. The method for manufacturing a metal reflective layer according to item 2 of the scope of patent application, wherein the metal reflective layer comprises metal tungsten. 4. The method for manufacturing a metal reflective layer according to item 2 of the scope of patent application, wherein the metal reflective layer comprises metal titanium. 8 --------- I ------ 、 Order -------. ^ (Please read the notes on the back before filling out this page) Printed by the Staff Consumer Cooperative of the Central Standards Bureau of the Ministry of Economic Affairs This paper size applies to Chinese National Standard (CNS) A4 (210 X 297 mm) ABCD 5 U & 6 3504twf.RTF / 006 6. Application for patent scope 5. Metal reflective layer as described in item 2 of patent scope The method of manufacturing, wherein the step of removing the metal layer includes a dry etching process. 6. The method for manufacturing a metal reflective layer according to item 1 of the scope of patent application, wherein the step of forming the insulating layer comprises: depositing an insulating substance on the substrate; and removing the epitaxial silicon layer, the first The isolation island and the insulation material on the second isolation island to form the insulation layer in the trench. 7. The method for manufacturing a metal reflective layer according to item 6 of the patent application scope, wherein the insulating layer comprises silicon dioxide. 8. The method of manufacturing a metal reflective layer according to item 6 of the patent application scope, wherein the insulating layer comprises silicon nitride. 9. The method for manufacturing a metal reflective layer according to item 6 of the patent application, wherein the step of forming the insulating layer includes a chemical vapor deposition method. --------- Installation ------ Order ------- Line (Please read the notes on the back before filling this page) Applicable Chinese National Standard (CNS) A4 grid (210X297 mm)
TW87113485A 1998-08-17 1998-08-17 Manufacturing method for metal reflection layer of CMOS semiconductor photo sensor TW381346B (en)

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