TW373291B - Semiconductor device having isolation trenches - Google Patents

Semiconductor device having isolation trenches

Info

Publication number
TW373291B
TW373291B TW087105221A TW87105221A TW373291B TW 373291 B TW373291 B TW 373291B TW 087105221 A TW087105221 A TW 087105221A TW 87105221 A TW87105221 A TW 87105221A TW 373291 B TW373291 B TW 373291B
Authority
TW
Taiwan
Prior art keywords
semiconductor device
isolation trenches
trenches
channel stopper
diffused layer
Prior art date
Application number
TW087105221A
Other languages
English (en)
Inventor
Kazushi Nishikawa
Original Assignee
Elpida Memory Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Elpida Memory Inc filed Critical Elpida Memory Inc
Application granted granted Critical
Publication of TW373291B publication Critical patent/TW373291B/zh

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/761—PN junctions
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/76224—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Element Separation (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
TW087105221A 1997-04-03 1998-04-01 Semiconductor device having isolation trenches TW373291B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9085082A JPH10284589A (ja) 1997-04-03 1997-04-03 半導体装置及びその製造方法

Publications (1)

Publication Number Publication Date
TW373291B true TW373291B (en) 1999-11-01

Family

ID=13848695

Family Applications (1)

Application Number Title Priority Date Filing Date
TW087105221A TW373291B (en) 1997-04-03 1998-04-01 Semiconductor device having isolation trenches

Country Status (3)

Country Link
JP (1) JPH10284589A (zh)
KR (1) KR100279102B1 (zh)
TW (1) TW373291B (zh)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100511679B1 (ko) * 2003-06-27 2005-09-01 주식회사 하이닉스반도체 반도체 소자의 소자분리막 형성방법
US8698244B2 (en) * 2009-11-30 2014-04-15 International Business Machines Corporation Silicon-on-insulator (SOI) structure configured for reduced harmonics, design structure and method
US8471340B2 (en) 2009-11-30 2013-06-25 International Business Machines Corporation Silicon-on-insulator (SOI) structure configured for reduced harmonics and method of forming the structure

Also Published As

Publication number Publication date
KR100279102B1 (ko) 2001-01-15
JPH10284589A (ja) 1998-10-23
KR19980081013A (ko) 1998-11-25

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Legal Events

Date Code Title Description
MM4A Annulment or lapse of patent due to non-payment of fees