TW364981B - Computer methods for writing a scalar value to a vector - Google Patents

Computer methods for writing a scalar value to a vector

Info

Publication number
TW364981B
TW364981B TW086112575A TW86112575A TW364981B TW 364981 B TW364981 B TW 364981B TW 086112575 A TW086112575 A TW 086112575A TW 86112575 A TW86112575 A TW 86112575A TW 364981 B TW364981 B TW 364981B
Authority
TW
Taiwan
Prior art keywords
vector
scalar value
storage
updated
read
Prior art date
Application number
TW086112575A
Other languages
English (en)
Inventor
Heon-Chul Park
Original Assignee
Samsung Electron Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Samsung Electron Co Ltd filed Critical Samsung Electron Co Ltd
Application granted granted Critical
Publication of TW364981B publication Critical patent/TW364981B/zh

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F17/00—Digital computing or data processing equipment or methods, specially adapted for specific functions
    • G06F17/10—Complex mathematical operations
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/3004—Arrangements for executing specific machine instructions to perform operations on memory
    • G06F9/30043—LOAD or STORE instructions; Clear instruction

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Software Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • Data Mining & Analysis (AREA)
  • Mathematical Physics (AREA)
  • Computational Mathematics (AREA)
  • Algebra (AREA)
  • Mathematical Analysis (AREA)
  • Mathematical Optimization (AREA)
  • Pure & Applied Mathematics (AREA)
  • Databases & Information Systems (AREA)
  • Complex Calculations (AREA)
  • Executing Machine-Instructions (AREA)
TW086112575A 1996-10-18 1997-09-02 Computer methods for writing a scalar value to a vector TW364981B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US08/733,906 US6006315A (en) 1996-10-18 1996-10-18 Computer methods for writing a scalar value to a vector

Publications (1)

Publication Number Publication Date
TW364981B true TW364981B (en) 1999-07-21

Family

ID=24949593

Family Applications (1)

Application Number Title Priority Date Filing Date
TW086112575A TW364981B (en) 1996-10-18 1997-09-02 Computer methods for writing a scalar value to a vector

Country Status (4)

Country Link
US (1) US6006315A (zh)
JP (1) JP3954171B2 (zh)
KR (1) KR100227277B1 (zh)
TW (1) TW364981B (zh)

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6282634B1 (en) * 1998-05-27 2001-08-28 Arm Limited Apparatus and method for processing data having a mixed vector/scalar register file
US7529907B2 (en) * 1998-12-16 2009-05-05 Mips Technologies, Inc. Method and apparatus for improved computer load and store operations
US6353439B1 (en) * 1999-12-06 2002-03-05 Nvidia Corporation System, method and computer program product for a blending operation in a transform module of a computer graphics pipeline
US6591361B1 (en) 1999-12-28 2003-07-08 International Business Machines Corporation Method and apparatus for converting data into different ordinal types
US6701424B1 (en) 2000-04-07 2004-03-02 Nintendo Co., Ltd. Method and apparatus for efficient loading and storing of vectors
US6857061B1 (en) 2000-04-07 2005-02-15 Nintendo Co., Ltd. Method and apparatus for obtaining a scalar value directly from a vector register
US7233998B2 (en) * 2001-03-22 2007-06-19 Sony Computer Entertainment Inc. Computer architecture and software cells for broadband networks
AU2003222411A1 (en) * 2002-05-24 2003-12-12 Koninklijke Philips Electronics N.V. Access to a wide memory
US6986023B2 (en) * 2002-08-09 2006-01-10 Intel Corporation Conditional execution of coprocessor instruction based on main processor arithmetic flags
US7392368B2 (en) * 2002-08-09 2008-06-24 Marvell International Ltd. Cross multiply and add instruction and multiply and subtract instruction SIMD execution on real and imaginary components of a plurality of complex data elements
WO2004015563A1 (en) * 2002-08-09 2004-02-19 Intel Corporation Multimedia coprocessor control mechanism including alignment or broadcast instructions
US20040215924A1 (en) * 2003-04-28 2004-10-28 Collard Jean-Francois C. Analyzing stored data
JP3855270B2 (ja) * 2003-05-29 2006-12-06 ソニー株式会社 アンテナ実装方法
TW200625097A (en) * 2004-11-17 2006-07-16 Sandbridge Technologies Inc Data file storing multiple date types with controlled data access
US7516299B2 (en) * 2005-08-29 2009-04-07 International Business Machines Corporation Splat copying GPR data to vector register elements by executing lvsr or lvsl and vector subtract instructions
US7404065B2 (en) * 2005-12-21 2008-07-22 Intel Corporation Flow optimization and prediction for VSSE memory operations
KR20100101585A (ko) * 2007-12-10 2010-09-17 샌드브리지 테크놀로지스, 인코포레이티드 신호 프로세서에서의 역추적 가속화
US20100106939A1 (en) * 2008-10-27 2010-04-29 Daniel Citron Transferring data from integer to vector registers
KR20110103256A (ko) * 2010-03-12 2011-09-20 삼성전자주식회사 다중 입출력 오퍼레이션 지원 프로세서 및 그 방법
JP5699554B2 (ja) * 2010-11-11 2015-04-15 富士通株式会社 ベクトル処理回路、命令発行制御方法、及びプロセッサシステム
WO2013095618A1 (en) * 2011-12-23 2013-06-27 Intel Corporation Instruction execution that broadcasts and masks data values at different levels of granularity
US9122475B2 (en) * 2012-09-28 2015-09-01 Intel Corporation Instruction for shifting bits left with pulling ones into less significant bits
US10877925B2 (en) 2019-03-18 2020-12-29 Micron Technology, Inc. Vector processor with vector first and multiple lane configuration

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3827031A (en) * 1973-03-19 1974-07-30 Instr Inc Element select/replace apparatus for a vector computing system
JPH0724013B2 (ja) * 1986-09-10 1995-03-15 株式会社日立製作所 ベクトルプロセツサ
US5226135A (en) * 1987-09-25 1993-07-06 Hitachi, Ltd. Method for sorting vector data on the basis of partial vectors and vector processor
JP2665111B2 (ja) * 1992-06-18 1997-10-22 日本電気株式会社 ベクトル処理装置
US5331554A (en) * 1992-12-10 1994-07-19 Ricoh Corporation Method and apparatus for semantic pattern matching for text retrieval
US5461586A (en) * 1994-01-31 1995-10-24 Texas Instruments Incorporated Self-timed redundancy circuit

Also Published As

Publication number Publication date
KR100227277B1 (ko) 1999-11-01
JP3954171B2 (ja) 2007-08-08
US6006315A (en) 1999-12-21
JPH10187661A (ja) 1998-07-21
KR19980032103A (ko) 1998-07-25

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Legal Events

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MM4A Annulment or lapse of patent due to non-payment of fees