TW357412B - Method for forming a silicide region - Google Patents

Method for forming a silicide region

Info

Publication number
TW357412B
TW357412B TW086114909A TW86114909A TW357412B TW 357412 B TW357412 B TW 357412B TW 086114909 A TW086114909 A TW 086114909A TW 86114909 A TW86114909 A TW 86114909A TW 357412 B TW357412 B TW 357412B
Authority
TW
Taiwan
Prior art keywords
forming
layer
silicon
metal layer
region
Prior art date
Application number
TW086114909A
Other languages
English (en)
Inventor
Koichi Mizobuchi
Masayuki Moroi
Hideto Gotoh
Original Assignee
Texas Instruments Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Texas Instruments Inc filed Critical Texas Instruments Inc
Application granted granted Critical
Publication of TW357412B publication Critical patent/TW357412B/zh

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283Deposition of conductive or insulating materials for electrodes conducting electric current
    • H01L21/285Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
    • H01L21/28506Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
    • H01L21/28512Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table
    • H01L21/28518Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table the conductive layers comprising silicides
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/28008Making conductor-insulator-semiconductor electrodes
    • H01L21/28017Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H01L21/28026Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor
    • H01L21/28035Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the final conductor layer next to the insulator being silicon, e.g. polysilicon, with or without impurities
    • H01L21/28044Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the final conductor layer next to the insulator being silicon, e.g. polysilicon, with or without impurities the conductor comprising at least another non-silicon conductive layer
    • H01L21/28052Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the final conductor layer next to the insulator being silicon, e.g. polysilicon, with or without impurities the conductor comprising at least another non-silicon conductive layer the conductor comprising a silicide layer formed by the silicidation reaction of silicon with a metal layer
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76886Modifying permanently or temporarily the pattern or the conductivity of conductive members, e.g. formation of alloys, reduction of contact resistances
    • H01L21/76889Modifying permanently or temporarily the pattern or the conductivity of conductive members, e.g. formation of alloys, reduction of contact resistances by forming silicides of refractory metals

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Semiconductor Memories (AREA)
  • Non-Volatile Memory (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
TW086114909A 1996-10-08 1997-11-19 Method for forming a silicide region TW357412B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US2800596P 1996-10-08 1996-10-08

Publications (1)

Publication Number Publication Date
TW357412B true TW357412B (en) 1999-05-01

Family

ID=21841024

Family Applications (1)

Application Number Title Priority Date Filing Date
TW086114909A TW357412B (en) 1996-10-08 1997-11-19 Method for forming a silicide region

Country Status (3)

Country Link
EP (1) EP0836223A3 (zh)
JP (1) JPH10125624A (zh)
TW (1) TW357412B (zh)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2390224B (en) * 2000-12-06 2004-12-08 Advanced Micro Devices Inc Method of forming nickel silicide using a one-step rapid thermal anneal process and backend processing
US6605513B2 (en) 2000-12-06 2003-08-12 Advanced Micro Devices, Inc. Method of forming nickel silicide using a one-step rapid thermal anneal process and backend processing
JP2010135672A (ja) * 2008-12-08 2010-06-17 Toshiba Corp 半導体記憶装置の製造方法

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4128670A (en) * 1977-11-11 1978-12-05 International Business Machines Corporation Fabrication method for integrated circuits with polysilicon lines having low sheet resistance
EP0704883A3 (en) * 1988-02-11 1997-07-09 Sgs Thomson Microelectronics Refractory metal silicide cap, to protect multi-layer polycide structures
US4940509A (en) * 1988-03-25 1990-07-10 Texas Instruments, Incorporated Isotropic etchant for capped silicide processes
US5034348A (en) * 1990-08-16 1991-07-23 International Business Machines Corp. Process for forming refractory metal silicide layers of different thicknesses in an integrated circuit

Also Published As

Publication number Publication date
EP0836223A2 (en) 1998-04-15
JPH10125624A (ja) 1998-05-15
EP0836223A3 (en) 1999-12-15

Similar Documents

Publication Publication Date Title
ZA985941B (en) Process for heat integration of an autothermal reformer and cogeneration power plant.
AU3270599A (en) Method and apparatus for producing direct reduced iron with improved reducing gas utilization
TW368731B (en) Manufacturing method for self-aligned local-interconnect and contact
EP0676814A3 (en) Semiconductor device with a groove and manufacturing method.
EP0468471A3 (en) Heat resistant, flame resistant conducting sheet having an electrical insulation layer and process for manufacture thereof
ZA995709B (en) Hot gas reactor and process for using same.
TW354417B (en) A method for forming a planarized dielectric layer
TW344863B (en) Method for etching metal silicide with high selectivity to polysilicon
TW429599B (en) Method for forming inductors on the semiconductor substrate
WO2001081354A3 (en) Method for preparing a contact mass
TW357412B (en) Method for forming a silicide region
TW358986B (en) Metal layer patterns of a semiconductor device and a method for forming the same
EP1017653A4 (en) IMPROVED PROCESS FOR THE THERMAL INTEGRATION OF AN AUTOTHERMAL REFORMER COMPLETE WITH AN OXIDIZER AND ENERGY COGENERATION PLANT
NZ314504A (en) Method of bending thin sheet, typically methyl methacrylate, by heating at 80 to 200 degrees centigrade for 5 seconds to 10 minutes then bending in vacuum forming station
AU4695997A (en) Method and device for thermal drying of a solid product in small pieces
TW359062B (en) Method of joining an electrical contact element to a substrate
EP0607820A3 (en) Method for manufacturing a semiconductor device comprising a layer of metallic silicide on a diffused region.
TW353814B (en) Metallic wiring substrate and producing method thereof
TW337608B (en) Process for producing unlanded via
TW345696B (en) Method and device for manufacturing semiconductor device
TW338176B (en) Improved delibeation pattern for epitaxial depositions
JPS57192047A (en) Wiring layer in semiconductor device and manufacture thereof
ZA976041B (en) Process for producing grain-oriented electrical steel sheet.
AU2001224064A1 (en) Ceramic sheet for heat-treating metal composite superconductive wires and methodusing the same for heat treating metal composite superconductive wires, and sup erconductive magnet and method of producing the same
TW358974B (en) Method of manufacturing self-aligned silicide