TW357405B - Method for pre-shaping a semiconductor substrate for polishing and structure - Google Patents

Method for pre-shaping a semiconductor substrate for polishing and structure

Info

Publication number
TW357405B
TW357405B TW085102917A TW85102917A TW357405B TW 357405 B TW357405 B TW 357405B TW 085102917 A TW085102917 A TW 085102917A TW 85102917 A TW85102917 A TW 85102917A TW 357405 B TW357405 B TW 357405B
Authority
TW
Taiwan
Prior art keywords
semiconductor substrate
polishing
shaping
primary surface
provision
Prior art date
Application number
TW085102917A
Other languages
English (en)
Inventor
Fernando A Bello
James B Hall
Neal Earl W O
James S Parsons
Cindy Welt
W Bailey George
Original Assignee
Motorola Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Motorola Inc filed Critical Motorola Inc
Application granted granted Critical
Publication of TW357405B publication Critical patent/TW357405B/zh

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02002—Preparing wafers
    • H01L21/02005—Preparing bulk and homogeneous wafers
    • H01L21/02008—Multistep processes
    • H01L21/0201—Specific process step
    • H01L21/02024—Mirror polishing
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00—Semiconductor device manufacturing: process
    • Y10S438/974—Substrate surface preparation

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Mechanical Treatment Of Semiconductor (AREA)
  • Weting (AREA)
TW085102917A 1995-06-26 1996-03-11 Method for pre-shaping a semiconductor substrate for polishing and structure TW357405B (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US49451095A 1995-06-26 1995-06-26
US08/512,050 US5968849A (en) 1995-06-26 1995-08-07 Method for pre-shaping a semiconductor substrate for polishing and structure

Publications (1)

Publication Number Publication Date
TW357405B true TW357405B (en) 1999-05-01

Family

ID=27051436

Family Applications (1)

Application Number Title Priority Date Filing Date
TW085102917A TW357405B (en) 1995-06-26 1996-03-11 Method for pre-shaping a semiconductor substrate for polishing and structure

Country Status (5)

Country Link
US (1) US5968849A (zh)
EP (1) EP0750967A3 (zh)
JP (1) JPH0917757A (zh)
KR (1) KR970003587A (zh)
TW (1) TW357405B (zh)

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH11302878A (ja) * 1998-04-21 1999-11-02 Speedfam-Ipec Co Ltd ウエハ平坦化方法，ウエハ平坦化システム及びウエハ
DE19841473A1 (de) * 1998-09-10 2000-03-23 Wacker Siltronic Halbleitermat Verfahren zur Herstellung einer hochebenen Halbleiterscheibe
JP2000124235A (ja) * 1998-10-16 2000-04-28 Oki Electric Ind Co Ltd 樹脂封止半導体装置
US6162702A (en) * 1999-06-17 2000-12-19 Intersil Corporation Self-supported ultra thin silicon wafer process
DE102005043657B4 (de) * 2005-09-13 2011-12-15 Infineon Technologies Ag Chipmodul, Verfahren zur Verkapselung eines Chips und Verwendung eines Verkapselungsmaterials
DE102009037281B4 (de) 2009-08-12 2013-05-08 Siltronic Ag Verfahren zur Herstellung einer polierten Halbleiterscheibe
US8602482B2 (en) * 2011-03-30 2013-12-10 GM Global Technology Operations LLC Closure assembly and method of manufacturing same
RU2536328C2 (ru) * 2013-04-01 2014-12-20 Российская Федерация, От Имени Которой Выступает Министерство Промышленности И Торговли Российской Федерации Способ утоньшения фоточувствительного слоя матричного фотоприемника
BR112016025058A2 (pt) 2014-05-27 2017-08-15 Scania Cv Ab caixa de câmbio para veículos e veículos compreendendo tal caixa de câmbio
SE539659C2 (sv) 2014-05-27 2017-10-24 Scania Cv Ab Växellåda för fordon samt fordon, som innefattar en sådan växellåda
CN110962039A (zh) * 2018-09-29 2020-04-07 康宁股份有限公司 载体晶片和形成载体晶片的方法
CN110010458B (zh) * 2019-04-01 2021-08-27 徐州鑫晶半导体科技有限公司 控制半导体晶圆片表面形貌的方法和半导体晶片

Family Cites Families (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US2865125A (en) * 1954-11-22 1958-12-23 Turco Products Inc Apparatus for selectively contouring a metal part by etching
DE1621510A1 (de) * 1967-03-23 1971-04-29 Siemens Ag Loesungsmittelgemisch mit Salpetersaeure und Flusssaeure zum nasschemischen AEtzen von Silizium
JPS4936792B1 (zh) * 1970-10-15 1974-10-03
US3914846A (en) * 1972-06-15 1975-10-28 Us Navy High density InSb PV IR detectors
US3964957A (en) * 1973-12-19 1976-06-22 Monsanto Company Apparatus for processing semiconductor wafers
US3977926A (en) * 1974-12-20 1976-08-31 Western Electric Company, Inc. Methods for treating articles
US4251317A (en) * 1979-04-30 1981-02-17 Fairchild Camera And Instrument Corporation Method of preventing etch masking during wafer etching
JPS6056868A (ja) * 1983-09-08 1985-04-02 Nec Corp 研摩装置
US4579760A (en) * 1985-01-08 1986-04-01 International Business Machines Corporation Wafer shape and method of making same
JPS6239173A (ja) * 1985-08-14 1987-02-20 Nec Corp ウエハ研摩装置
FR2625190A1 (fr) * 1987-12-23 1989-06-30 Trt Telecom Radio Electr Procede de metallisation d'un substrat en silice, quartz, verre, ou en saphir et substrat obtenu par ce procede
US4940507A (en) * 1989-10-05 1990-07-10 Motorola Inc. Lapping means and method
EP0579298B1 (en) * 1992-06-15 1997-09-03 Koninklijke Philips Electronics N.V. Method of manufacturing a plate having a plane main surface, method of manufacturing a plate having parallel main surfaces, and device suitable for implementing said methods
DE4224395A1 (de) * 1992-07-23 1994-01-27 Wacker Chemitronic Halbleiterscheiben mit definiert geschliffener Verformung und Verfahren zu ihrer Herstellung
JP2910507B2 (ja) * 1993-06-08 1999-06-23 信越半導体株式会社 半導体ウエーハの製造方法
JPH08274050A (ja) * 1995-03-29 1996-10-18 Komatsu Electron Metals Co Ltd 半導体ウェハの製造方法

Also Published As

Publication number Publication date
KR970003587A (ko) 1997-01-28
EP0750967A2 (en) 1997-01-02
US5968849A (en) 1999-10-19
EP0750967A3 (en) 1998-05-13
JPH0917757A (ja) 1997-01-17

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Legal Events

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