TW355771B - Method and system of sharing result data in a multiprocessor computer system - Google Patents

Method and system of sharing result data in a multiprocessor computer system

Info

Publication number
TW355771B
TW355771B TW086112040A TW86112040A TW355771B TW 355771 B TW355771 B TW 355771B TW 086112040 A TW086112040 A TW 086112040A TW 86112040 A TW86112040 A TW 86112040A TW 355771 B TW355771 B TW 355771B
Authority
TW
Taiwan
Prior art keywords
output value
multiprocessor computer
computer system
result data
sharing result
Prior art date
Application number
TW086112040A
Other languages
English (en)
Inventor
Willam J Starke
Original Assignee
Ibm
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ibm filed Critical Ibm
Application granted granted Critical
Publication of TW355771B publication Critical patent/TW355771B/zh

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/30076—Arrangements for executing specific machine instructions to perform miscellaneous control operations, e.g. NOP
    • G06F9/30087—Synchronisation or serialisation instructions
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30181—Instruction operation extension or modification
    • G06F9/30185—Instruction operation extension or modification according to one or more bits in the instruction, e.g. prefix, sub-opcode
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3824—Operand accessing
    • G06F9/3826—Bypassing or forwarding of data results, e.g. locally between pipeline stages or within a pipeline stage
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
    • G06F9/3838—Dependency mechanisms, e.g. register scoreboarding
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
    • G06F9/3851—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution from multiple instruction streams, e.g. multistreaming
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3854—Instruction completion, e.g. retiring, committing or graduating
    • G06F9/3858—Result writeback, i.e. updating the architectural state or memory

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Multimedia (AREA)
  • Multi Processors (AREA)
  • Advance Control (AREA)
TW086112040A 1996-12-16 1997-08-21 Method and system of sharing result data in a multiprocessor computer system TW355771B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US08/767,406 US5889947A (en) 1996-12-16 1996-12-16 Apparatus and method for executing instructions that select a storage location for output values in response to an operation count

Publications (1)

Publication Number Publication Date
TW355771B true TW355771B (en) 1999-04-11

Family

ID=25079382

Family Applications (1)

Application Number Title Priority Date Filing Date
TW086112040A TW355771B (en) 1996-12-16 1997-08-21 Method and system of sharing result data in a multiprocessor computer system

Country Status (5)

Country Link
US (1) US5889947A (zh)
JP (1) JPH10177559A (zh)
KR (1) KR19980063538A (zh)
CN (1) CN1095133C (zh)
TW (1) TW355771B (zh)

Families Citing this family (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
AU1098100A (en) 1998-10-02 2000-04-26 Navistar International Transportation Corp. Vehicle anti-lock brake systems assembly verification system
US6643763B1 (en) 2000-02-28 2003-11-04 International Business Machines Corporation Register pipe for multi-processing engine environment
JP3957948B2 (ja) * 2000-04-12 2007-08-15 富士通株式会社 演算処理装置
US6978309B1 (en) * 2000-07-31 2005-12-20 Cisco Technology, Inc. Method and system for reprogramming instructions for a switch
US6662253B1 (en) * 2000-09-13 2003-12-09 Stmicroelectronics, Inc. Shared peripheral architecture
US7069442B2 (en) * 2002-03-29 2006-06-27 Intel Corporation System and method for execution of a secured environment initialization instruction
US8606960B2 (en) * 2002-12-09 2013-12-10 Intel Corporation Method and apparatus for improving packet processing
US7395527B2 (en) 2003-09-30 2008-07-01 International Business Machines Corporation Method and apparatus for counting instruction execution and data accesses
US8381037B2 (en) * 2003-10-09 2013-02-19 International Business Machines Corporation Method and system for autonomic execution path selection in an application
JP4549652B2 (ja) * 2003-10-27 2010-09-22 パナソニック株式会社 プロセッサシステム
US7415705B2 (en) 2004-01-14 2008-08-19 International Business Machines Corporation Autonomic method and apparatus for hardware assist for patching code
US7895382B2 (en) 2004-01-14 2011-02-22 International Business Machines Corporation Method and apparatus for qualifying collection of performance monitoring events by types of interrupt when interrupt occurs
US10802987B2 (en) * 2013-10-15 2020-10-13 Mill Computing, Inc. Computer processor employing cache memory storing backless cache lines
KR101730991B1 (ko) 2014-10-28 2017-04-28 삼성전자주식회사 스토리지 장치 및 스토리지 장치의 동작 방법
US9928117B2 (en) * 2015-12-11 2018-03-27 Vivante Corporation Hardware access counters and event generation for coordinating multithreaded processing
CN114168526B (zh) 2017-03-14 2024-01-12 珠海市芯动力科技有限公司 可重构并行处理
US11947802B1 (en) 2022-09-13 2024-04-02 Microsoft Technology Licensing, Llc Memory buffer management on hardware devices utilizing distributed decentralized memory buffer monitoring

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58114274A (ja) * 1981-12-28 1983-07-07 Hitachi Ltd デ−タ処理装置
US5297255A (en) * 1987-07-28 1994-03-22 Hitachi, Ltd. Parallel computer comprised of processor elements having a local memory and an enhanced data transfer mechanism
US5237694A (en) * 1991-05-30 1993-08-17 Advanced Micro Devices, Inc. Processing system and method including lock buffer for controlling exclusive critical problem accesses by each processor
US5347639A (en) * 1991-07-15 1994-09-13 International Business Machines Corporation Self-parallelizing computer system and method
US5535346A (en) * 1994-07-05 1996-07-09 Motorola, Inc. Data processor with future file with parallel update and method of operation

Also Published As

Publication number Publication date
US5889947A (en) 1999-03-30
JPH10177559A (ja) 1998-06-30
KR19980063538A (ko) 1998-10-07
CN1095133C (zh) 2002-11-27
CN1185609A (zh) 1998-06-24

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