TW349233B - Pre-bond cavity air bridge - Google Patents

Pre-bond cavity air bridge

Info

Publication number
TW349233B
TW349233B TW086105808A TW86105808A TW349233B TW 349233 B TW349233 B TW 349233B TW 086105808 A TW086105808 A TW 086105808A TW 86105808 A TW86105808 A TW 86105808A TW 349233 B TW349233 B TW 349233B
Authority
TW
Taiwan
Prior art keywords
air bridge
cavity air
forming
bond cavity
wafer
Prior art date
Application number
TW086105808A
Other languages
English (en)
Inventor
Jose A Delgado
Stephen J Gaul
Original Assignee
Harris Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Harris Corp filed Critical Harris Corp
Application granted granted Critical
Publication of TW349233B publication Critical patent/TW349233B/zh

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/20—Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/482—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body
    • H01L23/4821—Bridge structure with air gap
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/20—Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy
    • H01L21/2003—Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy characterised by the substrate
    • H01L21/2007—Bonding of semiconductor wafers to insulating substrates or to semiconducting substrates using an intermediate insulating layer
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76264—SOI together with lateral isolation, e.g. using local oxidation of silicon, or dielectric or polycristalline material refilled trench or air gap isolation regions, e.g. completely isolated semiconductor islands
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76264—SOI together with lateral isolation, e.g. using local oxidation of silicon, or dielectric or polycristalline material refilled trench or air gap isolation regions, e.g. completely isolated semiconductor islands
    • H01L21/76275—Vertical isolation by bonding techniques
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76264—SOI together with lateral isolation, e.g. using local oxidation of silicon, or dielectric or polycristalline material refilled trench or air gap isolation regions, e.g. completely isolated semiconductor islands
    • H01L21/76289—Lateral isolation by air gap
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
TW086105808A 1996-05-20 1997-05-01 Pre-bond cavity air bridge TW349233B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US08/650,762 US5949144A (en) 1996-05-20 1996-05-20 Pre-bond cavity air bridge

Publications (1)

Publication Number Publication Date
TW349233B true TW349233B (en) 1999-01-01

Family

ID=24610184

Family Applications (1)

Application Number Title Priority Date Filing Date
TW086105808A TW349233B (en) 1996-05-20 1997-05-01 Pre-bond cavity air bridge

Country Status (6)

Country Link
US (1) US5949144A (zh)
EP (1) EP0809288A3 (zh)
JP (1) JPH1050826A (zh)
KR (1) KR970077146A (zh)
CN (1) CN1181624A (zh)
TW (1) TW349233B (zh)

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US6433401B1 (en) * 1999-04-06 2002-08-13 Analog Devices Imi, Inc. Microfabricated structures with trench-isolation using bonded-substrates and cavities
US6465811B1 (en) 1999-07-12 2002-10-15 Gore Enterprise Holdings, Inc. Low-capacitance bond pads for high speed devices
US7335965B2 (en) 1999-08-25 2008-02-26 Micron Technology, Inc. Packaging of electronic chips with air-bridge structures
US6677209B2 (en) * 2000-02-14 2004-01-13 Micron Technology, Inc. Low dielectric constant STI with SOI devices
US6492209B1 (en) * 2000-06-30 2002-12-10 Advanced Micro Devices, Inc. Selectively thin silicon film for creating fully and partially depleted SOI on same wafer
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AU2003280168A1 (en) * 2002-12-19 2004-07-14 Koninklijke Philips Electronics N.V. Stress-free composite substrate and method of manufacturing such a composite substrate
JP4559839B2 (ja) * 2004-12-13 2010-10-13 トヨタ自動車株式会社 半導体装置の製造方法
US8173906B2 (en) * 2007-02-07 2012-05-08 Raytheon Company Environmental protection coating system and method
US7767589B2 (en) 2007-02-07 2010-08-03 Raytheon Company Passivation layer for a circuit device and method of manufacture
CN104752424B (zh) * 2013-12-27 2019-05-17 中芯国际集成电路制造(上海)有限公司 一种半导体器件及其制造方法和电子装置
CN105084296B (zh) * 2014-04-25 2017-02-08 无锡华润上华半导体有限公司 Mems电容式压力传感器的制作方法
WO2016052129A1 (ja) 2014-09-30 2016-04-07 株式会社村田製作所 弾性波装置及びその製造方法
US9666703B2 (en) 2014-12-17 2017-05-30 Great Wall Semiconductor Corporation Semiconductor devices with cavities
US10461152B2 (en) 2017-07-10 2019-10-29 Globalfoundries Inc. Radio frequency switches with air gap structures
US10833153B2 (en) 2017-09-13 2020-11-10 Globalfoundries Inc. Switch with local silicon on insulator (SOI) and deep trench isolation
US10446643B2 (en) * 2018-01-22 2019-10-15 Globalfoundries Inc. Sealed cavity structures with a planar surface
US11056382B2 (en) * 2018-03-19 2021-07-06 Globalfoundries U.S. Inc. Cavity formation within and under semiconductor devices
US11410872B2 (en) 2018-11-30 2022-08-09 Globalfoundries U.S. Inc. Oxidized cavity structures within and under semiconductor devices
US10923577B2 (en) 2019-01-07 2021-02-16 Globalfoundries U.S. Inc. Cavity structures under shallow trench isolation regions
US11127816B2 (en) 2020-02-14 2021-09-21 Globalfoundries U.S. Inc. Heterojunction bipolar transistors with one or more sealed airgap
CN111463136B (zh) * 2020-04-30 2024-09-13 北京飞宇微电子电路有限责任公司 一种金属封装外壳及其制作方法和混合集成电路

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Also Published As

Publication number Publication date
JPH1050826A (ja) 1998-02-20
KR970077146A (ko) 1997-12-12
CN1181624A (zh) 1998-05-13
US5949144A (en) 1999-09-07
EP0809288A2 (en) 1997-11-26
EP0809288A3 (en) 1999-01-13

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