TW346595B - Single-instruction-multiple-data processing with combined scalar/vector operations - Google Patents

Single-instruction-multiple-data processing with combined scalar/vector operations

Info

Publication number
TW346595B
TW346595B TW086111965A TW86111965A TW346595B TW 346595 B TW346595 B TW 346595B TW 086111965 A TW086111965 A TW 086111965A TW 86111965 A TW86111965 A TW 86111965A TW 346595 B TW346595 B TW 346595B
Authority
TW
Taiwan
Prior art keywords
scalar
instruction
data processing
register
vector operations
Prior art date
Application number
TW086111965A
Other languages
English (en)
Chinese (zh)
Inventor
A Mohamed Moataz
Park Heonchul
Trong Nquven Le
Original Assignee
Samsung Electronics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Samsung Electronics Co Ltd filed Critical Samsung Electronics Co Ltd
Application granted granted Critical
Publication of TW346595B publication Critical patent/TW346595B/zh

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003Arrangements for executing specific machine instructions
    • G06F9/30007Arrangements for executing specific machine instructions to perform operations on data operands
    • G06F9/30036Instructions to perform operations on packed data, e.g. vector, tile or matrix operations
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00Digital computers in general; Data processing equipment in general
    • G06F15/16Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00Digital computers in general; Data processing equipment in general
    • G06F15/76Architectures of general purpose stored program computers
    • G06F15/80Architectures of general purpose stored program computers comprising an array of processing units with common control, e.g. single instruction multiple data processors
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F17/00Digital computing or data processing equipment or methods, specially adapted for specific functions
    • G06F17/10Complex mathematical operations
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F17/00Digital computing or data processing equipment or methods, specially adapted for specific functions
    • G06F17/10Complex mathematical operations
    • G06F17/16Matrix or vector computation, e.g. matrix-matrix or matrix-vector multiplication, matrix factorization
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38Concurrent instruction execution, e.g. pipeline or look ahead
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06TIMAGE DATA PROCESSING OR GENERATION, IN GENERAL
    • G06T1/00General purpose image data processing
    • G06T1/20Processor architectures; Processor configuration, e.g. pipelining
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N7/00Television systems
    • H04N7/24Systems for the transmission of television signals using pulse code modulation

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Software Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Mathematical Physics (AREA)
  • Data Mining & Analysis (AREA)
  • Mathematical Optimization (AREA)
  • Mathematical Analysis (AREA)
  • Computational Mathematics (AREA)
  • Pure & Applied Mathematics (AREA)
  • Databases & Information Systems (AREA)
  • Algebra (AREA)
  • Computing Systems (AREA)
  • Signal Processing (AREA)
  • Multimedia (AREA)
  • Complex Calculations (AREA)
  • Advance Control (AREA)
  • Executing Machine-Instructions (AREA)
TW086111965A 1996-08-19 1997-08-19 Single-instruction-multiple-data processing with combined scalar/vector operations TW346595B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US69958596A 1996-08-19 1996-08-19

Publications (1)

Publication Number Publication Date
TW346595B true TW346595B (en) 1998-12-01

Family

ID=24809983

Family Applications (1)

Application Number Title Priority Date Filing Date
TW086111965A TW346595B (en) 1996-08-19 1997-08-19 Single-instruction-multiple-data processing with combined scalar/vector operations

Country Status (6)

Country Link
JP (1) JPH10143494A (ko)
KR (1) KR100267089B1 (ko)
CN (1) CN1152300C (ko)
DE (1) DE19735349B4 (ko)
FR (1) FR2752629B1 (ko)
TW (1) TW346595B (ko)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103002276B (zh) * 2011-03-31 2017-10-03 Vixs系统公司 多格式视频解码器及解码方法
US20140082333A1 (en) * 2011-12-22 2014-03-20 Elmoustapha Ould-Ahmed-Vall Systems, apparatuses, and methods for performing an absolute difference calculation between corresponding packed data elements of two vector registers
CN104011664B (zh) * 2011-12-23 2016-12-28 英特尔公司 使用三个标量项的超级乘加(超级madd)指令
CN102750133B (zh) * 2012-06-20 2014-07-30 中国电子科技集团公司第五十八研究所 支持simd的32位三发射的数字信号处理器
KR102179385B1 (ko) 2013-11-29 2020-11-16 삼성전자주식회사 명령어를 실행하는 방법 및 프로세서, 명령어를 부호화하는 방법 및 장치 및 기록매체
GB2543303B (en) * 2015-10-14 2017-12-27 Advanced Risc Mach Ltd Vector data transfer instruction
US10108581B1 (en) * 2017-04-03 2018-10-23 Google Llc Vector reduction processor
US11409692B2 (en) * 2017-07-24 2022-08-09 Tesla, Inc. Vector computational unit
US11893393B2 (en) 2017-07-24 2024-02-06 Tesla, Inc. Computational array microprocessor system with hardware arbiter managing memory requests
CN114116513B (zh) * 2021-12-03 2022-07-29 中国人民解放军战略支援部队信息工程大学 多指令集架构向risc-v指令集架构的寄存器映射方法及装置

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5081573A (en) * 1984-12-03 1992-01-14 Floating Point Systems, Inc. Parallel processing system
US5001662A (en) * 1989-04-28 1991-03-19 Apple Computer, Inc. Method and apparatus for multi-gauge computation
JPH04336378A (ja) * 1991-05-14 1992-11-24 Nec Corp 情報処理装置
US5669013A (en) * 1993-10-05 1997-09-16 Fujitsu Limited System for transferring M elements X times and transferring N elements one time for an array that is X*M+N long responsive to vector type instructions
DE69519449T2 (de) * 1994-05-05 2001-06-21 Conexant Systems Inc Raumzeigersdatenpfad

Also Published As

Publication number Publication date
CN1188275A (zh) 1998-07-22
JPH10143494A (ja) 1998-05-29
FR2752629A1 (fr) 1998-02-27
DE19735349A1 (de) 1998-04-02
DE19735349B4 (de) 2006-12-14
KR19980018065A (ko) 1998-06-05
CN1152300C (zh) 2004-06-02
KR100267089B1 (ko) 2000-11-01
FR2752629B1 (fr) 2005-08-26

Similar Documents

Publication Publication Date Title
TW345650B (en) Single-instruction-multiple-data processing using multiple banks of vector registers
US6301653B1 (en) Processor containing data path units with forwarding paths between two data path units and a unique configuration or register blocks
US6922716B2 (en) Method and apparatus for vector processing
EP1121636B1 (en) Multiplier-accumulator configuration for efficient scheduling in a digital signal processor
TW358313B (en) Single-instruction-multiple-data processing in a multimedia signal processor
IL135953A0 (en) Methods and apparatus for efficient synchronous mimd operations with ivliw pe-to-pe communication
HK1019251A1 (en) Extensible risc microprocessor architecture.
ATE475930T1 (de) Verzweigungsbefehl für einen mehrfachverarbeitungsprozessor
WO1998032071A3 (en) Processor with reconfigurable arithmetic data path
KR970703011A (ko) 다중 명령 세트를 사용하는 데이터 프로세싱(data processing with multiple instruction sets)
EP0813145A3 (en) Pipelined instruction dispatch unit in a superscalar processor
WO2003036508A3 (en) Stream processor with cryptographic co-processor
GB9619825D0 (en) Data processing condition code flags
ATE210313T1 (de) Vereinheitlicher gleitkommadatenpfad und ganzzahldatenpfad für einen risc-prozessor
US7350057B2 (en) Scalar result producing method in vector/scalar system by vector unit from vector results according to modifier in vector instruction
TW346595B (en) Single-instruction-multiple-data processing with combined scalar/vector operations
KR970705789A (ko) 프로세싱 시스템과, 프로세서와, 명령 스티림을 저장하는 메모리와 컴파일러(Processing system, processor, memory storing instruction stream and compiler)
TW343318B (en) Register addressing in a data processing apparatus
TW429345B (en) Processor architecture scheme having multiple sources for supplying bank address values and method therefor
MY129332A (en) Single instruction multiple data processing
TW325552B (en) Data processing condition code flags
WO1999031579A3 (en) Computer instruction which generates multiple data-type results
DE3585972D1 (de) Rechner-vektorregisterverarbeitung.
MY133769A (en) Input operand control in data processing systems
TW228580B (en) Information processing system and method of operation

Legal Events

Date Code Title Description
MM4A Annulment or lapse of patent due to non-payment of fees