ATE210313T1 - Vereinheitlicher gleitkommadatenpfad und ganzzahldatenpfad für einen risc-prozessor - Google Patents

Vereinheitlicher gleitkommadatenpfad und ganzzahldatenpfad für einen risc-prozessor

Info

Publication number
ATE210313T1
ATE210313T1 AT94915938T AT94915938T ATE210313T1 AT E210313 T1 ATE210313 T1 AT E210313T1 AT 94915938 T AT94915938 T AT 94915938T AT 94915938 T AT94915938 T AT 94915938T AT E210313 T1 ATE210313 T1 AT E210313T1
Authority
AT
Austria
Prior art keywords
data path
unified
integer
risc processor
floating point
Prior art date
Application number
AT94915938T
Other languages
English (en)
Inventor
Andre Kowalczyk
Norman K P Yeung
Original Assignee
Mips Tech Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mips Tech Inc filed Critical Mips Tech Inc
Application granted granted Critical
Publication of ATE210313T1 publication Critical patent/ATE210313T1/de

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003Arrangements for executing specific machine instructions
    • G06F9/30007Arrangements for executing specific machine instructions to perform operations on data operands
    • G06F9/3001Arithmetic instructions
    • G06F9/30014Arithmetic instructions with variable precision
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003Arrangements for executing specific machine instructions
    • G06F9/30007Arrangements for executing specific machine instructions to perform operations on data operands
    • G06F9/3001Arithmetic instructions
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3867Concurrent instruction execution, e.g. pipeline or look ahead using instruction pipelines
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3885Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • Computational Mathematics (AREA)
  • Mathematical Analysis (AREA)
  • Mathematical Optimization (AREA)
  • Pure & Applied Mathematics (AREA)
  • Advance Control (AREA)
AT94915938T 1993-05-17 1994-04-28 Vereinheitlicher gleitkommadatenpfad und ganzzahldatenpfad für einen risc-prozessor ATE210313T1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US08/063,183 US5450607A (en) 1993-05-17 1993-05-17 Unified floating point and integer datapath for a RISC processor
PCT/US1994/004701 WO1994027205A1 (en) 1993-05-17 1994-04-28 Unified floating point and integer datapath for risc processor

Publications (1)

Publication Number Publication Date
ATE210313T1 true ATE210313T1 (de) 2001-12-15

Family

ID=22047502

Family Applications (1)

Application Number Title Priority Date Filing Date
AT94915938T ATE210313T1 (de) 1993-05-17 1994-04-28 Vereinheitlicher gleitkommadatenpfad und ganzzahldatenpfad für einen risc-prozessor

Country Status (6)

Country Link
US (1) US5450607A (de)
EP (1) EP0699318B1 (de)
JP (1) JPH09507592A (de)
AT (1) ATE210313T1 (de)
DE (1) DE69429342T2 (de)
WO (1) WO1994027205A1 (de)

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US6643765B1 (en) 1995-08-16 2003-11-04 Microunity Systems Engineering, Inc. Programmable processor with group floating point operations
US5742840A (en) * 1995-08-16 1998-04-21 Microunity Systems Engineering, Inc. General purpose, multiple precision parallel operation, programmable media processor
US5664120A (en) * 1995-08-25 1997-09-02 International Business Machines Corporation Method for executing instructions and execution unit instruction reservation table within an in-order completion processor
US5761105A (en) * 1995-09-26 1998-06-02 Advanced Micro Devices, Inc. Reservation station including addressable constant store for a floating point processing unit
US5748516A (en) * 1995-09-26 1998-05-05 Advanced Micro Devices, Inc. Floating point processing unit with forced arithmetic results
US5878266A (en) * 1995-09-26 1999-03-02 Advanced Micro Devices, Inc. Reservation station for a floating point processing unit
US6331856B1 (en) 1995-11-22 2001-12-18 Nintendo Co., Ltd. Video game system with coprocessor providing high speed efficient 3D graphics and digital audio signal processing
US5787026A (en) * 1995-12-20 1998-07-28 Intel Corporation Method and apparatus for providing memory access in a processor pipeline
US5854918A (en) * 1996-01-24 1998-12-29 Ricoh Company Ltd. Apparatus and method for self-timed algorithmic execution
JP3546980B2 (ja) * 1996-03-29 2004-07-28 松下電器産業株式会社 データ処理装置
US5826074A (en) * 1996-11-22 1998-10-20 S3 Incorporated Extenstion of 32-bit architecture for 64-bit addressing with shared super-page register
KR100265358B1 (ko) 1997-05-22 2000-09-15 김영환 고속의쉬프팅장치
US6035388A (en) * 1997-06-27 2000-03-07 Sandcraft, Inc. Method and apparatus for dual issue of program instructions to symmetric multifunctional execution units
US6216218B1 (en) 1997-11-03 2001-04-10 Donald L. Sollars Processor having a datapath and control logic constituted with basis execution blocks
US6292886B1 (en) * 1998-10-12 2001-09-18 Intel Corporation Scalar hardware for performing SIMD operations
US6321327B1 (en) 1998-12-30 2001-11-20 Intel Corporation Method for setting a bit associated with each component of packed floating-pint operand that is normalized in SIMD operations
US8636648B2 (en) 1999-03-01 2014-01-28 West View Research, Llc Endoscopic smart probe
US10973397B2 (en) 1999-03-01 2021-04-13 West View Research, Llc Computerized information collection and processing apparatus
US6564179B1 (en) * 1999-07-26 2003-05-13 Agere Systems Inc. DSP emulating a microcontroller
US6732203B2 (en) 2000-01-31 2004-05-04 Intel Corporation Selectively multiplexing memory coupling global bus data bits to narrower functional unit coupling local bus
US6904446B2 (en) * 2001-08-24 2005-06-07 Freescale Semiconductor, Inc. Floating point multiplier/accumulator with reduced latency and method thereof
US7017025B1 (en) * 2002-06-27 2006-03-21 Mips Technologies, Inc. Mechanism for proxy management of multiprocessor virtual memory
US7003630B1 (en) 2002-06-27 2006-02-21 Mips Technologies, Inc. Mechanism for proxy management of multiprocessor storage hierarchies
US7415601B2 (en) * 2002-06-28 2008-08-19 Motorola, Inc. Method and apparatus for elimination of prolog and epilog instructions in a vector processor using data validity tags and sink counters
US7140019B2 (en) * 2002-06-28 2006-11-21 Motorola, Inc. Scheduler of program instructions for streaming vector processor having interconnected functional units
US7159099B2 (en) * 2002-06-28 2007-01-02 Motorola, Inc. Streaming vector processor with reconfigurable interconnection switch
US7062635B2 (en) * 2002-08-20 2006-06-13 Texas Instruments Incorporated Processor system and method providing data to selected sub-units in a processor functional unit
US7373369B2 (en) * 2003-06-05 2008-05-13 International Business Machines Corporation Advanced execution of extended floating-point add operations in a narrow dataflow
US7290122B2 (en) * 2003-08-29 2007-10-30 Motorola, Inc. Dataflow graph compression for power reduction in a vector processor
US7610466B2 (en) * 2003-09-05 2009-10-27 Freescale Semiconductor, Inc. Data processing system using independent memory and register operand size specifiers and method thereof
US7107436B2 (en) * 2003-09-08 2006-09-12 Freescale Semiconductor, Inc. Conditional next portion transferring of data stream to or from register based on subsequent instruction aspect
US7315932B2 (en) * 2003-09-08 2008-01-01 Moyer William C Data processing system having instruction specifiers for SIMD register operands and method thereof
US7275148B2 (en) * 2003-09-08 2007-09-25 Freescale Semiconductor, Inc. Data processing system using multiple addressing modes for SIMD operations and method thereof
US7433912B1 (en) 2004-02-19 2008-10-07 Sun Microsystems, Inc. Multiplier structure supporting different precision multiplication operations
US20060101244A1 (en) * 2004-11-10 2006-05-11 Nvidia Corporation Multipurpose functional unit with combined integer and floating-point multiply-add pipeline
US8005885B1 (en) * 2005-10-14 2011-08-23 Nvidia Corporation Encoded rounding control to emulate directed rounding during arithmetic operations
US8099448B2 (en) 2005-11-02 2012-01-17 Qualcomm Incorporated Arithmetic logic and shifting device for use in a processor
US9223751B2 (en) 2006-09-22 2015-12-29 Intel Corporation Performing rounding operations responsive to an instruction
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US7877582B2 (en) * 2008-01-31 2011-01-25 International Business Machines Corporation Multi-addressable register file
US7849294B2 (en) 2008-01-31 2010-12-07 International Business Machines Corporation Sharing data in internal and memory representations with dynamic data-driven conversion
CN100555225C (zh) * 2008-03-17 2009-10-28 中国科学院计算技术研究所 一种支持x86虚拟机的risc处理器装置及方法
US7945768B2 (en) * 2008-06-05 2011-05-17 Motorola Mobility, Inc. Method and apparatus for nested instruction looping using implicit predicates
US9304767B2 (en) * 2009-06-02 2016-04-05 Oracle America, Inc. Single cycle data movement between general purpose and floating-point registers
US8615540B2 (en) * 2009-07-24 2013-12-24 Honeywell International Inc. Arithmetic logic unit for use within a flight control system
US9411585B2 (en) 2011-09-16 2016-08-09 International Business Machines Corporation Multi-addressable register files and format conversions associated therewith
US9727336B2 (en) 2011-09-16 2017-08-08 International Business Machines Corporation Fine-grained instruction enablement at sub-function granularity based on an indicated subrange of registers
CN107977227A (zh) * 2016-10-21 2018-05-01 超威半导体公司 包括不同指令类型的独立硬件数据路径的管线
US10409614B2 (en) 2017-04-24 2019-09-10 Intel Corporation Instructions having support for floating point and integer data types in the same register
US10474458B2 (en) * 2017-04-28 2019-11-12 Intel Corporation Instructions and logic to perform floating-point and integer operations for machine learning
CN112534405A (zh) 2019-03-15 2021-03-19 英特尔公司 用于脉动阵列上的块稀疏操作的架构
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RU209758U1 (ru) * 2021-06-25 2022-03-22 федеральное государственное бюджетное образовательное учреждение высшего образования "Российский государственный университет им. А.Н. Косыгина (Технологии. Дизайн. Искусство)" Устройство для управления разрядностью вычислений

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* Cited by examiner, † Cited by third party
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JPH069028B2 (ja) * 1986-02-18 1994-02-02 日本電気株式会社 演算装置

Also Published As

Publication number Publication date
US5450607A (en) 1995-09-12
DE69429342T2 (de) 2002-05-23
EP0699318B1 (de) 2001-12-05
DE69429342D1 (de) 2002-01-17
WO1994027205A1 (en) 1994-11-24
EP0699318A4 (de) 1997-11-12
JPH09507592A (ja) 1997-07-29
EP0699318A1 (de) 1996-03-06

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