經濟部中央梂準局貝工消費合作社印«. A7 B7 五、發明説明（l ) 本發明係有關電力轉換裝置，尤其係有關具備緩衝電 路之電力轉換裝置者。 —般而言，經由功率半導體元件等之開關元件，令供 予負荷之電流切斷時，於元件與電源電壓同時，蓄存於配 線電感的能量則會以電湧電壓加以施加。令施加於如此之 元件之電壓抑制於元件容許値以內的電路手段則爲緩衝電 路。緩衝電路係做爲基本要素，則具備能置吸收手段之電 容器、該放電用阻抗、及充電於電容器時偏壓放電阻抗之 二極値所構成者爲一般者，亦有提案多數之電路方式者。 做爲有關此種緩衝電路的以往技術，例如有記載於曰 本特開昭5 7 — 10 6 2 3 0號公報等之技術。根據此以 往技術之緩衝電路，與開關元件並列地，連接二極體和第 1電容器之直列電路，與前述二極體並列地連接阻抗時的 同時，令第2之電容器並列連接構成。 緩衝電路內之電容器之容量在於一般爲固定値，但是 理想上對應於斷路電流之增加，增大電容量器容量者爲佳 。做爲有關此以往技術之可變容量緩衝電路，例如有記載 於日本特開昭6 2 - 2 7 2 8 6 3號公報等之技術。此以 往技術之緩衝電路係與開關元件並列地，連接於第1之二 極體和第1之電容器之直列電路，與前述第1之二極體並 列地連接阻抗的同時，連接於與前述第1之電容器並列地\ 之第2之電容器和開關元件所成直列電路，於此開關元件 並列地連接二極體加以構成。 又，做爲有關具備緩衝電路之電力轉換裝置，例如有 本紙張尺度適用中國國家梂率（CNS ) A4规格（2丨Ο X 297公釐） (1裝-----：一訂------- (請先閲讀背面之注意事項再填寫本頁) 經濟部中央梂準局貝工消費合作社印製 A7 ____B7_^'五、發明説明（2 ) 如記載於日本特開平6 — 3 8 5 0 6號公報之技術。此以 往技術係令2個開關元件呈電橋構成之反相器，於各開關 元件設置緩衝電容器的同時，具備於電橋並列設置電平固 定用之緩衝電容器（以下、稱之爲箝位電容器）的構成。 如此構成之緩衝電路係於開關元件之關閉時，首先，使容 量小之各別緩衝電容器作用，抑制加於開關元件之過電壓 ，接著，將蓄積於主電路配線之能量，進行吸收容量大之 箝位電容器的動作。 於一般，緩衝電路係爲提升過電壓抑制效果，令構成 電路之電容器之容置變大則爲佳，令電容器之容量變大時 ，增加電路之損失，又，於負荷電流爲小之時，會產生如 控制電路之指令，無法控制負荷電流的問題。 即，緩衝電路之損失係令電容器容量爲C、令放電時 之電遯變化爲V，以CV 2/2加以表示，電容器之容置 愈大則電路損失則會增加。又，負荷電流爲小時，切斷開 關元件時，充電緩衝電路之電容器的電流則透過負荷一直 流入，結果，無法令負荷電流如指令加以控制。爲解決此 問題之緩衝電路，係於電流爲小時，令緩衝電路之電容器 容量變小，於電流爲大時，令電容器容量變大地構成，令 電容器容量爲可變者爲佳。 記載於上述日本特開昭5 7 — 1 0 6 2 3 0號公報的〜 緩衝電路你具備第1、第2之電容器，令開關元件於關閉 時於緩衝電路轉流之電流，如二極體般，僅流入第1之竃 容器。第1之電容器之充電係持績至完全吸收蓄存於主電 (請先閱讀背面之注意事項再填寫本頁) .裝. 本紙張尺度遑用中國國家橾牟（CNS > A4規格（210X297公釐〉 s^l〇8i 經濟部中央橾準局貝工消费合作社印裝 A7 B7五、發明説明（3 ) 路之配線電感的電磁能量之故，該充電電壓則達到電源電 壓以上。吸收所有配線之能量時，第I之電容器之充電電 壓和電源電壓之差電壓則於二極體做爲反電壓加以施加。 二極體則反回復。第2之電容器係充電完前述之反電壓之 後，介由並列連接之阻抗，放電電壓，於開關元件之下次 關閉時，第2之電容器之充電電壓係呈0。 如前述，此以往技術之緩衝電路係具備2個電容器， 於二極體之反回復之前，有僅就第1之電容器對開關元件 之過電壓控制之動作，不具備可變容置之動作，無法解決 前述之問題。 又，記載於日本特開昭6 2 — 2 7 2 8 6 2號公報的 緩衝電路，係於斷路電流爲大之時，令前述開關元件呈開 啓，於第1電容器並列連接第2之電容器，令合成容量增 加至雙方電容器容量和之値，進行容置之可變。根據此緩 衝電路，對應電流之大小，令開啓元件呈開啓、關閉，可 令電容器容置大小地選擇，可達緩衝電路之損失之減低和 負荷電流之控制性的改善。 但是，根據此以往技術之緩衝電路，係做爲開關元件 必需使用有源元件，又需該驅動手段、控制手段及電流檢 出手段，而有招至成本上昇之問題，又，取得主電路之開 關元件之開關，和緩衝電路之開關元件的開關動作時間變〜 得重要，而有使此控制變得複雜的問題。 —般而言，緩衝電路爲提高對開關元件之過電壓控制 效果，令構成緩衝電路之緩衝電容器的容置樊大者爲佳。 (請先閲讀背面之注意事項再填寫本頁) 本紙張尺度逋用中國國家梯準（CNS> A4規格（210X297公釐） 經濟部中央標率局員工消费合作社印製 A7 B7五、發明説明（4 ) 但是，令電容器容量變大時，會產生增加緩衝電路損失之 問題。緩衝電路之損失係令緩衝電容器之容量爲C，放電 時之電壓變化呈V時，以CV2/2加以表示，緩衝電容 器之容量愈大則損失會增加。 記載於日本特開平6 — 3 8 5 0 6號公報之以往技術 ，係令各緩衝電容器之容量設定爲小，令箝位電容器之容 量設定爲大，令菴存於箝位電容器之能量，經由重現於電 源，以達損失之減低。但是，此緩衝電路係將箝位電容器 之電荷之供給，經由主要透過各箝位電容器的電流加以進 行之故，各緩衝電容器之容置較箝位電容器之容量爲小之 時，該容置愈小時，爲令大電流流於箝位電容器。各緩衝 電容器之電壓則呈振動，而呈對各別緩衝電容器之應力。 又，此振動係會招至電壓之過短路。而過短路之電壓則對 元件施加過電壓之故，而產生原本目的之過電壓抑制之阻 礙的問題。 又，做爲開關元件使用雙極電晶體、IGBT時，電 流斷路時之電壓變化（dV/dt)愈大，增加有關蓄存 載體之排出的傾斜端電流，增加元件之開關損失。爲此， 前述個別之緩衝電容器之電壓振動係有關元件之開關損失 時，會有產生不良影響之問題。 理想上，對應電流或電壓之增大，使用具有可令緩衝〜 電容器之容量變大的可變容量化之緩衝電容器的緩衝電路 爲佳。於前述以往技術之緩衝電路中，對應電壓增大各別 之緩衝電容器之容量加以增加時，可抑制電壓之振動。但 LIJ------.一丨裝-----.—訂l·-----^点 (請先閲讀背面之注意事項再填寫本頁) 本紙張尺度適用中國國家橾準（CNS ) A4規格（210X297公釐〉 B7 經濟部中央揉準局貝工消费合作社印製 五 、發明説明 (5 ) 是 9 令 電 容 器 之 容 量 爲 可 變 9 需 新 設 置 檢 出 電 流 或 電 壓 之 手 段 、 爲 切 換 複 數 之 電 容 器 之 開 關 手 段 、 控 制 此 開 關 手 段 之 開 啓 > 關 閉 之 手 段 > 而 招 至 成 本 上 昇 之 問 題 0 本 發 明 之 百 的 係 提 供 爲 解 決 上 述 以 往 技 術 問 題 以 低 成 之 本 之 簡 單 電 路 手 段 9 令 緩 衝 電 路 之 電 容 器 容 量 呈 可 變 化 9 可 減 低 損 失 且 不 會 防 礙 負 荷 電 流 之 控 制 性 的 緩 衝 電. 路 的 同 時 9 可 提 供 使 用 此 緩 衝 電 路 之 電 力 轉 換 裝 置 者 0 本 發 明 之 其 他 巨 的 係 提 供 爲 解 決 上 述 以 往 技 術 問 題 > 以 低 成 本 之 簡 單 電 路 手 段 令 緩 衝 電 路 之 電 容 器 容 置 呈 可 變 化 9 可 同 時 減 低 對 開 關 元 件 電 壓 控 制 和 緩 衝 電 路 之 損 失 9 可 抑 制 電 壓 之 振 動 減 輕 開 關 元 件 其 他 零 件 之 應 力 可 安 定 動 作 之 電 力 轉 換 裝 置 者 0 本 發 明 之 巨 的 係 於 控 制 由 電 源 供 予 負 荷 之 負 荷 電 流 的 流 通 和 切 Pr 的 開 關 元 件 之 緩 衝 電 路 中 9 具 備 於 前 述 開 關 元 件 之 輸 出 入 端 子 間 並 列 連 接 之 第 1 二 極 體 和 直 列 連 接 第 1 之 電 容 器 的 電 路 手 段 9 和 於前 述 第 1 之 二 極 體 並 列 連 接 之 充 放 電 電 路 手 段 9 . 伴 隨 前 述 開 關 元 件 之 開 啓 動 作 > 由 前 述 第 1 之 電 容 器 9 經 由 前 述 開 關 元 件 和 前 述 充 電 電 路 手 段 9 形 成 回 歸 於 前 述 第 1 之 電 容 器 的 閉 電 路 9 於 前 述 充 放 電 電 路 手 段 充 電 電 壓 9 經 由 前 述 充 放 電 電 路 手 段 之 充 電 電 m 9 令 前 述 第 1 之 二 極 體 反 偏 m 的 同 時 伴 隨 前 述 開 關 元 件 1L·、 關 閉 動 作 9 經 由 放 電 充 電 於 前 述 充 放 電 電 路 手 段 之 電 m 加 以 達 成 Ο 做 爲 更 佳 之 實 施 形 態 f 令 前 述 充 放 電 電 路 手 段 > 直 列 本紙張尺度適用中國國家梯準（CNS ) A4規格（210X297公釐） 經濟部中央標準局負工消费合作社印装 . A7 _ B7_五、發明説明（6 ) 地連接阻抗和第2之電容器，令與前述第1之二極雔同一 1方向地流通電流之第2二極體，並列設於前述阻抗。 做爲更佳之實施形態，令第2之電容器容量値設定較 第1之電容器容量値爲小。 更且，本發明之目的係經由對構成電力轉換裝置之開 關元件，使用上述構成之緩衝電路構成電力轉換裝置達成 〇 於本發明之緩衝電路中，令第1之電容器容量爲C 1 ，具有充放電手段之第2電容器容量呈C 2。然後，本發 明之電容器電路係伴隨開關元件之開啓動作，由第1之電 容器，經由開關元件和充放電電路手段，形成回歸第1之 電容器之閉電路，由此，充電於第1之電容器的電荷則移 動至第2電容器，充電第2之電容器。結果，第1之電容 器的充電電壓則減少，相反地增加第2之電容器之充髦電 壓，最終地，第1、第2之電容器之電壓則呈相等，爲反 極性之故，於開關元件之輸出入端子間相互抵押，開關元 件之輸出入端子間之電壓則呈0。 前述之電荷移動係意味於第1之電容器至第2之電容 器，令能量加以移動者，於移動路徑上因存在之阻抗（含 於開關元件之內部阻抗）所產生之損失係呈C〇V2/2 ( 惟C。係令 Cl和C 2之容量直列連接時之合成容量）。’ 此結果，本發明之緩衝電路的損失則例如C 1 、C 2之容 量相等爲C之時，較以往技術之緩衝電路損失CV2/ 2 呈其一半者。又，充電於第2之電容器的電壓係令直列連 l· ^丨 ^------丨ΐτ------- (請fM讀背面之注意事項再填寫本頁) 本紙張尺度適用中國國家梯準（CNS ) A4规格（2丨0X297公釐） 8〇1〇8ι 經濟部中失揉準局貝工消费合作社印装 五、發明説明（7 ) 接於第1之電容器的第1二極體反偏壓，達成令第1之二 極體做爲開關加以動作之效果。 開關元件呈關閉時，前述第1之二極體則呈反偏壓之 故，流於該元件之電流則由第1之二極體透過充放電電路 手段內之第2電容器流入。此時，由開關元件之輸出入端 子間所見合成電容器容量則以上述C 0加以表示。經由流 入緩衝電路的電流，充電第1之電容器，相反地放電充電 於第2之電容器的電荷。然後、第1之電容器之電壓增加 分，和充電於第2之電容器的電壓減少分之和則施加於開 關元件之輸出入端子間。第2之電容器之充電電壓達到0 之後，前述第1之二極體改變爲順偏壓狀態，電流係由第 1之電容器通過第1之二極體加以流動。此時之後，由開 關元件之输出端子間所見的合成電容器容量你呈C1。即 ，經由第1之二極體之反偏壓、順偏壓，達成合成電容器 容量之可變化。 於開關元件之關閉時，以施加於開關元件的電壓，令 充電至電源電壓以上之緩衝電路的電壓値呈Δν時，通常 ，緩衝電路之電容器容量愈大Δ V則愈小，於開關元件呈 開啓時之放電增加緩衝電路之損失。本發明時，電壓△ V 係以第1之電容器容量C 1抑制，緩衝電路之損失則經由 令第1之電容器C 1之能量的一部分被第2電容器C 2所〜 吸收，可減輕整體之損失。 又，如前述令緩衝電路適用於電力轉換裝置時，緩衝 電路之損失可減低的同時，可改善負荷電流之控制性。即 本紙張尺度適用中國國家揉^(€阽）八4规格（2丨0父297公釐）_1(). (請先聞讀背面之注意事項再填寫本頁) 經濟部中央橾準局貝工消费合作社印製 A7 B7五、發明説明（8 ) ，第2之電容器容量C2設定呈較第1之電容器容量C 1 爲小之故，可令合成容量C 0較C 1爲小，於負荷電流微 小之時，爲充電緩衝電路之電容器，將持續流動之電流， 較以往技術時可呈短時間，就結果而言，可改善負荷蕙流 之控制性。 又，本發明之其他目的係於主電源之端子間，具備直 接連接之第1、第2之開關元件，對應控制手段之指令， 經由控制前述2個之開關元件，於設於前述2個之開關元 件之連接點的負荷，供給電力之電力轉換裝置中，經由具 備直列地將連接於前述2個開關元件之各输出入端子間的 第1二極體和第1電容器加以連接之電路手段，和並列連 接於各前述第1之二極體的阻抗，和直列連接於第2電容 器，將與前述第1之二極體同一方向流通電流之第2二極 體，並列設於前述阻抗之電路手段，和連接第2之電容器 相互間之箝位用緩衝電容器加以達成。 做爲更佳之實施形態，令前述第2之電容器容量値， 設定較前述第1之電容器容量値爲小。 又，做爲更佳之實施形態，令前述箝位用緩衝電容器 容量値，設定較前述第1、第2之電容器容量値爲大。 於具備前述手段構成之電力轉換裝置中，令箝位用緩 衝電容器爲C5 ，對第1之開關元件的第1、第2之電容〜 器呈Cl 、C2 ，對第2之開關元件的第1 、第2之電容 器呈C3 、C4 。又，於第1之開關開啓時，第2之開關 元件係呈關閉，相反地，於第2之開關開啓時，第1之開 Γ-.--=------裝-----丨訂丨----- (請t閲讀背面之注意事項再填寫本頁) 本紙張尺度適用中國國家標準（CNS ) A4規格（2丨0X297公釐） 經濟部中央揉準局負工消費合作社印装 A7 _B7_—_五、發明説明（9 ) 關元件係呈關閉。然後，對第1之開關元件之第1 、第2 鼇容器C 1、C2係構成第1之可變容置電容器，對第2 之開關元件之第1、第2電容器C3、C 4係構成第2之 可變容量電容器。 現在，令第1之開關元件爲開啓，第2之開關元件爲 關閉之狀態者。此時，與第1之開關元件並列設置之第1 、第2之電容器Cl、C2係電壓相等，充電於反極性。 又，對第2之開關元件的第1 、第2電容器C3、C4係 令電容器C 3充電至相等於電源電壓之電壓，電容器C 4 之電壓爲0。又、箝位用緩衝電容器C 5係充電至相等於 m源鬣壓之電壓。 由前述之狀態，第1之開關元件呈關閉時，經由蓄存 於配線之能量，電流會持續流動之故，此電流之一部分則 由第1之二極體，通過構成第1之可變容量電容器之C 2 、C1 ，流至負荷，於此等容置充電電壓。惟，C2係電 流方向不同於起始充電之電壓極性之故，而呈放電起初充 電之電壓。一方面，C 1係與起始之極性同極性地充電電 壓。又，上述剩餘電流係通過二極體、箝位用緩衝電容器 C5、第2之可變容量電容器之C4 、C3流至負荷， 令C4和C3之電壓加以放電。此時，C3係對電壓値之 減少，C4係於起始電壓爲0之故，經由流入電流，與 、 C 3反極性地充電電壓。 前述動作中，C 2之電壓則減少至所定値（零）時， 與C 1直列連接，經由C 2之電壓，呈反偏壓狀態之第1 本紙張尺度適用中國國家橾率（€阳）八4規格（210乂297公*)_12_ ---------丨裝-----—訂.------^ (請先閱讀背面之注意事項再填寫本頁) 經濟部中央梂準局工消费合作社印製 A7 __B7 _ _ 五、發明説明（10 ) 二極體則呈導通狀態，第1之可變容量電容器之容量則由 C 1和C 2之直列合成容量，變化至c 1之單獨容量。另 —方，於C 4充電電壓，與C 3直列連接，在此呈導通狀 態之二極體則經由C 4之電壓呈反偏壓狀態，第2之可變 容量電容器係由於C 3之單獨容量，可變化C 4和C 3之 直列合成容量。 如前述之動作結果，C 1中充電與C 5同樣之電壓値 ，C 2之電壓係呈0。又、C 3和C 4中電壓値爲相等， 極性不同之電壓則被充電，相抵銷合成之電壓。 如前所述，本發明之電力轉換裝置係以構成可變容量 電容器之2個電容器的一方之電容器的單獨容量，抑制開 關元件之過電壓，經由流入直列合成容量之電流，進行放 電動作之故，可進行對開關元件之過電壓之充分控制，而 且，可達成緩衝損失之減低。Printed by the Beigong Consumer Cooperative of the Central Bureau of Economic Affairs of the Ministry of Economic Affairs «A7 B7 V. Description of the Invention (l) The present invention is related to power conversion devices, especially those with buffer circuits. Generally speaking, when the current supplied to the load is cut off by a switching element such as a power semiconductor element, the energy stored in the wiring inductance at the same time as the element and the power supply voltage are applied as a surge voltage. The circuit means for suppressing the voltage applied to such an element within the allowable value of the element is a buffer circuit. The snubber circuit is the basic element, and it is composed of a capacitor capable of absorbing means, the discharge impedance, and the two-pole value of the bias discharge impedance when charging the capacitor. . As a conventional technique related to such a buffer circuit, for example, there is a technique described in Japanese Patent Laid-Open No. 5-7-10 6 2 3 0. According to the buffer circuit of the prior art, the in-line circuit connecting the diode and the first capacitor in parallel with the switching element, and connecting the impedance in parallel with the diode, the second capacitor is connected in parallel. The capacity of the capacitor in the snubber circuit is generally fixed, but ideally corresponding to the increase of the breaking current, it is better to increase the capacity of the capacitor. As a variable capacity buffer circuit related to this conventional technology, for example, there is a technology described in Japanese Patent Laid-Open No. 6 2-2 7 2 8 6 3, etc. This prior art buffer circuit is connected in parallel with the switching element, and is connected to the in-line circuit of the first diode and the first capacitor, while connecting the impedance in parallel with the aforementioned first diode, and connected to the aforementioned first diode The capacitor 1 is connected in parallel. The second capacitor and the switching element form an in-line circuit, and the switching element is connected in parallel to form a diode. In addition, as a power conversion device with a buffer circuit, for example, the paper standard is applicable to the Chinese national frame rate (CNS) A4 specification (2 丨 Ο X 297mm) (1 pack -----: one order-- ----- (Please read the precautions on the back before filling in this page) A7 ____ B7_ ^ 'printed by Beigong Consumer Cooperative of the Central Bureau of Economic Affairs of the Ministry of Economic Affairs V. Description of Invention (2) As described in Japanese Patent Application No. 6-3 8 5 0 6 Gazette technology. This conventional technology is an inverter composed of two switching elements in the form of a bridge, and a snubber capacitor is provided for each switching element, and a buffer capacitor for level fixing is provided in parallel with the bridge (Hereinafter referred to as clamp capacitor). When the snubber circuit constructed in this way is closed when the switching element is turned off, first, each snubber capacitor with a small capacity acts to suppress the overvoltage applied to the switching element, and then, The energy accumulated in the main circuit wiring acts as a clamping capacitor with a large absorption capacity. In general, the snubber circuit is to improve the overvoltage suppression effect, it is better to make the capacitance of the capacitor constituting the circuit larger, so that the capacitor When the capacity becomes larger, the loss of the circuit increases, and when the load current is small, there will be a problem such as the command of the control circuit, which cannot control the load current. That is, the loss of the buffer circuit is to make the capacitor capacity C, so that the discharge The electric current changes from time to V, expressed as CV 2/2. The larger the capacitor's capacity, the greater the circuit loss. In addition, the load current is small. When the switching element is turned off, the current of the capacitor of the charging snubber circuit is The load flows in all the time, and as a result, the load current cannot be controlled as commanded. The buffer circuit to solve this problem is that when the current is small, the capacitor capacity of the buffer circuit becomes small, and when the current is large, the capacitor capacity becomes large. It is better to make the capacity of the capacitor variable. The buffer circuit described in Japanese Patent Laid-Open No. 5 7-1 0 6 2 3 0 ~ You have the first and second capacitors when the switching element is turned off The current flowing in the buffer circuit, like a diode, only flows into the first container. The charging of the first capacitor is maintained until it is completely absorbed and stored in the main power (please read first Note on the back and then fill out this page). Packed. The paper size is printed in Chinese National Moumou (CNS > A4 size (210X297mm> s ^ l〇8i Ministry of Economic Affairs Central Bureau of Industry and Commerce Beigong Consumer Cooperative Printed A7 B7 5. Description of the invention (3) For the electromagnetic energy of the wiring inductance of the circuit, the charging voltage reaches above the power supply voltage. When the energy of all wiring is absorbed, the difference between the charging voltage of the capacitor I and the power supply voltage of the first is two. The polar body is applied as a reverse voltage. The diode is reversed. The second capacitor is charged after the aforementioned reverse voltage, through the impedance of the parallel connection, the discharge voltage, the next time the switching element is turned off, the second The charging voltage of the capacitor is 0. As mentioned above, this prior art buffer circuit is equipped with two capacitors, and before the reverse recovery of the diode, there is only the action of controlling the overvoltage of the switching element with the first capacitor, Without the action of variable accommodation, the aforementioned problems cannot be solved. In addition, the buffer circuit described in Japanese Patent Laid-Open No. 6 2-2 7 2 8 6 2 is to open the switching element when the breaking current is large, and connect the second capacitor in parallel with the first capacitor, The combined capacity is increased to the sum of the capacitor capacities of both sides, and the capacity can be changed. According to this buffer circuit, according to the magnitude of the current, the opening element is turned on and off, and the size of the capacitor can be selected, which can reduce the loss of the buffer circuit and improve the controllability of the load current. However, according to this prior art buffer circuit, an active element must be used as a switching element, and the driving means, control means, and current detection means are required, and there is a problem of raising costs, and obtaining the main circuit The switching operation time of the switching element and the switching element of the snubber circuit becomes important, and there is a problem that this control becomes complicated. Generally speaking, in order to improve the overvoltage control effect on the switching elements of the snubber circuit, it is better to accommodate the larger capacitor in the snubber capacitor constituting the snubber circuit. (Please read the precautions on the back and then fill out this page) This paper uses the Chinese National Standard (CNS> A4 size (210X297 mm) A7 B7 printed by the Employee Consumer Cooperative of the Central Bureau of Standards and Statistics, Ministry of Economic Affairs 4) However, when the capacity of the capacitor is increased, there will be a problem of increasing the loss of the snubber circuit. The loss of the snubber circuit is that the capacity of the snubber capacitor is C. When the voltage change during discharge is V, it is expressed as CV2 / 2. The larger the capacity of the capacitor, the greater the loss. The prior art described in Japanese Patent Laid-Open No. 6-3 8 5 0 6 made the capacity of each buffer capacitor small and the capacity of the clamp capacitor large. The energy stored in the clamping capacitor is reproduced in the power supply to reduce the loss. However, this snubber circuit supplies the charge of the clamping capacitor through the current mainly through each clamping capacitor. When the capacity of each buffer capacitor is smaller than the capacity of the clamp capacitor, the smaller the capacity is, the larger the current flows to the clamp capacitor. The pressure is vibration, and it is the stress to the respective buffer capacitor. In addition, this vibration will induce over-short circuit of the voltage. The over-short circuit voltage will cause over-voltage suppression to the device, which will cause the original purpose of over-voltage suppression. In addition, when using bipolar transistors or IGBTs as the switching element, the greater the voltage change (dV / dt) at the time of current interruption, the slope current at the discharge of the storage carrier is increased, and the switching of the element is increased. Loss. For this reason, when the voltage vibration of the individual snubber capacitors mentioned above is the switching loss of related components, there will be a problem of adverse effects. Ideally, corresponding to the increase in current or voltage, the use of the A snubber circuit with a larger variable-capacity snubber capacitor is preferable. In the aforementioned snubber circuit of the prior art, when the capacitance of each snubber capacitor is increased in response to an increase in voltage, the vibration of the voltage can be suppressed. ---. 一 丨 装 -----.— 定 l · ----- ^ 点 (Please read the precautions on the back before filling this page) This paper size is applicable to China National Standard (CNS) A4 regulations (210X297mm) B7 Printed by the Beigong Consumer Cooperative of the Central Bureau of Economic Development of the Ministry of Economic Affairs 5. Description of the invention (5) 9 is to make the capacity of the capacitor variable 9 New means for detecting current or voltage are required to switch the plural Capacitor switching means, controlling the opening of the switching means > closing means > and attracting the problem of rising costs 0 100% of the present invention provides a simple circuit means to solve the above-mentioned conventional technical problems at a low cost 9 orders The capacitor capacity of the snubber circuit is variable. 9 Controllable snubber circuit that can reduce losses without hindering the load current. At the same time, the circuit 9 can provide a power conversion device using this snubber circuit. Other giant systems of the present invention provide In order to solve the above-mentioned conventional technical problems > the capacitor accommodation of the snubber circuit can be changed by simple circuit means with low cost 9 can be the same It can reduce the loss of voltage control and snubber circuit of the switching element. 9 It can suppress the vibration of the voltage and reduce the stress of other components of the switching element. The power conversion device can stabilize the operation. 0 The hugeness of the present invention is to control the load current supplied by the power supply In the snubber circuit of the switching element that circulates and cuts Pr, 9 includes a first diode connected in parallel between the input and output terminals of the switching element and a circuit means 9 connected in parallel to the first capacitor and the first two-pole Charging and discharging circuit means 9 connected in parallel. With the opening operation of the switching element > the closed circuit 9 returning to the first capacitor is formed by the first capacitor 9 via the switching element and the charging circuit means 9 Charging and discharging circuit means charging voltage 9 charging through the aforementioned charging and discharging circuit means Electricity m 9 causes the first diode to be reverse-biased m and is accompanied by the switching element 1L · and the closing action 9 is achieved by discharging the electricity m charged in the charge-discharge circuit means Ο As a better embodiment f f Charge and discharge circuit means> The inline paper size is applicable to the Chinese National Standard (CNS) A4 specification (210X297 mm). Printed by the Consumer Labor Cooperative of the Central Standards Bureau of the Ministry of Economic Affairs. A7 _ B7_ V. Description of invention (6) Ground connection The impedance and the second capacitor are such that the second diode, which flows current in the same direction as the first diode, is placed in parallel with the impedance. As a better embodiment, the capacity value of the second capacitor is set to be smaller than the capacity value of the first capacitor. Furthermore, the object of the present invention is achieved by using a snubber circuit configured as described above to constitute a power conversion device for a switching element constituting a power conversion device. In the snubber circuit of the present invention, the first capacitor has a capacity of C 1 and has a charge The capacity of the second capacitor of the discharge means is C 2. Then, with the opening operation of the switching element, the capacitor circuit of the present invention forms a closed circuit that returns to the first capacitor through the switching element and the charging and discharging circuit means, thereby charging the first capacitor The charge moves to the second capacitor and charges the second capacitor. As a result, the charging voltage of the first capacitor decreases, and conversely increases the charging voltage of the second capacitor. Eventually, the voltages of the first and second capacitors are equal, which is due to the reverse polarity. The input and output terminals are mutually secured, and the voltage between the input and output terminals of the switching element is 0. The aforementioned charge movement means that the first capacitor to the second capacitor allow energy to move, and the loss caused by the existing impedance (including the internal impedance of the switching element) on the moving path is C〇V2 / 2 (Only C. It is the combined capacity when the capacities of Cl and C 2 are connected in-line). As a result, when the loss of the buffer circuit of the present invention is equal to C when the capacity of C 1 and C 2 is equal to C, the loss CV2 / 2 of the buffer circuit of the prior art is half of that. In addition, the voltage charged in the second capacitor makes the in-line connection. L ^ 丨 ^ ------ 丨 lτ ------- (Please read the notes on the back of fM and fill out this page) Applicable to China National Standards (CNS) A4 specifications (2 丨 0X297mm) 8〇10〇ι Printed by the Ministry of Economic Affairs of the Ministry of Economic Affairs, Beigong Consumer Cooperatives. Fifth, the description of the invention (7) The first capacitor connected to the first 1 The diode is reverse biased to achieve the effect of making the first diode act as a switch. When the switching element is turned off, the first diode is reverse biased, so the current flowing through the element flows from the first diode through the second capacitor in the charging and discharging circuit means. At this time, the capacity of the synthesizing capacitor seen between the input and output terminals of the switching element is expressed by the above C 0. The current flowing into the buffer circuit charges the first capacitor, and conversely discharges the charge charged in the second capacitor. Then, the sum of the voltage increase of the first capacitor and the voltage decrease of the second capacitor is applied between the input and output terminals of the switching element. After the charging voltage of the second capacitor reaches 0, the aforementioned first diode changes to a forward bias state, and current flows from the first capacitor through the first diode. After this time, the capacity of the synthetic capacitor seen between the output terminals of the switching element is C1. That is, through the reverse bias and forward bias of the first diode, the capacity of the combined capacitor can be varied. When the switching element is turned off, the voltage value of the snubber circuit charged above the power supply voltage is Δν with the voltage applied to the switching element. Generally, the larger the capacitor capacity of the snubber circuit is, the smaller the ΔV is. The discharge at the time of opening increases the loss of the buffer circuit. In the present invention, the voltage △ V is suppressed by the first capacitor capacity C 1, and the loss of the snubber circuit is reduced by allowing part of the energy of the first capacitor C 1 to be absorbed by the second capacitor C 2 to reduce the overall loss . Also, when the snubber circuit is applied to the power conversion device as described above, the loss of the snubber circuit can be reduced, and the controllability of the load current can be improved. That is, the paper scale is applicable to the Chinese National Standard ^ (€ 阽) 84 specifications (2 丨 0 father 297mm) _1 (). (Please read the precautions on the back before filling this page) Central Ministry of Economic Affairs A7 B7 printed by the industrial and consumer cooperative. V. Description of invention (8). The second capacitor capacity C2 is set to be smaller than the first capacitor capacity C1. Therefore, the combined capacity C0 can be made smaller than C1 due to load When the current is small, the capacitor that charges the snubber circuit will continue to flow the current, which can be in a shorter time than in the prior art. As a result, the controllability of the load flow can be improved. In addition, another object of the present invention is to provide the first and second switching elements directly connected between the terminals of the main power supply, corresponding to the instructions of the control means, and controlling the two switching elements through the control of the two switching elements. The load at the connection point of the switching element, in the power conversion device that supplies power, is provided with a circuit means that connects the first diode and the first capacitor connected between the input and output terminals of the two switching elements in-line, Connected in parallel to the impedance of each of the first diodes, and connected in parallel to the second capacitor, a second diode that flows current in the same direction as the first diodes is arranged in parallel to the circuit of the impedance Means, and the second capacitor connected to the clamp between the clamping capacitor is achieved. As a better embodiment, the capacity value of the second capacitor is set to be smaller than the capacity value of the first capacitor. As a more preferred embodiment, the capacity value of the snubber capacitor for clamping is set to be larger than the capacity values of the first and second capacitors. In the power conversion device provided with the aforementioned means, let the snubber capacitor for clamping be C5, and the first and second capacitors of the first switching element are Cl, C2, and the first of the second switching element. , The second capacitor is C3, C4. In addition, when the first switch is turned on, the second switching element is turned off. Conversely, when the second switch is turned on, the first opened Γ-.-= ------ installed --- -丨 Subscribe 丨 ----- (Please read the precautions on the back and then fill out this page) This paper size is applicable to the Chinese National Standard (CNS) A4 specification (2 丨 0X297mm). Consumer Cooperative Printed A7 _B7 _—_ V. Description of the invention (9) The closing element is closed. Then, the first and second choppers C1 and C2 of the first switching element constitute the first variable-capacity capacitor, and the first and second capacitors C3 and C4 of the second switching element constitute the The second variable capacity capacitor. Now, let the first switching element turn on, and the second switching element turn off. At this time, the voltages of the first and second capacitors Cl and C2 provided in parallel with the first switching element are equal, and are charged in reverse polarity. In addition, the first and second capacitors C3 and C4 of the second switching element charge the capacitor C3 to a voltage equal to the power supply voltage, and the voltage of the capacitor C4 is zero. Also, the buffer capacitor C 5 for clamping is charged to a voltage equal to the m source pressure. According to the aforementioned state, when the first switching element is turned off, current will continue to flow through the energy stored in the wiring, and part of this current is formed by the first diode through the first variable capacity C 2 and C1 of the capacitor flow to the load, where the charging voltage is accommodated. However, the direction of C2 current is different from the polarity of the initial charging voltage, and it is at the initial charging voltage. On the one hand, C 1 is charged with the same polarity as the initial polarity. In addition, the above-mentioned residual current flows to the load through the diode, the snubber capacitor C5 for clamping, and C4 and C3 of the second variable capacity capacitor, so that the voltages of C4 and C3 are discharged. At this time, C3 decreases the voltage value, and C4 charges the voltage in the opposite polarity to C3 through the inflow current because the starting voltage is 0. In the aforementioned operation, when the voltage of C 2 is reduced to a predetermined value (zero), it is connected in series with C 1, and the voltage of C 2 is reverse biased. The first paper scale is applicable to the Chinese national rate (€ yang) Eight 4 specifications (210 to 297 g *) _ 12_ --------- 丨 installed ------ order .------ ^ (please read the notes on the back before filling this page) A7 __B7 _ _ Printed by the Ministry of Economic Affairs, Central Bureau of Industry and Consumers Co., Ltd. 5. Description of the invention (10) The diode is turned on, and the capacity of the first variable-capacity capacitor is the combined capacity of C 1 and C 2 , Change to the individual capacity of c 1. On the other hand, the charging voltage at C 4 is connected in-line with C 3. The diode in the conducting state is reverse biased by the voltage of C 4. The second variable-capacitance capacitor is due to the separation of C 3 Capacity, the inline combined capacity of C 4 and C 3 can be changed. As the result of the aforementioned operation, the same voltage value as C 5 is charged in C 1, and the voltage of C 2 is 0. In addition, the voltage values in C 3 and C 4 are equal, and the voltages with different polarities are charged, which offsets the combined voltage. As described above, the power conversion device of the present invention uses the individual capacity of one of the two capacitors constituting the variable capacity capacitor to suppress the overvoltage of the switching element, and discharges the current through the in-line combined capacity current It can fully control the overvoltage of the switching element, and can achieve the reduction of buffer loss.
例如，於前述中，令C1和C2之容量比呈4 :1時 ，可變容量電容器之容量顯示於直列合成容量之0. 8 X C 2至C 1之單獨容量（4 XC 2 )之5倍變化，經由 C 1之單獨容量，可充分抑制功率半導體元件之過電壓。 又，於放電時，於C 1和C 2經由直列流動之電流，可進 行放電動作之故，可僅止於對直列合成容量之緩衝損失。 於前述之中，控制於導通狀態和反偏壓狀態之二極體\ 係可e換爲第1、第2之開關手段，令此開關手段，經由 對應C 2、C 4之電壓加以控制，可同樣地加以動作。 以下，令本發明之緩衝電路之一實施例，經由圇面加 本紙張尺度逋用中國國家梂準（CNS ) A4規格（210X297公釐）_ _ —•丨卜-----裝-----丨訂l·-----^ (請七閲讀背面之注意事項再填寫本頁) 經濟部中央揉準局員工消费合作社印裝 A7 B7 _五、發明説明（11 ) 以詳細說明者。 圖1係顯示本發明之第1實施例之緩衝電路構成圇。 圖2係說明本發明之第1實施例動作之波形圖、圖3係說 明本發明之第1實施例之電流路徑圖、圖4係將本發明之 第1實施例之緩衝電路的損失和最大電壓，與以往技術比 較加以說明者。圖1 、圖3之中，1係電源、2爲負荷、 Q1爲絕緣閘型雙極性電晶體（以下稱IGBT) ' D 7 係二極體、Ds 1、Ds 2係第1 、第2之緩衝二極體、 C 1、C 2係第1、第2之緩衝電容器、R 1係緩衝阻抗 、LI、L2係寄生電感。 於圖1之中，做爲開關元件之功率半導體元件之 I GBTQ 1係具備輸入電流之集極端子、輸出電流之射 極端子、及施加控制電壓之閘極端子，經由施加於閘極端 子，或除去之控制電壓，將流於集極、射極間之電流流通 、切斷。然後、IGBTQ1係連接於該射極負荷2之一 端，負荷2之另端則介由具有寄生電感L1之配線連接於 電源1之正極，又、集極則介由具有寄生電感L 2之配線 連接於電源1之負極，控制對負荷2之電流。前述之寄生 電感L 1 、L 2係對應配線之形態加以決定，配線之距離 愈短愈小。又，於負荷2之兩端，並列連接二極體D 7， 負荷2爲誘導性時，回流至I GBTQ 1呈關閉後之負荷 電流。 前述之電路係做爲電力轉換裝置之主電路的一個臂加 以使用，通常，IGBTQ1之輸出入端子間，即於集極 (請先Μ讀背面之注意事項再填寫本頁) -裝_ 訂 本紙張尺度適用中國國家梯準（CNS ) Α4规格（21〇Χ297公釐） 14 經濟部中央梂準局貝工消费合作社印製 A7 B7五、發明説明（12 ) 、射極間設置緩衝電路。 本發明之第1實施例之緩衝電路係於I GBTQ 1之 集極、射極端子間，連接具有容量C 1之第1緩衝電容器 C1和第1之緩衝二極體Ds 1之直列電路，於第1之緩 衝二極體Ds 1並列地，連接具有容量C2之第3緩衝電 容器C 2和第2之緩衝二極體D s 2之直列電路所成充放 電電路手段加以構成者。然後，第2之緩衝二極體D s 2 係與第1之緩衝二極體Ds 1相同之極性地流入電流地加 以連接，又，於第2之緩衝二極髏D s 2之陽極、陰極間 並列連接阻抗R 1。 接著，具有如前述構成之緩衝重路的圇1電路中，令 I G B T Q 1開關時之動作，參照圖2加以說明。 圖2之中，顯示施加於I GBTQ 1之集極、射極間 之電壓Vc e，和流於集極、射極間之馑流I c e，和電 容器C 1及C 2之電壓Vc 1、Vc 2之動作波形。然而 ，T(off) 、T(on)係顯示 IGBTQ1 關閉、 開啓之時刻。於示於此圖2次動作波形中，Ε係電源1之 電壓，V m係顯示令主電路配線之能量以緩衝電路吸收之 結果，過充電電源電壓E以上之電壓的最大値。又，以下 之說明中，電容器C 1和C 2之容置係設定於C 1 >C 2 之關係者。 、 如後所述，第1 、第2之緩衝電容器C 1 、C 2中， 於I GBTQ 1之開啓期間中，於各圖1所示之極性充電 電壓，兩者之電壓爲相等値呈V0 °惟，I GBTQ 1之 (請先聞讀背面之注意事項再填寫本頁) .裝. 訂 本紙張尺度遴用中國國家梯率（CNS > A4規格（210犬297公釐} 15 A7 _B7___五、發明説明（l3 ) 集極、射極端子間之電壓係令電容器c 1和C 2相抵而呈 0 。 現在，於時刻T (0 f f )以前之IGBTQ1之開 啓期間，令流入負荷2之電流呈I L時，經由此電流I L ，蓄存於主電路配線之電感的電磁能量WL係可如式（1 )地加以表示。 WL=l/2 (L1+L2) IL 2··. ( 1 ) 經濟部中央標準局負工消费合作社印装 時刻T (OFF)以後之關閉期間，蓄存於前述配線 之電感的電磁能量WL係經由緩衝電路吸收，此電流則轉 流至緩衝電路。圖1所示點線係顯示此電流之路徑。即， 於I GBTQ 1開啓期間中，充電之C 2電壓係對第2之 緩衝二極體D s 2而言爲順偏壓，而對第1之緩衝二極雔 Ds 1而言爲反偏壓加以動作。爲此，第1之緩衝二極雅 D s 1係不能令轉流於前述緩衝電路之電流流走。因此， 流入緩衝電路之電流係經由電容器C 1至C 2，流入二極 體D s 2回到主電路，到達電源1之負極。 此時，IGBTQ1之集極、射極端子間所見之緩衝 電路的合成容置C 0係呈電容器C 1和C/直列連接之容 量，可以式2加以記載。 、 C 1 C 2 C 0 = - -.(2) C 1 + C 2 --^-----裝-----丨訂-------^旅 (請r閲讀背面之注意事項再填寫本頁) 本紙張尺度適用中國國家標準（CNS)A4規格（ 210X297公釐）—π - a〇l〇8l 經濟部中央標準局員工消费合作社印製 A7 B7 五、發明説明（14 ) 例如令電容器Cl和C2之容量比呈4 : 1 ，C1 = 4C2，該合成容量係呈0. 8C2，與單獨具備電容器 C 1時比較，呈1/5容置。流入電容器C 1和C 2之電 流係對電容器C 1而言，令充電電壓T ( 〇 f f )之前， 由値V 0增加，相反地，對C 2而言，減少充電電壓。® 容器容量爲C 1 <C 2之故，同樣電流流入時之電容器 C 1之電壓增加分和電容器C 2之電壓減少分，其値雖爲 不同，於I GBTQ 1之集極、射極間，施加雙方之電壓 變化分和之電壓。 於圖2，現在，令電容器C 2之充電電壓Vc 2呈0 之時刻爲T1，時刻T1之後，經由電容器C2之充電電 壓，無施加於二極體D s 1之反偏壓電壓之故，流入緩衝 電路之m流係呈通過圖1之電容器C 1和二極體D S 1之 電流，而呈只充電電容器C 1者。 如前述，本發明之緩衝電路係令二極體D s 1 ，對應 電容器C 2之充電電壓，令電流切斷，或做爲流通之開關 機能加以使用。然後，與前述之情形相同，電容器C 1和 C2之容量比爲4 :/1時，時刻T1以後之緩衝容量，增 加至較以前之5倍，抑制IGBTQ1之集極、射極間亀 壓Vc e之電壓上昇，令數1式所示之能量則完全被緩衝 電路所吸收時之時刻呈T2，此時，於IGBTQ1之集 極、射極間，施加最大電Μ V m。V m係以式（3 )加以 表示，無視緩衝電路之電感時，依附於主電路配線之電感 和電容器C 1 、及時刻T ( o f f )以前之負荷電流。 (請先《讀背面之注意事項再填寫本頁) 本紙張尺度適用中國國家標準（CNS)A4规格（ 210X297公釐）-17 - A7 B7五、發明説明（15 ) 經濟部中央搮隼局貝工消費合作社印製 L 1 + L 2 V m = E + - I L ...... ( 3 ) yj Cl 又、電容器C 1之充氰電壓係等於Vm之故，於電容 器 C 1蓄存有經由式（4 )所表示之能量W2。 1 W 2 = --C 1 V m 2 --(4) 2 充電至電源電壓E以上的電容器C 1之髦壓Vm，係 以經電容器C1至二極體D7 ，到達電源1之正極，由« 源1之負極介由阻抗R1、電容器C2 ，回到電容器C1 之路徑加以放電。於此放電動作之開始時點，於二極髏 Ds1將施加逆電壓之二極體Ds1 ，產生逆回復之現象 ，於二極體Ds 1 ，則呈加上配線於前述差電壓之逆起電 壓之過大逆電壓者，電容器C 2係亦同時具有抑制此逆電 壓之效果。然而，爲提高對二極體D s 1之逆電壓之抑制 效果，代替阻抗R 1 ，於二極體D s 2可連接逆極性之3 極體。 經由前述電容器C 1之放電，電容器C 1之充電DA 係由 Vm減少至以示（5)加以表示之電懕V1。又， 本紙張尺度逋用中國國家標準（CNS )八4洗格（210X297公釐）_ _ ^ ^—裝-----丨訂-------滅 (請先閲讀背面之注意事項再填寫本頁) 經濟部中央標準局貝工消费合作杜印製 A7 _B7_^_五、發明説明（16 ) 電容器C 2中，於圖1所示極性充電電壓，其値則爲表6 所示之V 2。 C 1 V m + C 2 E VI— -~— ...... ( 5 ) C 1 + C 2 C 1 ( V m - E ) V 2 = ---~· ...... ( 6 ) C 1 + C 2 前述放電所成電流會流入阻抗R 1之故，雖因阻抗R 1產生焦耳損失，但是此損失W R 0則如式（7 )所示， 不依附於阻抗R 1之値。又、電容器C 1和C 2所有能量 之合計爲 W 0 ，可以式（8 )加以表示。 1 W R 〇 — C 0 ( V m — E ) 2 ...... ( 7 ) 2 C 1 V 1 2 C 2 V 2 2 、 Wo— l· -----；. ...... ( 8 ) 2 2 (—裝------一訂―------^..A (請先閲讀背面之注意事項再填寫本頁) 本紙張尺度適用中國國家標準（CNS ) A4規格（210X297公釐） ιη -iy 經濟部中央樣準局負工消費合作社印製 A7 ________B7 五、發明説明（丨7 ) 接著’呈時刻τ (on) ，：IGBTQ1被關斷時， 此時蓄存於電容器c 1之電荷則被放電。該放電路徑則如 圖3之點線所示，由電容器C 1通過I GBTQ 1 ，經阻 抗R 1和電容器C 2回到電容器c 1之閉電路者。經由此 放電’充電於電容器C1之電壓v1則減少，相反地，電 合器C 2則由電容器c 1供予電荷，該充電電壓則由v 2 增加。然後’最終地，電容器C 1和c 2之電壓則呈相 等’呈式（9 )所示之電壓v〇。 於電MV G充電之電容器c 1和c 2之能量合計呈W 時，W 1係可以式（1 0 )加以顯示。又，時刻τ ( ON)以前之能置，即由式（8 )之w〇減去前述wi之 値則如式（1 1 )所示，但此差係圖3所示之c 1放髦電 流流於阻抗R1所產生之焦耳損失。 C1V0+C2V2 V 0 = ---—……（9 ) c 1 + c 2 (C1V1+C2V2)2 w 1 =--------……（10) 2 ( C 1 + C 2 ) 、 本紙浪尺度適用中國國家橾準（CNS ) A4規格（210X297公釐） 20 - ---------^丨裝-----丨訂-------p点 (請先閲讀背面之注意事項再填寫本頁) A7 B7 五、發明説明（18 ) 1 1 W 〇 - w 1 = -C 0 ( V 1 - V 2 ) 2 = -C Ο E 2 2 2 經濟部中央標準局負工消费合作社印製 以上，雖對本發明之第1實施例加以說明，使用式（ 1 )〜式（1 1 )，整理該要點時，則呈如下者。 即，於本發明之第1實施例中，於I GBTQ 1之關 閉時，緩衡電路所吸收之能置係等於式（4 )所示之能置 W2，和數1 0式所示能置W1之差，此差係等於（1 ) 之配線能置。又，吸收前述配線能量結果之最大電壓係經 由式（3 )加以表示。更且，於I GBTQ 1之開啓和關 閉之動作中，所產生電容器C 1之放電的損失係經由式（ 7 )和式（1 1 )所表示之能量和加以表示。 將前述本發明之第1實施例之緩衝電路的損失和最大 電壓，與以往技術比較所示結果則示於圚4 (a)、圇4 (b )。此圖中，比較以往技術之緩衝電路係直列連接於 二極體和電容器，於二極體並列設®阻抗爲一般者。又， 以往技術之緩衝電路之電容器容量係以本發明之第1實施 例加以說明的電容器c 1和C 2設定呈等於直列連接時之^ 合成容量 C 0之値。 由圖4 ( a )可知，視關於最大電壓Vm時，以往技 術之緩衝電路係令本發明之實施例之數3式的C1 ,以 Γ*---„------(11-- (請^-閲讀背面之注意事項再填寫本頁) —訂 本紙張尺度適用中國國家橾率（CNS ) A4规格（210X297公釐） 21 經濟部中央揉率局貝工消費合作社印製 A7 B7 五、發明説明（19 ) C 0置換之形式，因C 1 >c 0爲前提之故，以往之緩衝 電路則較本發明之實施例時爲大，兩者之差則比例於電流 L 1 〇 又，由圖4 (b)可知，由損失視之，本發明係於關For example, in the foregoing, when the capacity ratio of C1 and C2 is 4: 1, the capacity of the variable-capacity capacitor is shown in the inline combined capacity of 0.8 XC 2 to 5 times the individual capacity of C 1 (4 XC 2) Variations, through the individual capacity of C1, can adequately suppress the overvoltage of power semiconductor elements. In addition, when discharging, the current flowing through C 1 and C 2 through the in-line can perform the discharging operation, and it can be limited to the buffer loss of the in-line combined capacity. In the foregoing, the diode controlled in the on state and the reverse bias state can be replaced by the first and second switching means, so that this switching means is controlled by the voltage corresponding to C 2, C 4, It can be operated in the same way. In the following, an embodiment of the buffer circuit of the present invention is applied to the Chinese National Standard (CNS) A4 specification (210X297mm) by adding the paper size to the surface _ _ — • 丨 Bu -----installed- --- 丨 Subscribe l · ----- ^ (Please read the precautions on the back of the page and fill out this page) A7 B7 _V. Invention Description (11) for detailed description By. FIG. 1 shows the structure of a buffer circuit according to the first embodiment of the present invention. 2 is a waveform diagram illustrating the operation of the first embodiment of the present invention, FIG. 3 is a current path diagram illustrating the first embodiment of the present invention, and FIG. 4 is a diagram illustrating the loss and maximum of the buffer circuit of the first embodiment of the present invention. The voltage is explained in comparison with the prior art. In Figure 1 and Figure 3, 1 series power supply, 2 is load, Q1 is insulated gate bipolar transistor (hereinafter referred to as IGBT) 'D 7 series diode, Ds 1, Ds 2 series 1st, 2nd The snubber diode, C1, C2 are the first and second snubber capacitors, R1 is the snubber impedance, LI, and L2 are the parasitic inductances. In FIG. 1, I GBTQ 1 as a power semiconductor element of a switching element is provided with a collector terminal of an input current, an emitter terminal of an output current, and a gate terminal to which a control voltage is applied. The control voltage removed or removed circulates and cuts off the current flowing between the collector and the emitter. Then, IGBTQ1 is connected to one end of the emitter load 2, the other end of the load 2 is connected to the positive electrode of the power supply 1 through the wiring with parasitic inductance L1, and the collector is connected through the wiring with parasitic inductance L2 At the negative pole of power supply 1, control the current to load 2. The aforementioned parasitic inductances L 1 and L 2 are determined according to the shape of the wiring, and the shorter the wiring distance, the smaller the distance. In addition, diode D 7 is connected in parallel at both ends of load 2. When load 2 is inductive, it returns to I GBTQ 1 to turn off the load current. The aforementioned circuit is used as an arm of the main circuit of the power conversion device. Normally, the output of the IGBTQ1 is between the input and output terminals, that is, the collector (please read the precautions on the back and then fill out this page) -install_ order The paper standard is applicable to China National Standards (CNS) Α4 specifications (21〇297mm) 14 The Ministry of Economic Affairs Central Bureau of Economic and Technical Affairs printed the A7 B7 V. Description of the invention (12), a buffer circuit between the emitters. The buffer circuit of the first embodiment of the present invention is an in-line circuit connecting the first buffer capacitor C1 with the capacity C 1 and the first buffer diode Ds 1 between the collector and emitter terminals of I GBTQ 1. The first snubber diode Ds 1 is connected in parallel to form a charge-discharge circuit means by connecting a third snubber capacitor C 2 having a capacity C2 and an in-line circuit of the second snubber diode D s 2. Then, the second buffer diode D s 2 is connected to the same polarity as the first buffer diode Ds 1, and the current is connected to the anode and cathode of the second buffer diode D s 2. Connect impedance R 1 in parallel. Next, the operation when the I G B T Q 1 is turned on and off in the circuit 1 having the buffer reconfiguration as described above will be described with reference to FIG. 2. In Fig. 2, the voltage Vc e applied between the collector and emitter of I GBTQ 1, and the current I ce flowing between the collector and emitter, and the voltage Vc 1 of the capacitors C 1 and C 2 are shown. Action waveform of Vc 2. However, T (off) and T (on) indicate the moment when IGBTQ1 is turned off and turned on. In the second operation waveform shown in this figure, E is the voltage of the power supply 1, and V m is the result of the energy absorbed by the main circuit wiring absorbed by the snubber circuit, and the maximum value of the voltage above the overcharged power supply voltage E. In the following description, the accommodating capacity of the capacitors C 1 and C 2 is set to the relationship of C 1 > C 2. As described later, in the first and second snubber capacitors C 1 and C 2, during the turn-on period of I GBTQ 1, the polar charging voltages shown in each of FIG. 1 are equal, and the voltages of the two are equal to V0 ° However, I GBTQ 1 (please read the precautions on the back and then fill out this page). Packed. The standard size of the paper used in the selection of China National Standard (CNS> A4 size (210 dogs 297 mm) 15 A7 _B7__ _5. Description of the invention (l3) The voltage between the collector and emitter terminals makes the capacitors c 1 and C 2 offset to 0. Now, during the turn-on period of IGBTQ1 before time T (0 ff), the inflow load 2 When the current is IL, through this current IL, the electromagnetic energy WL stored in the inductance of the main circuit wiring can be expressed as formula (1). WL = l / 2 (L1 + L2) IL 2 ··. ( 1) During the closing period after the printing time T (OFF) of the Central Standards Bureau of the Ministry of Economic Affairs, the electromagnetic energy WL stored in the inductance of the aforementioned wiring is absorbed through the snubber circuit, and this current is diverted to the snubber circuit. The dotted line shown in 1 shows the path of this current. That is, during the period when I GBTQ 1 is turned on, the charged C 2 voltage is The buffer diode D s 2 is forward biased, and the first buffer diode Ds 1 is reverse biased. For this reason, the first buffer diode D s 1 cannot be made The current diverted to the aforementioned snubber circuit flows away. Therefore, the current flowing into the snubber circuit passes through the capacitors C 1 to C 2, flows into the diode D s 2, returns to the main circuit, and reaches the negative electrode of the power source 1. At this time, the IGBT Q1 The combined capacity C 0 of the snubber circuit seen between the collector and emitter terminals is the capacity of the capacitors C 1 and C / in-line connection, which can be described by Equation 2. C 1 C 2 C 0 =--. (2) C 1 + C 2-^ ----- installed ----- 丨 order ------- ^ travel (please read the notes on the back and then fill out this page) This paper standard is applicable to Chinese national standards (CNS) A4 specification (210X297mm)-π-a〇l〇8l printed by the Ministry of Economic Affairs Central Standards Bureau employee consumer cooperatives A7 B7 5. Invention description (14) For example, make the capacity ratio of capacitors Cl and C2 to 4: 1 , C1 = 4C2, the combined capacity is 0.8C2, which is 1/5 of the capacity when compared with the capacitor C1 alone. The current flowing into the capacitors C1 and C2 is for the capacitor C1, so that the charge Before the electric voltage T (〇ff), it increases from the value V 0. Conversely, for C 2, the charging voltage is reduced. ® The capacity of the container is C 1 < C 2, the same current flows into the capacitor C 1 Although the value of the voltage increase point and the voltage decrease point of the capacitor C 2 are different, between the collector and the emitter of the I GBTQ 1, a voltage of the sum of the voltage changes of both sides is applied. In FIG. 2, the time when the charging voltage Vc 2 of the capacitor C 2 is 0 is T1. After the time T1, there is no reverse bias voltage applied to the diode D s through the charging voltage of the capacitor C 2, The m current flowing into the snubber circuit is a current flowing through the capacitor C 1 and the diode DS 1 in FIG. 1, and is the one that charges the capacitor C 1 only. As described above, the snubber circuit of the present invention makes the diode D s 1 correspond to the charging voltage of the capacitor C 2 to cut off the current, or be used as a circulating switching function. Then, as in the previous case, when the capacity ratio of the capacitors C1 and C2 is 4: / 1, the buffer capacity after time T1 is increased to 5 times than before, suppressing the voltage Vc between the collector and emitter of IGBTQ1 The voltage of e rises so that the energy shown in Equation 1 is completely absorbed by the snubber circuit at the time T2. At this time, the maximum electric current M V m is applied between the collector and the emitter of IGBTQ1. V m is expressed by equation (3). When the inductance of the snubber circuit is ignored, the inductance attached to the main circuit wiring, the capacitor C 1, and the load current before time T (o f f) are ignored. (Please read "Notes on the back and then fill in this page") The paper size is applicable to the Chinese National Standard (CNS) A4 specification (210X297mm) -17-A7 B7 V. Description of invention (15) Central Falcon Bureau of the Ministry of Economic Affairs Printed by industrial and consumer cooperatives L 1 + L 2 V m = E +-IL ...... (3) yj Cl Also, the cyanide charging voltage of capacitor C 1 is equal to Vm, stored in capacitor C 1 Through the energy W2 represented by formula (4). 1 W 2 = --C 1 V m 2-(4) 2 The voltage Vm of the capacitor C 1 charged above the power supply voltage E reaches the anode of the power supply 1 through the capacitor C1 to the diode D7 «The negative electrode of source 1 is discharged through the impedance R1 and capacitor C2 and returns to the path of capacitor C1. At the beginning of this discharge action, a reverse voltage diode Ds1 will be applied to the diode Ds1, causing a reverse recovery phenomenon. At the diode Ds1, it will appear as the reverse starting voltage added to the aforementioned differential voltage. If the reverse voltage is too large, the capacitor C 2 also has the effect of suppressing this reverse voltage. However, in order to improve the suppression effect of the reverse voltage of the diode D s 1, instead of the impedance R 1, a reverse-polarity 3 diode can be connected to the diode D s 2. Through the discharge of the aforementioned capacitor C 1, the charge DA of the capacitor C 1 decreases from Vm to the electric charge V1 represented by (5). In addition, this paper uses the Chinese National Standards (CNS) 8 4 washing grid (210X297mm) _ _ ^ ^-installed -----丨 order -------off (please read the note on the back first Please fill in this page again) A7 _B7 _ ^ _ Duprinted by Beigong Consumer Cooperation, Central Bureau of Standards, Ministry of Economic Affairs 5. Description of the invention (16) In capacitor C2, the charging voltage of the polarity shown in Figure 1 is shown in Table 6. Shown as V 2. C 1 V m + C 2 E VI—-~ — ...... (5) C 1 + C 2 C 1 (V m-E) V 2 = --- ~ ... ( 6) C 1 + C 2 The current generated by the above discharge will flow into the impedance R 1. Although Joule loss occurs due to the impedance R 1, the loss WR 0 is as shown in equation (7), and does not depend on the impedance R 1. value. In addition, the total energy of capacitors C 1 and C 2 is W 0, which can be expressed by equation (8). 1 WR 〇— C 0 (V m — E) 2 ...... (7) 2 C 1 V 1 2 C 2 V 2 2, Wo— l · -----; ... . (8) 2 2 (—installed ------ one order -------- ^ .. A (please read the precautions on the back before filling out this page) This paper standard is applicable to China National Standards (CNS ) A4 specification (210X297 mm) ιη -iy Printed A7 by the Consumer Labor Cooperative of the Central Bureau of Prototyping of the Ministry of Economics. V. Invention description (丨 7) Then, the time τ (on) is presented: when IGBTQ1 is turned off, this The charge stored in the capacitor c 1 is discharged. The discharge path is shown by the dotted line in FIG. 3. From the capacitor C 1 through I GBTQ 1, through the impedance R 1 and the capacitor C 2 back to the closure of the capacitor c 1 Through this discharge, the voltage v1 charged to the capacitor C1 decreases, and conversely, the electric circuit C 2 is supplied with charge by the capacitor c 1, and the charging voltage increases by v 2. Then, finally, the capacitor C The voltages of 1 and c 2 are equal to the voltage v〇 shown in equation (9). When the energy of the capacitors c 1 and c 2 charged by the electric MV G is W, W 1 can be expressed by equation (1 0) To display. Again, before the time τ (ON) Can be set, that is, by subtracting the value of wi from the w in equation (8) as shown in equation (1 1), this difference is the Joule generated by the current c 1 shown in FIG. 3 flowing in the impedance R1 Loss. C1V0 + C2V2 V 0 = ---— …… (9) c 1 + c 2 (C1V1 + C2V2) 2 w 1 = -------- …… (10) 2 (C 1 + C 2) The standard of this paper is applicable to China National Standard (CNS) A4 (210X297mm) 20---------- ^ 丨 installed ----- 丨 ordered ------- p Click (please read the precautions on the back before filling in this page) A7 B7 5. Description of the invention (18) 1 1 W 〇- w 1 = -C 0 (V 1-V 2) 2 = -C Ο E 2 2 2 The above is printed by the Negative Labor Consumer Cooperative of the Central Bureau of Standards of the Ministry of Economic Affairs. Although the first embodiment of the present invention is described, using formulas (1) to (11), the following points are presented when sorting out the main points. That is, in this In the first embodiment of the invention, when I GBTQ 1 is turned off, the energy setting absorbed by the buffer circuit is equal to the difference between the energy setting W2 shown in equation (4) and the energy setting W1 shown in equation 10, This difference is equal to (1) the wiring energy setting. In addition, the maximum voltage of the result of absorbing the aforementioned wiring energy is expressed by equation (3) And more, in the 1 I GBTQ opening and closing operation of, the loss was 1 of the capacitor C discharges generated by the formula (7) and (11) represents the sum of the energy to be expressed. The loss and maximum voltage of the snubber circuit of the first embodiment of the present invention described above are compared with the prior art, and the results are shown in Figs. 4 (a) and 4 (b). In this figure, the snubber circuit in comparison with the prior art is connected in series to the diode and the capacitor, and the impedance of the diode in parallel is ordinary. In addition, the capacitor capacity of the buffer circuit in the prior art is set to a value equal to the combined capacity C 0 when the capacitors c 1 and C 2 described in the first embodiment of the present invention are connected in series. As can be seen from FIG. 4 (a), when considering the maximum voltage Vm, the buffer circuit of the prior art makes C1 of the formula 3 of the embodiment of the present invention, with Γ * ----------- (11- -(Please ^ -read the notes on the back and fill in this page) —The size of the revised paper is applicable to China ’s National Standard Rate (CNS) A4 (210X297mm) V. Description of the invention (19) The form of C 0 substitution, because C 1 > c 0 is the premise, the conventional buffer circuit is larger than the embodiment of the present invention, and the difference between the two is proportional to the current L 1 〇 In addition, as can be seen from FIG. 4 (b), the present invention is concerned with the loss
閉時之損失爲數1 1式加以表示，而以往技術之緩衝電路 之情形亦爲相同之値。圖4 (b)不依存於負荷電流IL 之損失，即I L=0時之損失則相當於此損失。一方面， IGBTQ1開閉期間中之本發明所造成之緩衝電路損失 ，即因電容器C 1之放電所產生之損失係經由數7式表示 ，但是以往技術時和本發明中，式（7 )之Vm値有所不 同。如圖4 (a)所說明，以往技術之緩衝電路VM係較 本發明之Vm爲大。爲此，有關損失WR 0時，以往技術 之緩衝電路者較大，兩者之差係比例於負荷電流I L之2 次方。 如前所述，本發明之第1實施例之緩衝電路係如圖4 所說明，較以往技術之緩衝電路，可提升低損失且過電壓 抑制效果。 前述本發明之第1之實施例之緩衝電路係爲變化緩衝 電容器之容量，對應第2之緩衝電容器C 2之充蕙電壓， 令第2之緩衝二極體Ds 1呈關閉或開啓，即，令第1之 緩衝二極體D s 1做爲開關加以工作。 、 因此，爲得與圖1所示本發明之第1實施例相同之特 性，代替緩衝二極體Ds1 ，使用具備輸出入端子和控制 端子之開關元件，令此開關元件對應緩衝電容器C 2之充 本紙張尺度適用中國國家橾準（CNS ) A4規格（210X297公釐） ~ ~ -------Ί裝-----^丨訂 L-----zk (請先閲讀背面之注意事項再填寫本頁) 經濟部中央揉準局貝工消费合作社印製 _B7五、發明説明（2〇 ) 電電壓，控制呈關閉或開啓亦可。 圖5係顯示如此本發明之第2實施例所成緩衝電路之 構成圖。於圖5之中，1 0係控制手段，S 1係開關元件 ，其他之符號係與圇1時者相同。此本發明之第2實施例 之緩衝電路係代替圖1所示緩衝電路之緩衝二極體D s 1 ，使用開關元件S1 ，令此開關元件S1 ，經由控制手段 1 0 ，對應電容器C 2之充電電壓加以控制者。 即，圖5所示之本發明第2實施例之緩衝電路，係於 經由圖1所說明之本發明第1實施例的二極體Ds1之位 置，連接開關元件S 1之輸入輸出端子之同時，將電容器 C 2之充電電壓經由控制手段1 〇加以檢出，此電壓係以 所定之値以下，將爲開關元件S 1開啓之信號，施加於開 關元件S 1件之控制端子地加以構成。然後，控制手段 1 0係檢出電容器C2之充電電壓，此電壓則於圖5所示 之極性中，爲0V以下時，令開關元件S1開啓，相反地 ，電容器C 2之充電電壓爲〇 V以上時，令開關元件S 1 關閉。 前述圖5所示之本發明之第2實施例之特性係與圖1 所示之本發明之第1實施例相同，對應電容器C 2之電壓 ，經由令開關元件S 1關閉、開啓，可令對I GBTQ 1 之緩衝電容器之容量等價變化，由此本發明之第2實施例 ，可得與前述本發明之第1實施例時完全同樣之效果。 然而，前述本發明之第2實施例係做爲開關元件S 1 ，使用NPN電晶體時，做爲開關元件S1，可滿足下式 (請先閲讀背面之注意^項再填寫本頁) 裝· τ-訂 本紙張尺度遑用中國國家標準（CNS ) A4現格（210X297公釐） -23 - 經濟部中央橾準局負工消費合作社印製 A7 _B7_五、發明説明（21 ) 說明條件的開關元件時，使用其他任何元件皆可。即，（ 1 )開關元件S 1係與並列連接之二極體Ds 2同一方向 流動電流者，（2)與前述電流之方向反方向中不流入電 流，又，（3)開關元件S1，係於關閉時，令输入端子 (圖5時爲集極）做爲基準電位，於输出端子（圖5中爲 射極）施加高電壓，此係與通常之半導體元件爲相反考， 可承受此反電壓。 開關元件S 1係考量以上之3條件時，如 MO S F E T於输出入端子間，無法令寄生二極體存在之 元件以單體加以使用。又，圇5所示η ρ η電晶體之開關 元件S1係雖滿足（1) 、（2)之條件，爲滿足（3) 之條件，需有令基極、射極間之耐電壓性變大的元件。 圖12係顯示使用上述實施例之緩衝電路的電力轉換 裝置之實施例構成的方塊圖。於圖1 2中，3係緩衝霣路 ，4係驅動電路，5係控制電路，6係電流檢出器，7係 交流電源，9爲轉換器，Q1〜Q6係IGBT、D1〜 D6係二極體，Ds 3、Ds 4係第3、第4之緩衝二極 體，C#3、C4係第3、第4之緩衝電容器，R2係緩 衝阻抗。圖12所示锾力轉換裝置之實施例係令負荷2爲 馬達，做爲對此馬達之控制裝置之反相器裝置，經由自交 流電源7接受電力之供給，自交流整流爲直流之轉換器卜 之內藏於轉換器9的m容器，加以平滑化施加直流電力。 然後，反相裝置係將具有圖1所示之本發明第1之實施例 緩衝電路的電路、做爲上臂和下臂直接連接之電路，令U 本紙張尺度遑用中國國家標準（CNS )八4况格（210X297公釐） "7. Γ-ΙΚ------「裝-------l·訂—----- (請L閲讀背面之注意事項再填寫本頁) 鯉濟部中央樣準局男工消費合作社印製 A7 一_____B7_ 五、發明説明（22 ) 相〜W相之各一相分構成之反相器，設呈3相分並列構成 0 U相之下臂構造係與圖1所說明本發明第1之實施例 爲相同者，上臂係於做爲開關元件之IGBTQ2 ，連接 二極體D2 ，和第3、第4之緩衝二極體Ds 3、Ds 4 、第3、第4之緩衝電容器C3、C4，緩衝阻抗R2所 成緩衝電路所構成。此緩衝電路係進行與圖1所說明之同 樣動作。 又，V相、W相之反相器亦經由上臂之I GBTQ 4 、Q6 ，下臂之IGBTQ3、Q5的開關元件，和連接 於各IGBT之二極體D3〜D6，和緩衝電路3，與U 相者同樣地加以構成。然後，由U相〜W相之各相反相器 之上臂和下臂連接點的输出端子，供予負荷2之馬達電力 0 做爲對反相器裝置之控制側之構成，具備控制電路5 及驅動電路4 ，控制電路5係根據输入之速度指令5和檢 出各相之輸出電流的電流檢出器6所產生之信號，令各相 之上臂及下臂之I GBT，產生開啓或關閉之信號，驅動 電路4係經由此控制電路之信號，驅動各I GBT之閘極 ，控制反相裝置，控制做爲負荷2之馬達。 前述本發明實施例所成電位變換裝置係於構成各相之 各臂之開關元件之I GBT，使用圖1所說明之本發明第 1實施例之緩衝電路之故，可達過電壓抑制和損失之減低 ，同時，可改善負苛電流爲小時之控制性的效果。 本紙張尺度適用中國國家標準（CNS) A4規格（ 210X297公釐）-_ (請先閲讀背面之注意事項再填寫本頁) •裝. —订 經濟部中央標準局負工消费合作杜印製 A7 B7五、發明説明（23 ) 接著，對於負荷電流爲小之時之控制性的改善加以說 明。 通常、馬達控制用之反相器裝置係做爲供給馬達之重 流，於各相輸出1 2 0度偏移之正弦波之電流。因此，各 相於流動幾近零之微小電流期間，於正弦波一周期中至少 產生2次。此時，數1式所示配線之電磁能量亦接近零， 設於構成臂之開關元件之I G B T的緩衝電路係令電路內 之電容器電壓，最低需有充電至電源電壓E之電流。 爲此，負荷電流爲微小之時，令開關元件之I G BT 呈關閉狀態時，於此元件爲充電並列設置之緩衝電路的電 容器之電流則通過負荷，持續流動，此係未令負荷電流如 控制電路之指令加以控制。於此電流持績流動之期間，含 於緩衢電路之電容器容置愈大則愈長。另一方面，緩衝電 路之電容器容量係愈大時，對開關元件之過電壓之抑制效 果亦愈大之故，一般而言，需令具有對應最大電流切斷時 之充分容量的電容器設於緩衝電路內。 本發明之第1實施例所成緩衝電路，已如說明所述， 令過電壓經由電容器C 1之單獨容量加以抑制，令損失經 由電容器C 1和C 2之直列合成容量C 0加以減低。然後 ，如此使用緩衝電路之圖6所示電力轉換裝置係於負荷電 流爲微小之時，僅需充電合成容量C 0之電流之故，於挫 制電路之指令以上，可縮短持續流入負荷電流的期間。 使用於重視負荷電流爲小時之控制性特性之用途的電 力轉換裝置，係令圖1 2所示實施例之電容器c 2之容量 本紙張尺度逍用中國國家搮準（CNS ) A4洗格（210X297公釐）―"~ * Ζϋ 1.1r-----「裝-----—訂—----- (請it-閲讀背面之注意事項再填寫本頁) 經濟部中夾標準局貝工消费合作社印*. 五、 發明説明 > ) 較 電 容 器 C 1 之 容 量 充 分 小 地 加 以 設 定 即 可 0 同 樣 地 9 對 於 電 容 器 C 4 對 電 容 器 C 3 呈 設 定 充 分 小 之 容 量 値 0 如 此 所 構 成 之 電 力 轉 換 裝 置 係 令 由 開 關 元 件 之 各 I G B T 之 集 極 、 射 極 端 子 間 所 視 之 緩 衝 m 路 的 合 成 容 量 C 0 與 C 2 呈 幾 近 相 等 之 値 9 於 微 小 電 流 時 可 令 充 電 /ιν£ 衝 容 量 之 電 流 變 小 9 又 於 過 電 流 之 時 於 過 電 流 時 以 電 容 器 C 1 之 動 作 9 可 充 分 進 行 過 電 壓 抑 制 效 果 0 前 述 之 本 發 明 實 施 例 所 成 電 力 轉 換 裝 置 * 係 以 使 用 圖 1 所 示 之 緩 衝 電 路 加 以 說 明 9 當 然 > 使 用 圖 5 之 緩 衝 電 路 構 成 亦 可 〇 如 以 上 所 述 9 根 據 本 發 明 之 緩 衝 電 路 時 9 較 以 往 技 術 之 緩 衝 電 路 > 於 同 —* 電 流 切 斷 之 時 9 可 減 低 施 加 於 開 關 元 件 之 電 流 9 亦 可 減 低 緩 衝 電 路 電 容 器 放 m 時 之 損 失 0 又 ， 根 據 本 發 明 所 使 用 緩 衝 電 路 之 電 力 轉 換 裝 置 時 9 於 負 荷 電 流 小 時 ， 充 電 緩 衝 容 置 之 電 流 則 可 防 止 較 控 制 電 路 之 指 令 以 上 地 持 績 流 入 可 縮 短 此 期 間 改 善 其 控 制 性 0 圖 6 係 顯 示 本 發 明 之 第 4 賁 施 例 之 電 力 轉 換 裝 置 的 構 成 例 圖 0 圖 7 係 顯 示 說 明 本 發 明 之 第 4 實 施 例 之 動 作 的 電 流 路 徑 圖 〇 圖 8 係 說 明 本 發 明 之 第 4 實 施 例 動 作 之 波 形 圖 > 圖 9 係使 用 本 發 明 第 4 實 施 例 之 緩 衝 電 路 損 失 和 最 大 電 壓 ， 與 以 往 技 術 比 較 之 說 明 圖 0 圖 6 之 中 9 1 係 電 源 9 係 負 荷 9 Q 1 N Q 2 係 I G B T 9 D 1 D 2 係 二 極 體 D S 1 D s 4 係緩衝二極體、 C 1 «"S -C 4 係緩衝電容 器 ， R 1 R 2 係 緩 衝 阻 抗 % C 5 係 箝 位 電 容 器 、 L 1 > 本紙张尺度逋用中國國家標車（CNS)A4规格（ 210X297公釐）_ 27 經濟部中央橾準扃貝工消费合作社印簟 A7 £7___五、發明説明（25 ) L 2係寄生電感。 圖6所示本發明之第4實施例係電橋連接做爲功率半 導體元件之開關元件之I GBTQ 2和二極體D 2的上臂 ，和 I GBTQ 1和二極體D 1所成下臂加以梅成。然 後，此主電路構構成係爲驅動馬達等之負荷2，相當於所 使用之3相反反相器之1相分者。 於圖6之中，電橋連接之功率半導體元件之 IGBTQ1、 Q2係具備輸入m流之集極、输出m流 之射極，及施加控制電壓之閘極端子，經由於閘極端子施 加控制m壓或切斷電壓，進行負荷2之控制。使用 I GBTQ 1 ，由電流1至負荷2供給電流之路徑，係介 由具有自電源1之正極之寄生電感 L1的配線，透過構 成未圖示之其他相電橋上之臂的元件，到達負荷2 —方之 端子，接著，由負荷2之他方之端子，到達I GBTQ 1 和Q2之連接處，更且，由IGBTQ1之射極端子，透 過具有自I GBTQ 1之射極端子至寄生電感L 2配線 L 2 ，回復至電源1之負極之路徑者。於前述中，寄生電 感L 1 、L 2係對應配線形狀加以決定，配線愈短則愈小 。又，負荷2係如馬達爲誘導性，I GBTQ 1爲關閉之 後，負荷電流係回流至二極體D2° IGBTQ1 、Q2所成電橋中，並列於電橋，連接 有令緩衝二極體D s 4、箝位電容器C 5、及緩衝二極體 D s 2直列連接之緩衝電路手段。然後、緩衝二極體 Ds 4和Ds 2係各與IGBTQ2及Q1同一極性地流 r.--r-----裝-----l· 訂 -----Λ- f ^ (請先閲讀背面之注項再填寫本頁) 本紙張尺度遑用中國國家標率（CNS ) A4規格（210 'X297公釐） 經濟部中央標準局貝工消費合作社印掣 A7 B7 五、發明説明（26 ) 通電流之方向連接。又，緩衝二極體D s 4和D s 2中， 各並列地設置放電用之緩衝阻抗R 2和R I。 於I GBTQ 1之集極端子和箝位電容器C 5之低電 位側端子（C 5和D s 2之連接處）間，連接緩衝電容器 C 1和C 2之直列電路的同時，於電容器C 1和C 2之連 接處，和I GBTQ 1之射極端子間，設置做爲開關手段 工作之緩衝二極體Ds1。又，於IGBTQ2之射極端 子和箝位電容器C 5之高電位側端子（C 5和D s 4之連 接處）間，連接緩衝電容器C 4和C 3之直列電路的同時 ，於電容器C 4和C 3之連接處，和I GBTQ 2之集極 端子間，設置做爲開關手段工作之緩衝二極體D s 3。 , 前述之緩衝電容器C 1和C 2之直列髦路，及緩衝電 容器C 4和C 3之直列電路係經由做爲開關手段工作之緩 衝二極體Ds 1、Ds 3，做爲可變容置電容器加以工作 。然而，緩衝二極體Ds 1和Ds 3係各與IGBTQ1 、Q 2同一極性地流動電流地加以連接。又，連接於除去 前述箝位電容器C 5之I GBTQ 1、Q 2之集極、射極 間的電路，做爲對各I GBTQ 1、Q 2之各別緩衝電路 加以工作。 接著，說明具有如前述之電路構成之本發明第4實施 例之動作。 s 如圇6所示，令實施例之動作以電流路徑所示之圖7 中，圖7 (a)係顯示IGBTQ1爲關閉啓時之電流路 徑、圖7 (b)係顯示IGBTQ1爲開啓時之電流路徑 本紙張尺度適用中國國家標準（CNS ) Α4規格（210X297公釐）-29 - --------「I-- - ( (請先閲讀背面之注意事項再填寫本頁) -、tT. Λ 經濟部中央標準局員工消費合作社印製 A7 ______B7_五、發明説明（27 ) 。又，圖8之中於圖6所示之實施例中，IGBTQ1爲 關閉，或於開啓時，各別顯示施加於I GBTQ 1之集極 、射極間之電壓Vc e、流於I GBTQ1之集極、射極 間之電流I ce、電容器C1及C2之電壓Vc 1、 Vc 2及電容器C5之電壓Vc 5之電壓波形。又，雖未 圖示，令霪容器C 3和C 4之電壓各記爲Vc 3、Vc 4 加以表記說明。 於圊8之中，T(off) 'T(on)係顯示 IGBTQ1爲關閉，開啓之時刻，Ε係顯示電源1之電 壓，Vm係顯示施加於 I GBTQ 1篦壓的最大値。又 ，以下之說明中，電容器Cl、C2之容置爲C1>C2 ，同樣地，電容器C3、C4之容量設定爲C3>C4爲 前提。然後、如後所述，電容器C 1和C 2之中，於 I GBTQ 1之開啓期間，充電各圖6所示極性之髦壓， 兩者之電壓則相等，令此値爲V0。但是，IGBTQ1 之集極、射極端子間之電壓係令電容器C 1和C 2之電壓 相銷而呈0。又.，此時，於電容器C 3和C 5之中，與電 源電壓E相等之電壓則被充電，電容器C 4之電壓爲簡化 而呈0。 現在，時刻T(of f)以前之IGBTQ1之開啓 期間中，經由負荷2流動之電流I L，蓄存於主電路配線 之電感電磁能量係可以式（1 2 )加以表示。 1(—裝 I .~ 訂 j^·^ (請先閲讀背面之注意事項再填寫本頁) 本紙張尺度適用中國國家標率（CNS ) A4規格（210'X297公釐 > -加 A7 B7 經濟部中央橾準局貝工消費合作社印製 五、發明説明（28 ) 1 W L = -(L1+L2) IL2 ...... (12) 2 時刻T (OFF)之後之IGBTQ1的關閉期間中 ，蓄存於前述配線之電感之電磁能量的電流，直至爲緩衝 電路吸收，以圖2 ( a )之點線所示路徑做爲電流i 1〜 i 5之電流加以流動。即，首先，電流i i雖爲流入第1可 變容量電容器之電容器C1和C2，於IGBTQ1之開 啓期間中，被充電之電容器C 2之電壓，係對二極體 D s 2爲順偏壓，但對二極體D s 1爲反偏壓工作之故， 此時，二極體D s 1無法流入電流。因此，電流i i係以 經自電容器Cl至C2，流於二極髏Ds 2回到主電路， 到達電源負極之路徑流動。此時，由 IGBTQ1之集 極、射極端子間所視之電容器容量係呈電容器C 1和 C 2直列連接之合成容量，可以式（1 3 )加以表示。 C 1 C 2 C 0 = ...... ( 1 3 ) C 1 + C 2 於式（1 3 )之中，例如令電容器c 1和C 2之容量 比爲4 : 1時，式（1 3)之合成容量係呈0· 8c2， 較電容器C1單獨之時之容量呈1/5之容量者。電流 ----：------1^-- - ^ (請先閲讀背面之注意Ϋ項再填寫本頁) 訂 本紙張尺度適用中國國家標準（CNS ) Α4现格（21〇Χ297公釐） 31 經濟部中央標準局貝工消費合作社印製 A7 B7五、發明説明（29 ) i i係對電容器 C 1 ，令充電電壓自於時刻T ( 〇 f f ) 以前充電之電壓値CO增加，相反地，對電容器c2則減 少充電電壓。電容器之容量爲C1>C2時，同樣電流流 入時之C 1電壓增加分和C 2之電壓減少分之値有所不同 ，但於I G B T Q 1之集極、射極間中，則施加（V c 1 一 V c 2 )之電壓。 前述之電流i 1開始流入的同時，於構成第2之可變 容量電容器之電容器C3、C4則流入電流i3。此電流 i3之路徑係如圖7 (a)所示者，二極體Ds3和Ds 4係皆爲阻止此電流，電流i 3係依電容器C 3、C 4、 C 5之順序流動，經由二極體Ds 2，回歸電源1之負極 的流路者。電流i 3係於I G B T Q 1之開啓時，將充電 於電容器C 3之電壓加以放電，一方面，於電容器C 4， 與圖7 (a)所示電容器C3不同之極性充電電壓，或亦 充電電容器C 5。 於電流i3流動期間，自IGBTQ2之集極、射極 端子間所視之第2可變容置電容器之容量係呈電容器C 4 和C3直列連接之合成容量，式（1 3)可以C1置換爲 C 3，C 2置換爲C 4加以表示。然後，此等之電容器之 電壓値Vc3和 Vc4之極性不同之故，於 IGBTQ2之集極、射極端子間施加（Vc 3 — Vc亡 )之電壓，此電壓由改變爲負値之時點，流入負荷2之電 流I L係透過二極體D 2加以環流。又，電容器C 4和 C 3之電壓經由相銷，二極體D s 4係呈順偏壓狀態，之 l· — ；------^丨裝-------丨訂------γ旅 (請t閱讀背面之注$項再填寫本頁) 本紙張尺度適用中國國家標準（CNS ) Μ規格（210'乂297公釐） 32 經濟部中央標準局貝工消費合作社印裝 A7 B7五、發明説明（30 ) 後，流動電流i 4 ，充電電容器C5。電容器C5係該容 量爲呈C5>C1加以選擇，#數之式（12)所示能量 被電容器C 5所吸收。 I GBTQ 1呈關閉，如前述流入電流，電容器C 2 之充電電壓V c 2呈0之時刻爲T 1時，經由電容器C 2 之電壓，施加於二極體D s 1之逆偏壓則於時刻T 1之後 消失，流入構成第1之可變容置電容器之電容器C 1 、 C 2的霉流係將該路徑切換，該電流則由電流i 1變換爲 電流i2，透過二極體 Ds 1，僅充電電容器C1。 如前述，緩衝二極體D s 1係對應電容器C 2之充m 電壓，將電流切斷，或做爲流通之開關加以工作。爲此， 時刻T 1以後，電容器C 1則做爲單獨之容量加以運作。 現在例如，令電容器C1和C2之容量比呈4 : 1時，時 刻T 1以後，第1之可變容量電容器之容量係增加呈該以 前之5倍，可抑制Vc e之電壓急遽上昇。然後。電流 i 2自開始流動至數1式所示之能量被吸收之期間，對 IGBTQ1 ，電容器C1和C5則呈並列設置之形式。 此結果，電容器C 1和C 5之電壓則呈相等，該最大電壓 係呈以式（14)所表示之Vm，IGBTQ1之最大電 壓亦等於式（14)之値。 l· — ^------I裝-- (請先閲讀背面之注意事項再填寫本頁) 訂 Η.^-The loss at the time of closing is expressed by a formula of 11, and the situation of the buffer circuit of the prior art is also the same. Figure 4 (b) does not depend on the loss of load current IL, that is, the loss when I L = 0 is equivalent to this loss. On the one hand, the buffer circuit loss caused by the present invention during the opening and closing period of IGBTQ1, that is, the loss due to the discharge of the capacitor C 1 is expressed by the formula 7, but in the prior art and in the present invention, Vm of formula (7) Values are different. As illustrated in FIG. 4 (a), the buffer circuit VM of the prior art is larger than the Vm of the present invention. For this reason, when the loss WR 0 is greater, the buffer circuit of the prior art is larger, and the difference between them is proportional to the power of the load current I L. As described above, the snubber circuit according to the first embodiment of the present invention is illustrated in FIG. 4. Compared with the snubber circuit in the prior art, the effect of suppressing low loss and overvoltage can be improved. The aforementioned snubber circuit of the first embodiment of the present invention is to change the capacity of the snubber capacitor, corresponding to the charging voltage of the second snubber capacitor C 2, so that the second snubber diode Ds 1 is turned off or turned on, that is, Let the first buffer diode D s 1 work as a switch. Therefore, in order to obtain the same characteristics as the first embodiment of the present invention shown in FIG. 1, instead of the buffer diode Ds1, a switching element having an input / output terminal and a control terminal is used, so that the switching element corresponds to the buffer capacitor C 2 The size of the refilled paper is applicable to the Chinese National Standard (CNS) A4 (210X297mm) ~ ~ ------- Ί installed ----- ^ 丨 order L ----- zk (please read the back first Please pay attention to this page and then fill out this page) Printed by Beigong Consumer Cooperative of the Central Bureau of Economics of the Ministry of Economic Affairs _B7 V. Description of Invention (2〇) The voltage can be turned off or turned on. Fig. 5 is a diagram showing the structure of a buffer circuit formed in the second embodiment of the present invention. In FIG. 5, 10 is a control means, S 1 is a switching element, and the other symbols are the same as those at 1 o'clock. The snubber circuit of the second embodiment of the present invention replaces the snubber diode D s 1 of the snubber circuit shown in FIG. 1 and uses a switching element S1 to make the switching element S1 pass the control means 10 to correspond to the capacitor C 2. The charging voltage is controlled by the person. That is, the buffer circuit of the second embodiment of the present invention shown in FIG. 5 is connected to the input and output terminals of the switching element S 1 at the position of the diode Ds1 of the first embodiment of the present invention illustrated by FIG. 1. The charging voltage of the capacitor C 2 is detected by the control means 10, and this voltage is set to a value below a predetermined value, and a signal for turning on the switching element S 1 is applied to the control terminal of the switching element S 1 to constitute. Then, the control means 10 detects the charging voltage of the capacitor C2. When the voltage is below 0V in the polarity shown in FIG. 5, the switching element S1 is turned on. Conversely, the charging voltage of the capacitor C2 is 0V Above, the switching element S 1 is turned off. The characteristics of the second embodiment of the present invention shown in FIG. 5 are the same as those of the first embodiment of the present invention shown in FIG. 1. Corresponding to the voltage of the capacitor C 2, by turning the switching element S 1 off and on, it can be made By equivalently changing the capacity of the buffer capacitor of I GBTQ 1, the second embodiment of the present invention can obtain exactly the same effect as in the aforementioned first embodiment of the present invention. However, the foregoing second embodiment of the present invention is used as the switching element S 1 as the switching element S 1, and as the switching element S1 when the NPN transistor is used, the following formula can be satisfied (please read the note ^ on the back side before filling in this page). τ-The standard size of the paper is not in accordance with the Chinese National Standard (CNS) A4 (210X297 mm) -23-Printed by the Ministry of Economic Affairs, Central Bureau of Preservation and Consumer Cooperatives A7 _B7_ V. Description of the invention (21) When switching elements, any other elements can be used. That is, (1) the switching element S 1 flows in the same direction as the diode Ds 2 connected in parallel, (2) no current flows in the opposite direction to the aforementioned current direction, and (3) the switching element S1 is When turned off, the input terminal (collector in Figure 5) is used as a reference potential, and a high voltage is applied to the output terminal (emitter in Figure 5). This is the opposite of a normal semiconductor device and can withstand this reaction. Voltage. When the switching element S 1 is considered the above three conditions, such as MO S F E T between the input and output terminals, the elements with parasitic diodes cannot be used as a single unit. Furthermore, although the switching element S1 of η ρ η transistor shown in Fig. 5 satisfies the conditions of (1) and (2), in order to satisfy the condition of (3), it is necessary to change the voltage resistance between the base and the emitter Big components. Fig. 12 is a block diagram showing an embodiment configuration of a power conversion device using the buffer circuit of the above embodiment. In Fig. 12, 3 series buffer circuit, 4 series drive circuit, 5 series control circuit, 6 series current detector, 7 series AC power supply, 9 is converter, Q1 ~ Q6 series IGBT, D1 ~ D6 series two Polar body, Ds 3, Ds 4 are the third and fourth buffer diodes, C # 3, C4 are the third and fourth buffer capacitors, R2 is the buffer impedance. The embodiment of the force conversion device shown in FIG. 12 makes the load 2 be a motor, as an inverter device for the control device of this motor, receives power supply from the AC power source 7 and converts from AC to DC converter Bu inside the m container of the converter 9 is smoothed and DC power is applied. Then, the inverter device uses the circuit with the buffer circuit of the first embodiment of the present invention as shown in FIG. 1 as the circuit for directly connecting the upper arm and the lower arm, so that the U paper size is not in accordance with the Chinese National Standard (CNS) 8. 4 condition grid (210X297mm) " 7. Γ-ΙΚ ------ "installed ------- l · order ------ (please read the notes on the back and fill in this Page) Printed A7 _____B7_ by the Men ’s Consumers Cooperative of the Central Provincial Bureau of the Ministry of Carriage and Economy 5. Description of the invention (22) Inverters composed of each of the phases ~ W phases, which are arranged in parallel with 3 phases to constitute 0 U In contrast, the arm structure is the same as the first embodiment of the invention described in FIG. 1, the upper arm is connected to the IGBTQ2 as a switching element, connected to the diode D2, and the third and fourth buffer diodes Ds 3. Ds 4, the third and fourth snubber capacitors C3, C4, and snubber impedance R2 constitute a snubber circuit. This snubber circuit performs the same operation as described in Figure 1. In addition, the reverse of the V phase and W phase The phase device is also connected to the switching elements of IGBTQ 4 and Q6 of the upper arm, the IGBT Q3 and Q5 of the lower arm, and the diodes D3 ~ D6 connected to each IGBT, and the buffer circuit 3, and the U phase Then, the output terminal of the connection point between the upper arm and the lower arm of each phase inverter of U-phase to W-phase is supplied to the motor power of load 2 0 as the control side of the inverter device. Equipped with a control circuit 5 and a drive circuit 4, the control circuit 5 is based on the signal generated by the input speed command 5 and the current detector 6 that detects the output current of each phase, so that the I GBT of the upper and lower arms of each phase, When the signal of on or off is generated, the drive circuit 4 drives the gate of each I GBT through the signal of this control circuit, controls the inverter device, and controls the motor as the load 2. The potential conversion device formed by the foregoing embodiment of the present invention is For the I GBT of the switching element constituting each arm of each phase, the use of the snubber circuit of the first embodiment of the present invention illustrated in FIG. 1 can achieve overvoltage suppression and loss reduction, and at the same time, can improve the negative harsh current as The control effect of the hour. This paper scale is applicable to the Chinese National Standard (CNS) A4 specification (210X297 mm) -_ (please read the precautions on the back before filling out this page) • Installed.-The Central Standards Bureau of the Ministry of Economic Affairs is responsible work A7 B7 by Feihe Dudu Printing Co., Ltd. 5. Description of the invention (23) Next, the improvement of the controllability when the load current is small will be described. Usually, the inverter device for motor control is used as the heavy current for the motor, The sine wave current with an offset of 120 degrees is output to each phase. Therefore, each phase generates at least 2 times in a cycle of a sine wave during the period when a minute current of nearly zero flows. At this time, the wiring shown in Equation 1 The electromagnetic energy is also close to zero. The snubber circuit of the IGBT that constitutes the switching element of the arm makes the capacitor voltage in the circuit at least the current charged to the power supply voltage E. For this reason, when the load current is small, and the IG BT of the switching element is turned off, the current of the capacitor of the snubber circuit provided in parallel with this element will continue to flow through the load. This is not to control the load current. The instructions of the circuit are controlled. During this period of current flow, the larger the capacitor contained in the snubber circuit, the longer it will be. On the other hand, the larger the capacitor capacity of the snubber circuit, the greater the effect of suppressing the overvoltage of the switching element. In general, it is necessary to provide a capacitor with sufficient capacity corresponding to the maximum current cut-off in the buffer Within the circuit. The buffer circuit formed in the first embodiment of the present invention has, as described in the description, caused the overvoltage to be suppressed by the individual capacity of the capacitor C1, and the loss is reduced by the in-line combined capacity C0 of the capacitors C1 and C2. Then, the power conversion device shown in FIG. 6 using the snubber circuit in this way is only required to charge the current of the combined capacity C 0 when the load current is very small, so that the continuous flow of load current can be shortened above the command of the throttling circuit. period. The power conversion device used for the purpose of attaching importance to the control characteristics of small load current is the capacity of the capacitor c 2 of the embodiment shown in FIG. 12 This paper standard is used in China National Standard (CNS) A4 washing grid (210X297 Mm) ― " ~ * 扎 ϋ 1.1r ----- 「装 -----— 訂 定 ------ (please read the notes on the back and fill in this page) Printed by Bureau Cooper Consumer Co., Ltd. V. Description of the invention >) It can be set to be sufficiently smaller than the capacity of the capacitor C 1 0 Similarly, 9 for the capacitor C 4 to the capacitor C 3 is set to a sufficiently small capacity value 0. The power conversion device is constructed so that the combined capacity of the buffer m circuit seen by the collector and emitter terminals of each IGBT of the switching element is nearly equal to the value of C 0 and C 2 9 can be charged at a small current / ιν £ The current of the impulse capacity becomes smaller 9 and the action of the capacitor C 1 during the overcurrent and the overcurrent occurs 9 Overvoltage suppression effect 0 The power conversion device * formed by the foregoing embodiment of the present invention is described using the snubber circuit shown in FIG. 9 Of course > The snubber circuit structure of FIG. 5 can also be used. As described above 9 According to this The invention of the buffer circuit 9 is better than the buffer circuit of the prior art > at the same time-when the current is cut off 9 can reduce the current applied to the switching element 9 can also reduce the loss when the snubber circuit capacitor is placed in m 0 When the power conversion device of the buffer circuit is used 9 when the load current is small, the current stored in the charge buffer can prevent the performance from flowing above the command of the control circuit and can shorten the period to improve its controllability. 0 Figure 6 shows the invention The configuration example of the power conversion device of the fourth embodiment is shown in Fig. 0. Fig. 7 shows the fourth embodiment of the present invention. Fig. 8 is a waveform diagram illustrating the operation of the fourth embodiment of the present invention > Fig. 9 is an explanatory diagram comparing with the prior art using the buffer circuit loss and maximum voltage of the fourth embodiment of the present invention 0 Among Figure 6, 9 1 series power supply 9 series load 9 Q 1 NQ 2 series IGBT 9 D 1 D 2 series diode DS 1 D s 4 series buffer diode, C 1 «" S -C 4 series buffer Capacitors, R 1 R 2 series buffer impedance% C 5 series clamp capacitors, L 1 > This paper standard uses the Chinese National Standard Vehicle (CNS) A4 specification (210X297 mm) _ 27 Central Ministry of Economic Affairs Consumer Cooperative Inquiry A7 £ 7 ___ V. Description of the invention (25) L 2 series parasitic inductance. The fourth embodiment of the present invention shown in FIG. 6 is a bridge connecting an upper arm of I GBTQ 2 and diode D 2 as a switching element of a power semiconductor element, and a lower arm formed by I GBTQ 1 and diode D 1 Add Mei Cheng. Then, the main circuit configuration is to drive the load 2 of the motor, etc., which is equivalent to one phase of the three inverters used. In FIG. 6, the IGBT Q1 and Q2 of the power semiconductor element connected by the bridge are provided with a collector of input m current, an emitter of output m current, and a gate terminal applying a control voltage, and a control m is applied through the gate terminal Press or cut off the voltage to control the load 2. Using I GBTQ 1, the current supply path from current 1 to load 2 is via wiring with parasitic inductance L1 from the positive pole of power supply 1 through components that constitute arms on other phase bridges (not shown) to load 2 -The terminal of the side, then, from the terminal of the other side of the load 2, to the junction of I GBTQ 1 and Q2, and furthermore, from the emitter terminal of IGBTQ1, through the emitter terminal of I GBTQ 1 to the parasitic inductance L 2 Wiring L 2 to return to the negative path of power supply 1. In the foregoing, the parasitic inductances L 1 and L 2 are determined according to the shape of the wiring, and the shorter the wiring, the smaller. In addition, the load 2 system is inductive, such as a motor, and I GBTQ 1 is turned off. The load current is returned to the diode D2 °. The bridge formed by IGBTQ1 and Q2 is parallel to the bridge, and the buffer diode D is connected. s 4. Clamp capacitor C 5, and snubber diode D s 2 snubber circuit means connected in-line. Then, the buffer diodes Ds 4 and Ds 2 each flow with the same polarity as the IGBT Q2 and Q1. R ---------------------------- Λ- f ^ ( Please read the notes on the back before filling out this page) This paper uses the Chinese National Standard Rate (CNS) A4 (210'X297mm) Printed by the Central Standards Bureau of the Ministry of Economic Affairs Beigong Consumer Cooperative A7 B7 V. Description of the invention (26) Connect in the direction of current flow. Moreover, in the buffer diodes D s 4 and D s 2, the buffer impedances R 2 and R I for discharge are provided in parallel. Between the collector terminal of I GBTQ 1 and the low potential side terminal of the clamp capacitor C 5 (the junction of C 5 and D s 2), while connecting the in-line circuit of the buffer capacitors C 1 and C 2 to the capacitor C 1 At the junction between C 2 and the emitter terminal of I GBTQ 1, a buffer diode Ds1 is set as a switching device. In addition, between the emitter terminal of IGBTQ2 and the high potential side terminal of the clamp capacitor C 5 (the junction of C 5 and D s 4), while connecting the in-line circuit of the buffer capacitors C 4 and C 3, connect the capacitor C 4 At the junction between C 3 and the collector terminal of I GBTQ 2, a buffer diode D s 3 is provided as a switching device. , The aforementioned in-line circuit of the snubber capacitors C 1 and C 2, and the in-line circuit of snubber capacitors C 4 and C 3 are used as variable capacity through the buffer diodes Ds 1, Ds 3 working as switching means Capacitor to work. However, the buffer diodes Ds 1 and Ds 3 are each connected so that current flows in the same polarity as the IGBTs Q1 and Q2. In addition, the circuit connected between the collector and emitter of I GBTQ 1, Q 2 excluding the aforementioned clamping capacitor C 5 operates as a separate buffer circuit for each I GBTQ 1, Q 2. Next, the operation of the fourth embodiment of the present invention having the aforementioned circuit configuration will be described. s As shown in Fig. 6, the operation of the embodiment is shown in the current path in Fig. 7, Fig. 7 (a) shows the current path when IGBTQ1 is off and Fig. 7 (b) shows the time when IGBTQ1 is on The current path of this paper is applicable to the Chinese National Standard (CNS) Α4 specification (210X297mm) -29--------- "I---((Please read the precautions on the back before filling this page)- , TT. Λ A7 ______B7_ printed by the employee consumer cooperative of the Central Bureau of Standards of the Ministry of Economy V. Invention description (27). In addition, in the embodiment shown in FIG. 6 in FIG. 8, IGBTQ1 is turned off, or when turned on, Each shows the voltage Vc e applied to the collector and emitter of I GBTQ 1, the current I ce between the collector and emitter of I GBTQ1, the voltages Vc 1, Vc 2 and C5 of the capacitors C1 and C2 The voltage waveform of the voltage Vc 5. Also, although not shown, let the voltages of the C containers C 3 and C 4 be denoted as Vc 3 and Vc 4 respectively. In C8, T (off) 'T ( on) shows that IGBTQ1 is off, when it is turned on, E shows the voltage of power supply 1, Vm shows the maximum value applied to the grate of I GBTQ 1. Also, in the following description The capacitances of the capacitors Cl and C2 are C1 > C2, and similarly, the capacitances of the capacitors C3 and C4 are set to C3 > C4. Then, as described later, among the capacitors C 1 and C 2, the During the turn-on period, the voltages of the polarities shown in Figure 6 are charged, and the voltages of the two are equal, making this value V0. However, the voltage between the collector and emitter terminals of IGBTQ1 makes the voltages of capacitors C 1 and C 2 The value is 0. Also, at this time, among the capacitors C 3 and C 5, the voltage equal to the power supply voltage E is charged, and the voltage of the capacitor C 4 is 0 for simplicity. Now, time T (of f) The current IL flowing through the load 2 during the turn-on period of the previous IGBTQ1, the inductive electromagnetic energy stored in the main circuit wiring can be expressed by the formula (1 2). 1 (—install I. ~ set j ^ · ^ (Please read the precautions on the back before filling out this page) This paper scale is applicable to China National Standard (CNS) A4 size (210'X297mm >-plus A7 B7 Printed by the Ministry of Economic Affairs Central Bureau of Industry and Fisheries Cooperative V. Description of the invention (28) 1 WL =-(L1 + L2) IL2 ...... (12) 2 IGBTQ1 turn off after time T (OFF) In between, the electromagnetic energy accumulator to the current of the inductance of the wires, until the absorption of the buffer circuit path of FIG. 2 (a) the current i shown as a dotted line 1~ i 5 of the current to be flowing. That is, first, although the current ii flows into the capacitors C1 and C2 of the first variable-capacitance capacitor, during the turn-on period of the IGBT Q1, the voltage of the charged capacitor C 2 is forward biased to the diode D s 2, However, the diode D s 1 is operated for reverse bias, and at this time, the diode D s 1 cannot flow current. Therefore, the current i i flows from the capacitor C1 to C2, flows through the diode Ds 2 and returns to the main circuit, and reaches the negative pole of the power source. At this time, the capacity of the capacitor viewed from the collector and emitter terminals of IGBTQ1 is the combined capacity of the capacitors C 1 and C 2 connected in series, which can be expressed by equation (1 3). C 1 C 2 C 0 = ...... (1 3) C 1 + C 2 in the formula (1 3), for example, when the capacity ratio of the capacitors c 1 and C 2 is 4: 1, the formula ( 1 3) The combined capacity is 0.8 c2, which is 1/5 of the capacity when capacitor C1 is alone. Current ----: ------ 1 ^--^ (Please read the note Ϋ on the back before filling in this page) The size of the paper for the specification is applicable to the Chinese National Standard (CNS) Α4 Cash (21〇Χ297 Mm) 31 The A7 B7 printed by the Beigong Consumer Cooperative of the Central Bureau of Standards of the Ministry of Economy V. Description of invention (29) ii is to the capacitor C 1, so that the charging voltage value CO increases before the time T (〇ff), Conversely, the charging voltage is reduced for capacitor c2. When the capacity of the capacitor is C1> C2, the value of the increase in voltage of C 1 and the decrease in voltage of C 2 when the same current flows are different, but between the collector and emitter of IGBTQ 1, (V c 1-V c 2) voltage. At the same time that the aforementioned current i 1 starts flowing, the current i 3 flows into the capacitors C3 and C4 constituting the second variable-capacitance capacitor. The path of this current i3 is as shown in FIG. 7 (a). Both diodes Ds3 and Ds 4 are to prevent this current. The current i 3 flows in the order of capacitors C 3, C 4 and C 5 through the two The polar body Ds 2 returns to the flow path of the negative pole of the power supply 1. The current i 3 is discharged when the IGBT Q 1 is turned on, and the voltage charged in the capacitor C 3 is discharged. On the one hand, the capacitor C 4 is charged with a voltage of a different polarity than the capacitor C 3 shown in FIG. 7 (a), or the capacitor is also charged C 5. During the flow of current i3, the capacity of the second variable-capacitance capacitor viewed from the collector and emitter terminals of IGBTQ2 is the combined capacity of the capacitors C 4 and C 3 connected in series. Equation (1 3) can be replaced by C1 C 3 and C 2 are replaced by C 4 and expressed. Then, because the voltage values of these capacitors Vc3 and Vc4 are different in polarity, a voltage (Vc 3-Vc death) is applied between the collector and emitter terminals of IGBTQ2. This voltage flows from the time when it changes to a negative value. The current IL of the load 2 is circulated through the diode D2. In addition, the voltages of the capacitors C 4 and C 3 pass through the phase pins, and the diode D s 4 is in a forward-biased state. ------ γ Brigade (please read the note $ item on the back and fill in this page) This paper scale is applicable to China National Standards (CNS) Μ specification (210 '297 mm) 32 Beigong, Central Bureau of Standards, Ministry of Economic Affairs After the consumer cooperative printed the A7 B7 V. Description of the invention (30), a current i 4 flows, charging the capacitor C5. The capacity of the capacitor C5 is selected such that C5 > C1, and the energy shown in # 12 (12) is absorbed by the capacitor C5. I GBTQ 1 is turned off. As the aforementioned current flows, when the charging voltage V c 2 of the capacitor C 2 is 0 is T 1, the reverse bias voltage applied to the diode D s 1 through the voltage of the capacitor C 2 is After time T1, it disappears, and the mildew flowing into the capacitors C1 and C2 constituting the first variable-capacitance capacitor switches the path, and the current is converted from the current i1 to the current i2, and passes through the diode Ds1. , Only the capacitor C1 is charged. As mentioned above, the buffer diode D s 1 corresponds to the charging m voltage of the capacitor C 2, cuts off the current, or works as a circulating switch. For this reason, after time T1, the capacitor C1 operates as a separate capacity. Now, for example, when the capacity ratio of the capacitors C1 and C2 is 4: 1, and after the time T1, the capacity of the first variable-capacity capacitor is increased by 5 times as much as before, which can suppress the rapid rise of the voltage of Vce. then. The current i 2 flows from the beginning to the period when the energy shown in Formula 1 is absorbed. For IGBTQ1, capacitors C1 and C5 are arranged in parallel. As a result, the voltages of the capacitors C 1 and C 5 are equal, the maximum voltage is Vm expressed by equation (14), and the maximum voltage of IGBTQ1 is also equal to the value of equation (14). l · — ^ ------ I installed-- (Please read the precautions on the back before filling out this page) Order Η. ^-
本紙伕尺度適用中囷國家標準（CNS)A4規格Π10Χ297公釐）_ & B7 經濟部中央標隼局負工消費合作社印製 五、發明説明（31 ) 施加於經由電容器C 3、C 4所構成之第2可變容量 電容器的電壓，係自電容器C 5之電壓，將電容器C 1之 電壓減去之値之故，第2之可變容量電容器之電壓則維持 於0 ，爲此電流i 3則不流入。 前述中，電容器C 1之容置則對較電容器C 2之容量 爲大時加以說明，假使電容器C 1之容量爲小C 2 >C 1 時，第1之可變容量電容器之容量則自式（1 1 )所示容 S，僅切換爲電容器C 1之容量時，容量之變化爲小，電 壓之抑制效果六小。又，無法充分抑制電壓之故，電容器 C 1之電壓係增加至電容器C 5之電壓以上，產生所謂逸 出。一方面，相反地，第2之可變容量電容器之電壓係向 負値下沖。又，爲解除此等之逸出和下沖，流入第1 、第 2之可變容量電容器凡電流極性則變化，招至共振現象。 在此，爲達本發明目的之過電壓抑制，伴隨圖6之構成， 構成第1、第2之可變容量電容器之各電容器之容量，係 需呈Cl> C2、C3>C4之關係。 電容器C 1之電壓係於圖8做爲Vc e顯示，最終達 至經由式（1 4 )所示最大値V m，V m係較電源電壓E 爲大之故，於其後之I GBTQ 1呈關閉之定常狀態期間 中，以由電容器C 1經二極體D 2 ，到達電源E之正極， 自電源之負極，介由阻抗R 1 、電容器C 2 ，回到電容器* C 1之路徑加以放電。 然而，此放電動作之開始時點中，於二極體D s 1施 加反電壓，令二極體D s 1產生反回復之現象。然後，通 (請先閲讀背面之注意事項再填寫本頁) 本紙張尺度適用中國國家揉準（CNS)A4規格（ 210X297公釐）_ 34 _ 經濟部中央標準局員工消费合作社印製 A7 ___B7_ 五、發明説明（32 ) 常，於二極體D s 1加上於前述差電位加上配線之逆起電 壓的過大逆電壓，電容器C 2係抑制此反電壓之效果亦配 合持有。又，同時於電容器C 5過充電之電壓，係自電容 器C5介由阻抗R2，到達電源1之正極，自電源1之負 極經由阻抗R 1 ，回到電容器C 5之路徑加以放電。經由 此放電，電容器C 5之電壓Vc 5係如以式（1 5 )所示 ，對應時間加以減少。This paper is applicable to China National Standards (CNS) A4 (Π10Χ297mm) _ & B7 Printed by the Central Standard Falcon Bureau of the Ministry of Economic Affairs, Negative Work Consumer Cooperative V. Description of Invention (31) Applied to C3, C4 The voltage of the second variable-capacity capacitor formed is the voltage of the capacitor C5, and the voltage of the capacitor C1 is subtracted, the voltage of the second variable-capacitance capacitor is maintained at 0, for this current i 3 does not flow in. In the foregoing, the capacity of the capacitor C 1 is explained when the capacity of the capacitor C 2 is larger. If the capacity of the capacitor C 1 is smaller C 2 > C 1, the capacity of the first variable capacity capacitor is When the capacity S shown in the formula (1 1) is only switched to the capacity of the capacitor C 1, the change in capacity is small, and the voltage suppression effect is six small. In addition, the voltage cannot be sufficiently suppressed, and the voltage of the capacitor C1 is increased above the voltage of the capacitor C5, causing so-called escape. On the one hand, on the contrary, the voltage of the second variable capacity capacitor undershoots negatively. In addition, in order to eliminate these escapes and undershoots, the polarity of the current flowing into the first and second variable-capacitance capacitors changes, causing resonance phenomena. Here, in order to achieve overvoltage suppression for the purpose of the present invention, with the configuration of FIG. 6, the capacitance of each capacitor constituting the first and second variable-capacitance capacitors needs to be in the relationship of Cl > C2, C3 > C4. The voltage of the capacitor C 1 is shown as Vc e in FIG. 8, and finally reaches the maximum value V m shown by the formula (1 4). V m is larger than the power supply voltage E, and the subsequent I GBTQ 1 During the steady-state period of being closed, the capacitor C 1 passes through the diode D 2 to reach the positive pole of the power source E, from the negative pole of the power source, through the impedance R 1 and the capacitor C 2, and returns to the path of the capacitor * C 1 Discharge. However, at the beginning of this discharge operation, a reverse voltage is applied to the diode D s 1 to cause a reverse recovery phenomenon of the diode D s 1. Then, please (please read the precautions on the back before filling in this page) This paper size is applicable to China National Standard (CNS) A4 specification (210X297mm) _ 34 _ Printed by the Ministry of Economy Central Standards Bureau Employee Consumer Cooperative A7 ___B7_ 2. Description of the invention (32) Often, the excessive reverse voltage added to the aforementioned differential potential plus the reverse reverse voltage of the wiring is added to the diode D s 1, and the effect of suppressing the reverse voltage of the capacitor C 2 is also matched. At the same time, the voltage overcharged in the capacitor C5 is from the capacitor C5 via the impedance R2 to the positive pole of the power supply 1, and from the negative pole of the power supply 1 through the impedance R1 to the path of the capacitor C5 to discharge. Through this discharge, the voltage Vc 5 of the capacitor C 5 is as shown in equation (1 5), which is reduced corresponding to the time.
Vc5=Vcl=E+(Vm-E)exp{-t/Rl+R2)C5} ...... (15) 電容器C 1之電壓係於前述放電之過程時，等於電容 器 C5之電壓Vc5,經由此放電減少之竄荷置AQ係 以 Cl (Vm — Vc5)表示。此電荷量AQ以電容器 C 2之容量除取之値則等於充電電壓時，C 2之電壓係可 以式（1 6 )加以表示，於圖7 ( a )所示極性充電Vc 2之電壓。 C 1 ( V m — V c 1 ) V c 2 = . ...... ( 1 6 ) C 2 於圖7 (b)，顯示IGBTQ1呈開啓時之電流路Vc5 = Vcl = E + (Vm-E) exp {-t / Rl + R2) C5} ...... (15) The voltage of capacitor C1 is equal to the voltage Vc5 of capacitor C5 during the foregoing discharge process, The channeling charge AQ reduced by this discharge is expressed as Cl (Vm-Vc5). When the value of this charge quantity AQ divided by the capacity of the capacitor C 2 is equal to the charging voltage, the voltage of C 2 can be expressed by equation (16), and the voltage of charging Vc 2 with the polarity shown in FIG. 7 (a). C 1 (V m — V c 1) V c 2 =... (1 6) C 2 is shown in Figure 7 (b), showing the current path when IGBTQ1 is turned on
徑。電流路徑係於前述說明之圖7 ( a )中，令電容器C 1置換呈C3 ，C2置換呈C4 、有關於電流，ίχ置換 本紙張尺度適用中國國家標準（CNS)A4規格（ 210X 297公釐）-35 - ： I 丨裝-----1丨訂-----「線 (請先閲讀t·面之注意事項再填寫本頁) 經濟部中央標準局貝工消費合作杜印製 A7 __ _B7___ 五、發明説明（33 ) 爲i6，i2置換爲i7， i 3置換爲is時，該原理爲同樣 ，在此加以簡單說明。 以時刻T (on)，呈IGBTQ1爲開啓時，首先 ，令電流i 6流於電容器C 4和C 6時，充電於圖7 ( a )之關閉期間的電容器C 4電壓則對二極體D s 3做爲反 偏壓工作。爲此，電流i6則流動於自二極體Ds 4 ，經 由電容器C4和C3，流入ICBTQ1 ，回流至髦源之 負極的路徑。此時，以電容器C 3、C 4所構成之第2可 變容量電容器之合成容量係以數2式令電容器C 1和C 2 ，置換爲電容器C 3和C 4的形式加以記述。電流i 6係 對電容器C 3增加充電電壓，相反地，對電容器C 4減少 充電電壓。然後，於I GBTQ 2之集極、射極間，施加 (Vc 3— Vc 4 )之電壓。 電流i 6開始流勸的同時，於以電容器C 1、C 2所 構成之第1可變容量電容器流動電流i 5。此電流i 5係以 自二極體D s 4依電容器C 5、C 2、C 1之順序加以流 動，經由IGBTQ1 ，回歸於電源1之負極的路徑加以 流動。電流i 5係於I GBTQ 1之關閉時，令充電於電 容器C 1的電壓放電，於電容器C 2充電如圖7 ( b )所 示電容器C 1不同極性之電壓。於流入電流丨5期間，第 1之可變容量電容器之合成容量係經由式（1 3 )加以表 示。然後，構成第1之可變容量電容器之電容器C1 、 C2的電壓Vc 1和Vc 2之極性不同之故，於 IGBTQ1之集極、射極間，施加（Vc 1— Vc 2 ) 本紙張尺度適用中國國家揉準（CNS ) A4規格（210X297公釐） 卜丨：------.夂丨裝------丨訂-------^旅 (請L閲讀背面之注意事項再填寫本頁) -36 - 經濟部中央梯準局員工消费合作社印製 A7 __B7 五、發明説明（34 ) 之電壓，終於Vc 1和Vc 2之電壓則被相銷。令此時之 兩者電壓呈VO’VO係可以式（17)所表示。path. The current path is shown in Figure 7 (a) of the previous description, the capacitor C 1 is replaced by C3, and the C2 is replaced by C4. Regarding the current, the paper size is replaced by the Chinese National Standard (CNS) A4 specification (210X 297mm ) -35-: I 丨 Install ----- 1 丨 Order ----- "Line (please read the precautions of t · face before filling this page) Printed by Cooperate with Consumers of the Central Standards Bureau of the Ministry of Economic Affairs A7 __ _B7___ Fifth, the description of invention (33) is i6, i2 is replaced by i7, i 3 is replaced by is, the principle is the same, here is a brief description. At time T (on), when IGBTQ1 is turned on, first , When the current i 6 flows in the capacitors C 4 and C 6, the voltage of the capacitor C 4 charged during the off period of FIG. 7 (a) acts as a reverse bias for the diode D s 3. For this reason, the current i 6 Then it flows from the diode Ds 4, through the capacitors C4 and C3, into the ICBTQ1 and back to the negative path of the fashion source. At this time, the combined capacity of the second variable-capacity capacitor formed by the capacitors C 3 and C 4 The capacitors C 1 and C 2 are replaced by the capacitors C 3 and C 4 in the formula of 2. The current i 6 is the capacitor C 3 Increase the charging voltage, on the contrary, reduce the charging voltage to the capacitor C 4. Then, between the collector and emitter of I GBTQ 2, the voltage of (Vc 3-Vc 4) is applied. At the same time as the current i 6 starts flowing, A current i 5 flows through the first variable-capacitance capacitor composed of capacitors C 1 and C 2. This current i 5 flows from diode D s 4 in the order of capacitors C 5, C 2 and C 1, Via IGBTQ1, return to the path of the negative electrode of the power supply 1. The current i 5 is discharged when I GBTQ 1 is turned off, and the voltage charged in the capacitor C 1 is discharged, and the capacitor C 2 is charged as shown in FIG. 7 (b) C 1 voltages of different polarities. During the inflow of current 丨 5, the combined capacity of the first variable-capacitance capacitor is expressed by equation (1 3). Then, the capacitors C1 and C2 that constitute the first variable-capacitance capacitor Because the polarities of the voltages Vc 1 and Vc 2 are different, they are applied between the collector and emitter of IGBTQ1 (Vc 1-Vc 2). This paper scale is applicable to China National Standard (CNS) A4 (210X297 mm). ： ------. 夂 丨 installed ------ 丨 booked ------- ^ Travel (please read the note on the back Please fill in this page for details) -36-A7 __B7 printed by the Employee Consumer Cooperative of the Central Escalation Bureau of the Ministry of Economic Affairs 5. The voltage of the invention description (34), and finally the voltages of Vc 1 and Vc 2 are sold. If the voltage is VO'VO, it can be expressed by formula (17).
ClVcl+C2Vc2 C 1 + C 2 當電容器C 4之充電電壓V c 4呈零時，爲消除施加 於二極體D s 3之反偏壓，流於經由電容器c 3、C 4構 成之第2可變容量電容器的電流係由電流丨6改變至電流 i 7，電流i 7係透過二極體D s 3，僅充電電容器C 3。 另一方，施加於經由電容器C 1、C 2構成之第1可變容 量電容器的電壓，係自電容器C 5之電壓減去電容器C 3 之電壓之値之故，第1之可變容置電容器電壓維持於0， 爲此電流i 5則不流動。 以前述說明之I GBTQ 1之開啓、關閉動作之過程 ，可減低可變容量電容器之充放電有關之損失爲本發明之 重要目的，對此說明如下。 令電容器C 1、C2之電壓由各式（1 5 )、式（1 6 )所表示之狀態，變化至顯示式（1 7 ) V 0之損失爲 W時，損失W係可以式（1 8 )加以顯示。 、 1 W = -C 0 ( V c 1 — V c 2 ) 2 ...... (18) 2 本紙張尺度適用中國國家梯準（CNS)A4規格（Z10X297公釐）-37 - LIK------「裝-----丨訂丨-----^ (請先閲讀背面之注意事項再填寫本頁) 經濟部中央標準局貝工消费合作社印製 A7 ___B7五、發明説明（35 ) 將前述本發明之第4實施例所使用之緩衝電路的損失 和最大電壓，比較於以往技術的結果則示於圖9 (a)、 圖9 (b)。圖9 (a)係比較最大電壓Vm之圖、圖9 (b )係比較損失之圖。於此圖中，比較之以往技術之緩 衝電路係直接連接於二極體和電容器，於二極體並列設置 .阻抗爲一般者。又，以往技術緩衝電路之電容器容置，係 設定呈等於以本發明之第4實施例所說明之電容器C 1和 C 2直列連接時之合成容量C 0値者。 由圖9 (a)可知，視關於最大電壓Vm時，以往技 術之緩衝電路係令本發明之實施例之式（1 4 )的（C 1 + C 5 )，以C0置換之形式，因C1+C5>C0爲前 提之故，以往之緩衝電路則較本發明之實施例時爲大，兩 者之差則比例於電流L 1。 又，由圖7 (b)可知，由損失視之，本發明係於 I GBTQ 1關閉時之損失爲式（1 8 )加以表示，以往 技術之緩衝電路時，令式（1 8 )之括弧內呈以Vm置換 之式。然後，以往技術之緩衝電路Vm係較本發明之Vm 爲大。爲此，有關損失W時，以往技術之緩衝電路者較 大，兩者之差係比例於負荷電流I L之2次方。 如前所述，本發明之第4實施例之緩衝電路係較以往 技術之緩衝電路，可提升低損失且過電壓抑制效果。 〜 使用於本發明之第4實施例的緩衝電路，係可減低緩 衝電路本身之損失，同時，可達成半導體元件之開關元件 ，即實施例之I G B T開關損失減低的效果，以下，對此 本紙張尺度適用中國國家標準（CNS M4规格（210X297公釐）_ 38 - 1-丨：一------^丨裝-----：—訂一------^,1 (請先閲讀背面之注意事項再填寫本頁) 經濟部中央橾準局負工消費合作杜印製 A 7 B7 五、發明説明（36 ) 加以說明。 於圖1 0中，令本發明之第4實施例之I GBTQ 1 之關閉時波形，與以往技術比較顯示。做爲開關元件之功 率半導體元件，呈使用I GBT、雙極性電晶體、GTO (控制級可關斷矽可控整流器）等之雙極型元件（經由電 子和正孔之2類之載體，流動電流之半導體元件）。此等 之元件係於切斷電流後，於稱之爲傾斜電流的元件內部， 流入起因於排出過剩蓄稹之載波的電流爲特徵。 圖1 0之中，令此電流流動之期間做爲傾斜期間加以 顯示。於傾斜期間產生電壓變動（dV/d t )時，該電 壓變動愈大，則傾斜電流愈大之情事，係於電力變換技術 中爲公知者。簡單地說，電壓決定載波（電荷）流動之速 度之故，電壓變動愈大，於短時間有許多之載波則移動， 電流則會多S之流入。 使用如此之元件，呈圇6所示之構成的本發明第4實 施例係於電流被切斷之期間（傾斜期間），可變容量電容 器之合成容置爲小之故，電壓變動爲大，於其後之傾斜期 間，如前所述，經由電容器C 1之單獨容量，抑制電壓之 上昇，可令電壓變動變得充分小。爲此，如圖1〇顯示， 本發明之實施例時，傾斜電流則變小，可令經由電壓和傾 斜電流產生之損失變小。一般而言，具備緩衝電路之電办 轉換裝置係關閉時之損失之約9 0 %產生於傾斜期間之故 ，如本發明之實施例，令傾斜電流變小則對損失的減少是 爲有效者。因此，前述之本發明實施例可得同時令緩衝電 本紙張尺度適用中國國家標準（CNS)A4規格（ 210X297公釐)_ 3g - 一 ---------^I裝-----—I訂·------^旅 (請t閲讀背面之注意事項再填寫本頁) SCl〇8l A7 經濟部中央標準局貝工消費合作杜印製 B7 _五、發明説明（37 ) 路之損失和傾斜期間之損失的效果° 對此，在於以往技術時，於I GBTQ 1並列設置之 個別緩衝電路之電容器容置爲小之時，如圓1〇所示電壓 則振動，因此影響傾斜電流亦變大，而招致損失之增加。 當然，可令各別緩衝電路之電容器容量變大，以抑制镰壓 振動，但於此時，緩衝電路之損失則比例於電容器之容量 而變大。 前述本發明之第4實施例係爲變化緩衝電路之電容器 容量，對應電容器C 2及C 4之充電電壓，二極體D s 1 及Ds 3流通電流或切斷地，即令二極體Ds 1、Ds 3 做爲一種開關加以工作。 因此，爲得與圖6所示本發明之第4實施例同一特性 ，代替二極體Ds 1 、Ds 3，使用具備輸出入端子和控 制端子之開關元件，令此開關元件對應電容器C 2、C 4 之充電電壓加以控制亦可。 圖11係顯示如此本發明之第5實施例所成構成圖。 於圇1 1之中，.1 0、1 1係控制手段，SI 、S2係開 關元件，其他之符號係與圖6時者相同。此本發明之第2 實施例係代替圖6所示緩衝電路之緩衝二極體D s 1、 Ds 3 ，使用開關元件S 1 、S 2 ，令此開關元件S 1 、 S2 ，經由控制手段1 〇、1 1 ，對應電容器C2、Cl 之充電電壓加以控制者。 即，圖11所示之本發明第2實施例，係於經由圖6 所說明之本發明第4實施例的二極體D s 1之位置，連接 本紙張尺度適用中國國家標率（CNS) A4規格（210·Χ297公釐）· 4〇 . ' ；— : ^ ^ I 裝-----1.—訂------^旅 (請先閲讀背面之注意事項再填寫本頁) 3C308J A7 * B7 經濟部中央標準局貝工消費合作社印製 五、發明説明（38 ) 1 開 關 元 件 S 1 之 輸 入 輸 出 端 子 之 同 時 9 將 電 容 器 C 2 之 充 1 1 電 電 壓 經 由 控 制 手 段 1 0 加 以 檢 出 9 此 電 壓 係 以 所 定 之 値 1 以 下 9 將 爲 開 關 元 件 S 1 開 啓 之 信 號 > 施 加 於 開 關 元 件 r—s 請 先 閲 1. S 1 件 之 控 制 端 子 地 加 以 構 成 0 又 同 樣 地 > 於 二 極 體 D S 3 之 位 置 ， 連 接 開 關 元 件 S 2 之 輸 入 輸 出 端 子 之 同 背 1 1 時 9 將 電 容 器 C 4 之 充 電 髦 壓 經 由 控 制 手 段 1 1 加 以 檢 出 之 注 € 1 1 I 9 此 電 壓 係 以 所 定 之値 以 下 將 爲 開 關 元 件 S 2 開 啓 之 信 事 項 再 1 1 號 9 施 加 於 該 控 制 端 子 地 加 以 構 成 0 f 本 1 裝 然 後 9 控 制 手 段 1 0 係 檢 出 電 容 器 C 2 之 充 電 電 壓 9 頁 1 1 此 m 壓 則 於 nsn 圖 5 所 示 之 極 性 中 爲 0 V 以 下 時 令 開 關 元 1 1 件 S 1 開 啓 9 相 反 地 9 電 容 器 C 2 之 充 電 壓 爲 0 V 以 上 1 時 9 令 開 關 元 件 S 1 關 閉 Ο 訂 此 前 述 本 發 明 之 第 5 實 施 例 係 做 爲 開 關 元 件 S 1 1 1 I S 2 9 使 用 N P N 電 晶 體 > 但 做 爲 開 關 元 件 S 1 > S 2 9 1 1 I 可 滿 足 下 式 說 明 條 件 的 開 關 元 件 時 > 使 用 其 他 任 何 元 件 皆 1 旅 可 0 即 9 ( 1 ) 開 關 元 件 S 1 、 S 2 係 與 並 列 連 接 之 二 極 1 體 D S 2 、 D S 4 同 一 方 向 流 動 電 流 者 ， ( 2 ) 與 前 述 電 1 1 流 之 方 向 反 方 向 中 不 流 入 電 流 9 又 5 ( 3 ) 開 關 元 件 S 1 1 1 、 S 2 9 係 於 關 閉 時 9 令 輸 入 端 子 ( 圖 1 1 時 9 S 1 1 S 2 之 集 極 ) 做 爲 基 準 電 位 9 於 輸 出 端 子 ( 圖 5 中 > S 1 1 > S 2 之 射 極 ) 施 加 高 電 壓 9 此 係 與 通 常 之 半 導 體 元 件 爲· 1 I 相 反 者 ， 可 承 受 此 反 電 壓 0 1 1 I 開 關 元 件 S 1 、 S 2 係 考 量 以 上 之 3 條 件 時 如 1 1 Μ 0 S F E T 於 输 出 入 端 子 間 無 法 令 寄 生 二 極 體 存 在 之 1 1 本紙張尺度適用中國國家標牟（CNS)A4規格（21〇X297公釐）-- A7 B7 經濟部中央樣準局貝工消费合作社印製 五、 發明説明（ 39 ) 1 1 元 件 以 單 體 加以 使 用 0 又 圖 1 1 所 示 η P η 電 晶 體 之 開 1 1 關 元 件 S 1 、S 2 係 雖 滿 足 ( 1 ) 、 ( 2 ) 之 條 件 ， 爲 滿 1 足 ( 3 ) 之 條件 9 需 有 令 基 極 射 極 間 之 耐 電 壓 性 變 大 的 1. I 請 | 元 件 0 先 閲 讀 1 於 圖 1 1所 示 本 發 明 之 第 5 實 施 例 中 9 控 制 手 段 1 0 背 面 -1 之 1 1 1 係 各 別檢 出 電 容 器 C 2 、 C 4 之 充 鼇 電 壓 9 此 電 Μ 注 1 1 示 於 圖 1 1 之極 性 中 y 爲 0 V 以 下 之 時 ， 開 關 元 件 S 1 、 事 項 再 1 J S 2 呈 開 啓 ，相 反 地 9 前 述 電 壓 爲 0 V 以 上 時 9 S 1 寫 本 1 裝 S 2 呈 關 閉 〇 頁 1 1 前 述 圖 1 1 所 示 本 發 明 第 5 實 施 例 之 特 性 9 係 與 圖 6 1 1 所 示 本 發 明 之第 4 實 施 例 相 同 對 應 電 容 器 C 2 、 C 4 9 1 | 令 開 關 元 件 S 1 S 2 經 由 關 閉 X 開 啓 控 制 9 令 對 訂 I G B T Q 1 ' Q 2 之 緩 衝 電 路 的 容 量 等 價 地 加 以 變 化 0 1 1 I 然 後 9 由 此 本發 明 之 第 5 實 施 例 時 可 得 完 全 同 樣 於 前 述 1 1 I 本 發 明 之 第 1實 施 例 時 之 效 果 0 1 圖 1 3 係顯 示 使 用 本 發 明 第 6 實 施 例 之 電 力 轉 換 裝 置 1 構 成 例 圖 9 爲馬 達 控 制 之 系 統 構 成 圖 〇 於 圇 1 3 中 9 3 係 1 1 緩 衝 電 路 9 4係 驅 動 電 路 > 5 係 控 制 電 路 9 6 係 電 流 檢 出 1 | 器 ， 7 係 交 流電 源 9 9 爲 轉 換 器 9 Q 3 Q 6 係 I G Β Τ 1 > D 3 D 6係 二 極 體 9 其 他 符 號 與 圇 6 時 相 同 0 1 1 圖 1 3 所示 本 發 明 第 6 實 施 例 之 電 力 轉 換 裝 置 係 令 負 1 荷 2 之 馬 達 做爲 反 相 器 裝 置 ， 經 由 白 交 流 電 源 7 接 受 電 力 1 1 之 供 給 9 白 交流 整 流 爲 直 流 之 轉 換 器 9 之 內 藏 於 轉 換 器 9 1 1 的 電 容 器 9 加以 平 滑 化 施 加 直 流 電 力 Ο 然 後 ， 反 相 裝 置 將 1 1 本紙張尺度適用中國國家標窣（CNS>A4規格（ 210X297公釐）_ 42 經濟部中央標準局員工消费合作社印製 A7 B7五、發明説明（40 ) 圖6所示實施例，令U相〜W相之各一相分構成之反相器 ，設呈3相分並列構成。 U相之構造係與圖6爲相同者，V相係上臂經由 I GBTQ 4和連接於此並列連接之二極體D 4所構成， 同樣地W相係上臂經由I GBTQ 6和連接於此並列連接 之二極體D6 ，或下臂經由IGBTQ5和連接於此並列 連接之二極體D 5所構成。U相中以虛線包困之緩衝電路 3係對圈6所示上臂和下臂之緩衝電路整體的構成，具有 同一構成之緩衝電路3則各具備V相和W相。然後，自U 、V、W相之各相反相器之上臂和下臂之連接點的輸出端 子，於做爲負荷2之馬達供予電力。 做爲對反相器裝置之控制側的構成，具備控制電路5 及驅動電路4，控制電路5係根據輸入之速度指令8和自 檢出各相之輸出電流之電流檢出器之信號，生成令各相之 上臂及下臂之I GBT開啓或關閉之信號，驅動電路4係 經由此控制電路5之手段，驅動各I G BT之閘，控制反 相器裝置，控制做爲負荷2之馬達。 前述本發明之第6實施例之電力轉換裝置，係如前述 ，經由緩衝電路之可變容量電容器之效果：可達過電壓抑 制和損失之減低，同時，可改善負荷電流小時之控制性， 且可抑制電壓之振動之故，可減低對電流檢出器6有不良 影響之雜訊。 以下，對於電流檢出器6有不良影響之離訊之減低加 以說明。即，於圖1 3中，負荷2之馬達卷線間存在有雜 本紙張尺度適用中國國家標準（CNS ) A4規格（2丨0X 297公釐）_ 43 _ ^―裝------訂------^旅 (請t閲讀背面之注意Ϋ項再填寫本頁) 經濟部中央標準局貝工消费合作社印製 A7 B7五、發明説明（41 ) 散電容，當U相〜W相之各輸出電壓變動時，於雜散電容 流入高頻之漏電流，此漏電流則會有影響電流檢出器6之 虞。本發明之實施例時，如圖7所說明，可抑制 I GBTQ 1之電壓表動（待於U相之輸出電壓之變動） 之故，可減低前述高頻漏電流。 又，圖1 3所示本發明之第6實施例之電力轉換裝置 ，係在於安定馬達之控制動作上爲有效者。即，雜訊之原 因係除流入前述馬達卷線間之雜散電容的高頻漏電流外， 有關於對地間浮游容量之雜訊電流等之各種原因，其多數 者爲起因於急驟的電壓變化（dV/d t )，於使用以往 技術之緩衝電路時，電壓則振動，於dV/d t變大之時 ，本發明實施例之電力轉換裝置，本發明之實施例之電力 轉換裝置係可抑制電壓振動及d V/d t之故，可達雜訊 之減低，安定化馬達之控制動作。 前述本發明之第6實施例之電力轉換裝置，係說明令 圖6所示實施例，呈U相〜W相之各一相分構成之反相器 ，呈3相分並列設置者，但亦可爲使用圇11所示實施例 之構成，可得同樣之效果。 圖1 4係說明本發明第7實施例所成電力轉換裝置之 構成圖。此實施例係改變經由圖13說明之本發明之第6 實施例之可變容量電容器之構成例者，圖中僅將圖1 3之 緩衝電路3之第1可變容量電容器的部分除去加以顯示， 有關其他所有I G B T的可變容量電容器亦同樣地加以構 成0 ^ I^------1T------^ 0 (請it·'閲讀f.面之注意Ϋ項再填寫本肓) 本紙張尺度適用中國國家橾準（CNS)A4规格（210X 297公釐） 44 經濟部中央標準局貝工消費合作社印掣 A7 __. B7五、發明説明（42 ) 圖14所示本發明之第7實施例係於電容器C1和二 極體Ds 1間具備開關元件S3 ，根據電流檢出器6之負 荷電流之檢出結果，控制甯路5則令開關元件S 3呈開啓 ，或控制於關閉者。即，此實施例係對馬達之負荷電流較 預設定之値爲小時，令開關元件設定呈關閉者爲特徵者。 開關元件S 3呈關閉狀態時經由電容器C 1、C 2構成之 第1之可變容量電容器之合成容置係，無關於二極髋 Dsl之偏壓狀態，固定以式（13)顯示之値。又，開 關元件S 3呈開啓時，進行圖7所說明之動作。 驅動馬達之時，供予馬達之電流係於各相偏移1 2 0 度之正弦波電流者。又，如式（1 2 )所示，配線之電磁 能量係比例於電流之2次方之故，電流爲小之時，開關元 件之I G B T於可容許之範圔，令緩衝遒路之容量爲小時 ，可損失之減低、緩衝電路充電時間之縮短面上爲較佳者 0 經由圖6說明之實施例時，可變容量電容器之容量則 由數2式所示容量置換爲電容器C 1之單獨容量之條件， 係式（1 7 )所示之電容器C2之電壓呈0者。式（1 7 )係依附於式（1 4 )之故，圖6所示實施例時，容量之 置換係間接依附於負荷電流。對負荷電流而言，令間接容 量變化呈直接之關係者，爲圇14所示本發明之第7實旃 例。 此本發明之第7實施例中，開關元件S 3關閉之期間 係對負荷2之正弦波電流之各周期的電流尖峰値則較預設 冢紙張尺度適用中國國家揉準（CNS ) A4規格（210X297公釐）-45 · —I— Γ 裝—I (請先閲讀背面之注$項再填寫本頁) 訂ClVcl + C2Vc2 C 1 + C 2 When the charging voltage V c 4 of the capacitor C 4 is zero, in order to eliminate the reverse bias voltage applied to the diode D s 3, it flows to the second The current of the variable-capacitance capacitor changes from the current I6 to the current i7, and the current i7 passes through the diode Ds3, and only charges the capacitor C3. On the other hand, the voltage applied to the first variable-capacitance capacitor constituted by capacitors C1 and C2 is the value of the first variable-capacitance capacitor due to the voltage of capacitor C5 minus the voltage of capacitor C3 The voltage is maintained at 0, so the current i 5 does not flow. It is an important object of the present invention to reduce the losses associated with the charge and discharge of the variable capacity capacitor by the process of opening and closing the I GBTQ 1 described above. This is explained below. When the voltages of the capacitors C1 and C2 are changed from the states represented by the various formulas (1 5) and (1 6) to the display formula (1 7), when the loss of V 0 is W, the loss W can be expressed as (1 8 ) To display. , 1 W = -C 0 (V c 1 — V c 2) 2 ...... (18) 2 This paper size applies to China National Standards (CNS) A4 specification (Z10X297mm) -37-LIK- ----- 「装 ----- 丨 Subscribe 丨 ----- ^ (Please read the precautions on the back before filling in this page) A7 ___B7 printed by Beigong Consumer Cooperative of Central Bureau of Standards of the Ministry of Economic Affairs Description (35) The loss and maximum voltage of the snubber circuit used in the fourth embodiment of the present invention described above are compared with those in the prior art. The results are shown in FIGS. 9 (a) and 9 (b). FIG. 9 (a) Fig. 9 is a graph comparing the maximum voltage Vm, and Fig. 9 (b) is a graph comparing the losses. In this figure, the buffer circuit of the prior art in comparison is directly connected to the diode and the capacitor, and arranged in parallel with the diode. The impedance is In general, the capacitor accommodation of the prior art buffer circuit is set to be equal to the combined capacity C 0 when the capacitors C 1 and C 2 described in the fourth embodiment of the present invention are connected in-line. From FIG. 9 ( a) It can be seen that, as far as the maximum voltage Vm is concerned, the buffer circuit of the prior art makes the (C 1 + C 5) of formula (1 4) of the embodiment of the present invention in the form of C0 substitution, C1 + C5> C0 is the premise, the conventional buffer circuit is larger than that of the embodiment of the present invention, and the difference between the two is proportional to the current L 1. Also, as can be seen from FIG. 7 (b), the loss In the present invention, the loss when I GBTQ 1 is turned off is expressed by formula (1 8). In the buffer circuit of the prior art, the brackets of formula (1 8) are replaced by Vm. Then, the buffer of the prior art The circuit Vm is larger than the Vm of the present invention. Therefore, when the loss W is related to the buffer circuit of the prior art, the difference between the two is proportional to the power of the load current IL. As described above, the present invention The buffer circuit of the fourth embodiment is a buffer circuit of the prior art, which can improve the effect of low loss and overvoltage suppression. ~ The buffer circuit of the fourth embodiment of the present invention can reduce the loss of the buffer circuit itself while , It can achieve the effect of reducing the switching loss of the semiconductor element, that is, the IGBT switching loss of the embodiment. The following, for this paper scale, the Chinese national standard (CNS M4 specification (210X297 mm) _ 38-1- 丨: 1- ---- ^ 丨 installed -----:-order one ----- -^, 1 (Please read the precautions on the back before filling in this page) Du 7 printed by the Central Department of Economics of the Ministry of Economic Affairs A 7 B7. 5. Description of invention (36). In Figure 10, order The off-time waveform of I GBTQ 1 according to the fourth embodiment of the present invention is shown in comparison with the prior art. As a power semiconductor element of a switching element, I GBT, bipolar transistor, GTO (control-level turn-off silicon can be used) Controlled rectifier) and other bipolar components (semiconductor components that flow current through carriers such as electrons and positive holes). These elements are characterized by the current flowing into the carrier called the oblique current after the current is cut off, which results from the discharge of the carrier wave of the excess accumulation. In Fig. 10, the period during which this current flows is shown as the tilt period. When a voltage variation (dV / d t) occurs during the ramping period, the larger the voltage variation, the larger the ramping current is known in the power conversion technology. Simply put, the voltage determines the speed of the carrier (charge) flow. The greater the voltage variation, the more carriers will move in a short time, and the more current will flow in. Using such an element, the fourth embodiment of the present invention having the configuration shown in Fig. 6 is that during the period when the current is cut off (inclined period), the combined capacitance of the variable capacitance capacitor is small, and the voltage fluctuation is large During the subsequent tilt period, as described above, the rise in voltage is suppressed by the individual capacity of the capacitor C1, and the voltage fluctuation can be sufficiently small. Therefore, as shown in FIG. 10, in the embodiment of the present invention, the slope current becomes smaller, and the loss due to the voltage and the slope current can be reduced. Generally speaking, about 90% of the loss when the power conversion device with a buffer circuit is turned off occurs during the tilt period. As in the embodiment of the present invention, it is effective to reduce the loss by making the tilt current smaller . Therefore, the foregoing embodiments of the present invention can simultaneously make the paper size of the buffered electricity book applicable to the Chinese National Standard (CNS) A4 specification (210X297mm) _ 3g-一 --------- ^ I 装 --- ------ I Order · ------ ^ Travel (please read the notes on the back and fill in this page) SCl〇8l A7 Central Bureau of Standards, Ministry of Economic Affairs, Beigong Consumer Cooperation Co., Ltd. B7 _Five, invention description ( 37) The effect of the loss of the road and the loss during the tilt ° For this, in the prior art, when the capacitor capacity of the individual snubber circuit provided in parallel with I GBTQ 1 is small, the voltage shown in circle 10 vibrates, Therefore, the influential slope current also becomes larger, and the loss is increased. Of course, the capacity of the capacitor of each buffer circuit can be increased to suppress the sickle pressure vibration, but at this time, the loss of the buffer circuit becomes larger in proportion to the capacity of the capacitor. The foregoing fourth embodiment of the present invention is to change the capacitor capacity of the snubber circuit, corresponding to the charging voltage of the capacitors C 2 and C 4, the diodes D s 1 and Ds 3 pass current or cut off the ground, that is, the diode Ds 1 , Ds 3 works as a switch. Therefore, in order to obtain the same characteristics as the fourth embodiment of the present invention shown in FIG. 6, instead of the diodes Ds 1 and Ds 3, a switching element having an input / output terminal and a control terminal is used, and this switching element corresponds to the capacitor C 2. The charging voltage of C 4 can also be controlled. FIG. 11 is a diagram showing the structure of the fifth embodiment of the present invention. In 囵 11, .1 0, 11 is the control means, SI, S2 is the switch element, and the other symbols are the same as in Fig. 6. The second embodiment of the present invention replaces the buffer diodes D s 1 and Ds 3 of the buffer circuit shown in FIG. 6 and uses switching elements S 1 and S 2 to make the switching elements S 1 and S 2 pass the control means 1 〇, 1 1, corresponding to the charging voltage of the capacitors C2, Cl to control. That is, the second embodiment of the present invention shown in FIG. 11 is at the position of the diode D s 1 according to the fourth embodiment of the present invention illustrated in FIG. 6, and the paper scale is applied to the Chinese National Standard Rate (CNS) A4 specification (210 · Χ297mm) · 4〇. ';-: ^ ^ I installed ----- 1.-Order ------ ^ travel (please read the notes on the back before filling this page ) 3C308J A7 * B7 Printed by the Beigong Consumer Cooperative of the Central Standards Bureau of the Ministry of Economic Affairs 5. Description of the invention (38) 1 Simultaneously with the input and output terminals of the switching element S 1 9 Charge the capacitor C 2 1 1 The electric voltage passes through the control means 1 0 Detected 9 This voltage is set to a value of 1 or less. 9 will be the signal that the switching element S 1 is turned on> applied to the switching element r—s. Please read 1. The control terminal of S 1 is configured to 0. The same > At the position of the diode DS 3, the input and output terminals of the switching element S 2 are connected to the same back 1 1 9 9 The charging voltage of the capacitor C 4 is passed through the control means 1 1 With the note of detection € 1 1 I 9 This voltage is based on the value below is the letter that will open the switching element S 2 and then 1 1 9 is applied to the control terminal to form 0 f this 1 installed then 9 control means 1 0 is the charging voltage of the capacitor C 2 detected 9 Page 1 1 This m voltage is below 0 V in the polarity shown in FIG. 5 when the switch element 1 1 piece S 1 is turned on 9 on the contrary 9 capacitor C 2 When the charging voltage is 0 V or more, the switch element S 1 is turned off at 9 o. The foregoing fifth embodiment of the present invention uses the NPN transistor as the switch element S 1 1 1 IS 2 9 but the switch element S 1 > S 2 9 1 1 I When a switching element that satisfies the conditions described in the following formula > Any other element is used 1 can be 0 0 9 (1) The switching elements S 1 and S 2 are connected in parallel with the two poles 1 DS 2 and DS 4 flow in the same direction Flowers, (2) No current flows in the reverse direction of the aforementioned electric current 1 1 9 5 5 (3) The switching elements S 1 1 1 and S 2 9 are closed when the 9 is input terminal (Figure 11 1 9 S 1 1 S 2 collector) as the reference potential 9 is applied to the output terminal (Figure 5 > S 1 1 > S 2 emitter) to apply a high voltage 9 This is the opposite of the normal semiconductor device is · 1 I It can withstand this reverse voltage. 0 1 1 I Switching elements S 1 and S 2 are considered above 3 conditions such as 1 1 Μ 0 SFET between input and output terminals can not make parasitic diode exist 1 1 This paper size is applicable China National Standard Mouth (CNS) A4 specification (21〇X297 mm)-A7 B7 Printed by Beigong Consumer Cooperative of the Central Prototype Bureau of the Ministry of Economic Affairs V. Description of the invention (39) 1 1 The components are used in a single unit 0 1 1 shows the opening of η P η transistor 1 1 The off elements S 1 and S 2 satisfy the conditions of (1) and (2), which is full The condition of 1 foot (3) 9 needs to increase the voltage resistance between the base and the emitter 1. I please | element 0 Read first 1 shown in FIG. 1 1 9 in the fifth embodiment of the invention 9 control means 1 0 Backside -1 of 1 1 1 The charging voltage of capacitors C 2 and C 4 is detected separately 9 This charge M Note 1 1 When the y is below 0 V in the polarity of FIG. 1 1, the switching element S 1. Matter 1 JS 2 is turned on, on the contrary 9 when the aforementioned voltage is 0 V or more 9 S 1 script 1 installed S 2 is turned off 〇 Page 1 1 The aforementioned FIG. 1 1 shows the characteristics of the fifth embodiment of the present invention 9 series Same as the fourth embodiment of the present invention shown in FIG. 6 1 1 corresponding to the capacitors C 2, C 4 9 1 | Let the switching element S 1 S 2 be controlled by closing X to enable the buffer circuit of the IGBT Q 1 ′ Q 2 Change the capacity equivalently 0 1 1 I then 9 In this way, the fifth embodiment of the present invention can be obtained exactly the same as the foregoing 1 1 I The effect of the first embodiment of the present invention 0 1 FIG. 1 3 shows the use of the sixth embodiment of the present invention Conversion device 1 configuration example Fig. 9 is a system configuration diagram of motor control. In Fig. 1 3 in 9 3 series 1 1 buffer circuit 9 4 series drive circuit > 5 series control circuit 9 6 series current detection 1 | device, 7 series The AC power supply 9 9 is a converter 9 Q 3 Q 6 series IG Β Τ 1 > D 3 D 6 series diode 9 other symbols are the same as in the case of 6 0 1 1 Figure 1 3 shows the sixth embodiment of the present invention The power conversion device uses a motor with a negative load of 1 as an inverter device, and receives a supply of electric power 1 1 through a white AC power supply 9 a converter 9 that converts white AC to DC 9 and a capacitor built into the converter 9 1 1 9 Smooth and apply DC power. Then, the inverter device will 1 1 This paper scale applies the Chinese national standard (CNS> A4 specification (210X297 mm) _ 42 Printed by the Ministry of Economic Affairs Central Standards Bureau Employee Consumer Cooperative A7 B7 V. Description of invention (40) The embodiment shown in FIG. 6, let U The phase-to-phase W inverters are divided into three phases in parallel. The structure of the U-phase is the same as that in FIG. 6, the upper arm of the V-phase system is constituted by the diode D 4 connected in parallel via the I GBTQ 4 and the upper arm of the W-phase system is similarly connected via the I GBTQ 6 in parallel. The connected diode D6, or the lower arm is formed via the IGBTQ5 and the diode D5 connected in parallel to this. The buffer circuit 3 surrounded by a dotted line in the U phase is the overall configuration of the buffer circuits of the upper arm and the lower arm shown in the circle 6, and the buffer circuit 3 having the same configuration is provided with the V phase and the W phase. Then, the output terminal from the connection point of the upper arm and the lower arm of each phase inverter of U, V, and W phases is supplied with power as a load 2 motor. As the structure of the control side of the inverter device, it has a control circuit 5 and a drive circuit 4, the control circuit 5 is based on the input speed command 8 and the signal of the current detector that self-detects the output current of each phase to generate The signal to enable or disable the I GBT of the upper and lower arms of each phase, the drive circuit 4 drives the gate of each IG BT through this control circuit 5, controls the inverter device, and controls the motor as the load 2. The aforementioned power conversion device of the sixth embodiment of the present invention, as mentioned above, has the effect of a variable-capacitance capacitor via a snubber circuit: it can achieve overvoltage suppression and loss reduction, and at the same time, it can improve the controllability when the load current is small, and The vibration of the voltage can be suppressed, and the noise that has an adverse effect on the current detector 6 can be reduced. In the following, the reduction of the ion signal which has an adverse effect on the current detector 6 will be explained. That is, in Figure 13, there is a miscellaneous paper size between the motor winding of load 2 and the Chinese national standard (CNS) A4 specification (2 丨 0X 297mm) _ 43 _ ^ ―installed ------ Order ------ ^ Travel (please read the note Ϋ on the back and fill in this page) A7 B7 printed by the Beigong Consumer Cooperative of the Central Bureau of Standards of the Ministry of Economy V. Description of invention (41) Dispersion capacitor, when U phase ~ When each output voltage of the W phase fluctuates, a high-frequency leakage current flows into the stray capacitance, and this leakage current may affect the current detector 6. In the embodiment of the present invention, as illustrated in FIG. 7, the voltmeter movement of the I GBTQ 1 (to be changed in the U-phase output voltage) can be suppressed, and the aforementioned high-frequency leakage current can be reduced. In addition, the power conversion device according to the sixth embodiment of the present invention shown in FIG. 13 is effective in controlling the operation of the stabilizer motor. That is, the cause of noise is not only the high-frequency leakage current flowing into the stray capacitance between the motor windings, but also the various reasons related to the noise current of the floating capacity between the ground, most of which are caused by the sudden voltage Variation (dV / dt), when the buffer circuit of the prior art is used, the voltage vibrates, and when dV / dt becomes larger, the power conversion device of the embodiment of the present invention, the power conversion device of the embodiment of the present invention can be suppressed Due to the voltage vibration and d V / dt, the noise can be reduced, and the control action of the motor can be stabilized. The foregoing power conversion device according to the sixth embodiment of the present invention is an example in which the embodiment shown in FIG. 6 is an inverter composed of a U-phase to a W-phase divided into three phases, but also The configuration shown in Fig. 11 can be used, and the same effect can be obtained. Fig. 14 is a diagram illustrating the configuration of a power conversion device according to a seventh embodiment of the present invention. This embodiment is a modification of the configuration example of the variable capacitance capacitor according to the sixth embodiment of the present invention illustrated by FIG. 13, and only the part of the first variable capacitance capacitor of the buffer circuit 3 of FIG. 13 is removed and shown in the figure. The variable capacitance capacitors of all other IGBTs are also constructed in the same way 0 ^ I ^ ------ 1T ------ ^ 0 (please it · 'Read the f.邓) This paper scale is applicable to the Chinese National Standard (CNS) A4 (210X 297 mm) 44 The Central Standards Bureau of the Ministry of Economic Affairs Beigong Consumer Cooperative Printed A7 __. B7 5. Description of the invention (42) In the seventh embodiment, a switching element S3 is provided between the capacitor C1 and the diode Ds 1. According to the detection result of the load current of the current detector 6, controlling the Ning Road 5 causes the switching element S3 to turn on, or control Yu closed. That is, this embodiment is characterized in that the load current of the motor is smaller than the preset value, and the switching element is set to be turned off. When the switching element S 3 is in the off state, the first accommodating capacity of the first variable-capacity capacitor formed by the capacitors C 1 and C 2 is fixed regardless of the bias state of the two-pole hip Dsl, and the value shown in formula (13) . When the switching element S 3 is turned on, the operation described in Fig. 7 is performed. When driving a motor, the current supplied to the motor is a sine wave current with a phase shift of 120 degrees. Also, as shown in equation (1 2), the electromagnetic energy of the wiring is proportional to the second power of the current. When the current is small, the IGBT of the switching element is within an allowable range, so that the capacity of the buffer circuit is Hours, the loss can be reduced, and the charging time of the snubber circuit is shortened. 0 is preferred. In the embodiment illustrated in FIG. 6, the capacity of the variable-capacity capacitor is replaced by the capacity represented by the formula 2 by the capacitor C 1 alone. The condition of the capacity is that the voltage of the capacitor C2 shown in the formula (17) is 0. Equation (1 7) is dependent on equation (1 4). In the embodiment shown in FIG. 6, the displacement of the capacity is indirectly dependent on the load current. For the load current, the direct relationship between the indirect capacity changes is the seventh example of the present invention shown in FIG. 14. In the seventh embodiment of the present invention, the period during which the switching element S 3 is turned off corresponds to the current peak value of each cycle of the sine wave current of the load 2 which is more applicable to the Chinese national standard (CNS) A4 specification than the preset paper size ( 210X297mm) -45 · —I— Γ 装 —I (Please read the note $ item on the back and then fill in this page)
T 旅 A7 B7 經濟部中央橾準局員工消費合作社印製 五、發明説明（43 ) 1 | 値爲小 時 ，經 常 地 開 關 S 3 係 呈 關 閉 0 1 1 根據 前述 之 本 發 明 第 7 實 施 例 時 t 於 電 流 爲 小 時 > 以 式（1 3 )表 示 之 容 量 、 電 流 爲 大 時 如 可 變 容 置 > 對 應 於 請- 先 閲 負荷2 之 動作 狀 況 9 增 加 模 式 可 呈 可 撓 性 地 加 以 對 應 0 | 根 據 以上 本 發 明 之 說 明 > 減 輕 對 做 爲 開 關 元 件 之 功 率 讀 背. 面 1 I 之 1 半導體 元 件之 過 電 壓 可 減 低 緩 衝 電 路 之 損 失 功 率 半 導 注 意 1 1 體元件 之 開關 損 失 0 又 9 抑 制 電 壓 變 動 9 減 低 呈 負 荷 影 響 事 項一 再 1 ' 1 I 裝置之 雜 訊， 可 安 定 裝 置 之 動 作 0 填 寫 本 % 1 1 【圖面 之 簡單 說 明 ] 1 1 1 圖 1 係顯 示 本 發 明 之 第 1 實 施 例 之 緩 衝 電 路 構 成 圖 0 1 圖 2 係說 明 本 發 明 之 第 1 實 施 例 動 作 之 波 形 圖 〇 訂 I 圖 3 係說 明 本 發 明 之 第 1 實 施 例 之 電 流 路 徑 圓 〇 1 1 I 圖 4 係將 本 發 明 之 第 1 實 施 例 之 緩 衝 電 路 的 損 失 和 最 1 1 1 大電壓 9 與以 往 技 術 比 較 加 以 說 明 者 0 1 圖 5 係顯 示 本 發 明 之 第 2 實 施 例 之 緩 衝 電 路 構 成 圖 0 線 1 圖 6 係顯 示 本 發 明 之 第 4 實 施 例 之 電 力 轉 換 裝 置 構 成 1 1 例圖者 Ο 1 | 圇 7 係顯 示 說 明 本 發 明 之 第 4 資 施 例 之 電 流 路 徑 圖 〇 1 圖 8 係說 明 本 發 明 之 第 4 實 施 例 動 作 之 波 形 圖 0 1 • 1 圖 9 係將 本 發 明 之 第 4 實 施 例 之 緩 衝 電 路 的 損 失 和 最、 1 1 I 大電壓 > 與以 往 技 術 比 較 加 以 說 明 者 0 1 1 圖 1 0係 令 本 發 明 之 第 4 實 施 例 之 開 關 元 件 的 關 斷 波 1 1 形與以 往 技術 比 較 說 明 者 0 1 1 本紙張尺度逋用中國國家橾準（CN$>A4規格（ 210X297公釐> _扣 A7 B7 五、發明説明（44 ) 圖1 1係顯示本發明之第5實施例之電力轉換裝置構 成例圖者。 圖1 2係顯示本發明之第3實施例之電力轉換裝置構 成例圖者。 圖13係顯示本發明之第6實施例之電力轉換裝置構 成例圖者。 圖14係顯示本發明之第7實施例之電力轉換裝置構 成例圖者。 I- 閲 讀 背· 之 注 項一 再 填 寫焚 本衣 頁 訂 線 經濟部中央搮準局員工消費合作社印製 本紙張尺度適用中國國家標準（CNS)A4規格（210X 297公釐）-47 -T Brigade A7 B7 Printed by the Consumer Cooperative of the Central Department of Economics of the Ministry of Economic Affairs 5. Description of the invention (43) 1 | Values are hours, and frequently the switch S 3 is turned off 0 1 1 According to the foregoing seventh embodiment of the invention t When the current is small > the capacity expressed by formula (1 3), if the current is large, such as variable capacity > corresponds to please-please read the operating conditions of load 2 9 increase mode can be flexibly corresponding to 0 According to the above description of the present invention > Mitigation of power reading as a switching element. Surface 1 I of 1 Overvoltage of semiconductor element can reduce the power loss of the snubber circuit Semiconductor Note 1 1 The switching loss of the body element 0 and 9 Suppression of voltage fluctuations 9 Reducing matters that are affected by load. Repeatedly 1 '1 I device noise, can stabilize device operation 0 Fill in this% 1 1 [Simple description of the drawing] 1 1 1 Figure 1 shows the invention The configuration of the buffer circuit of the first embodiment of the present invention. FIG. 0 1 FIG. 2 is a waveform diagram illustrating the operation of the first embodiment of the present invention. FIG. 3 is a diagram illustrating the current path circle of the first embodiment of the present invention. 4 is a comparison between the loss and the maximum of the buffer circuit of the first embodiment of the present invention 1 1 1 The large voltage 9 is compared with the prior art. 0 1 FIG. 5 shows the configuration of the buffer circuit of the second embodiment of the present invention. 1 FIG. 6 shows the configuration of the power conversion device according to the fourth embodiment of the present invention. 1 1 Example of the diagram Ο 1 | 囵 7 shows a current path diagram illustrating the fourth embodiment of the present invention. FIG. 8 shows the present invention. Waveform diagram of the operation of the fourth embodiment 0 1 • 1 FIG. 9 illustrates the loss and the maximum of the buffer circuit of the fourth embodiment of the present invention, 1 1 I large voltage > compared with the prior art 0 1 1 1 0 series The cut-off wave of the switching element according to the fourth embodiment of the present invention is compared with the prior art. Explainer 0 1 1 This paper scale adopts the Chinese National Standard (CN $> A4 specification (210X297mm > _buckle A7 B7 V. Description of the invention (44) Figure 11 is a diagram showing a configuration example of a power conversion device according to a fifth embodiment of the present invention. Fig. 12 is a diagram showing a configuration example of a power conversion device according to a third embodiment of the present invention. Fig. 13 is a diagram showing a configuration example of a power conversion device according to a sixth embodiment of the present invention. Fig. 14 is a diagram showing a configuration example of a power conversion device according to a seventh embodiment of the present invention. I- Read the back of the note item 1 and fill in the page of this clothing line. Printed by the Employee Consumer Cooperative of the Central Bureau of Economic Affairs of the Ministry of Economic Affairs. The paper size is in accordance with the Chinese National Standard (CNS) A4 (210X 297 mm) -47-