TW288190B - - Google Patents

Info

Publication number
TW288190B
TW288190B TW083102714A TW83102714A TW288190B TW 288190 B TW288190 B TW 288190B TW 083102714 A TW083102714 A TW 083102714A TW 83102714 A TW83102714 A TW 83102714A TW 288190 B TW288190 B TW 288190B
Authority
TW
Taiwan
Application number
TW083102714A
Other languages
Chinese (zh)
Original Assignee
Siemens Ag
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Family has litigation
First worldwide family litigation filed litigation Critical https://patents.darts-ip.com/?family=6478464&utm_source=google_patent&utm_medium=platform_link&utm_campaign=public_patent_search&patent=TW288190(B) "Global patent litigation dataset” by Darts-ip is licensed under a Creative Commons Attribution 4.0 International License.
Application filed by Siemens Ag filed Critical Siemens Ag
Application granted granted Critical
Publication of TW288190B publication Critical patent/TW288190B/zh

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/071—Manufacture or treatment of dielectric parts thereof
    • H10W20/081—Manufacture or treatment of dielectric parts thereof by forming openings in the dielectric parts
    • H10W20/084—Manufacture or treatment of dielectric parts thereof by forming openings in the dielectric parts for dual-damascene structures
    • H10W20/085—Manufacture or treatment of dielectric parts thereof by forming openings in the dielectric parts for dual-damascene structures involving intermediate temporary filling with material
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00—Etching of wafers, substrates or parts of devices
    • H10P50/73—Etching of wafers, substrates or parts of devices using masks for insulating materials
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/05—Etch and refill
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00—Semiconductor device manufacturing: process
    • Y10S438/942—Masking
    • Y10S438/948—Radiation resist
    • Y10S438/95—Multilayer mask including nonradiation sensitive layer
TW083102714A 1993-01-19 1994-03-28 TW288190B (oth)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE4301260 1993-01-19

Publications (1)

Publication Number Publication Date
TW288190B true TW288190B (oth) 1996-10-11

Family

ID=6478464

Family Applications (1)

Application Number Title Priority Date Filing Date
TW083102714A TW288190B (oth) 1993-01-19 1994-03-28

Country Status (5)

Country Link
US (1) US5422309A (oth)
EP (1) EP0609496B1 (oth)
JP (1) JPH06244290A (oth)
DE (1) DE59308407D1 (oth)
TW (1) TW288190B (oth)

Families Citing this family (31)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3069468B2 (ja) * 1993-06-14 2000-07-24 株式会社東芝 半導体装置の製造方法
US6268661B1 (en) 1999-08-31 2001-07-31 Nec Corporation Semiconductor device and method of its fabrication
US6033977A (en) * 1997-06-30 2000-03-07 Siemens Aktiengesellschaft Dual damascene structure
US6326296B1 (en) 1998-07-01 2001-12-04 Taiwan Semiconductor Manufacturing Company Method of forming dual damascene structure with improved contact/via edge integrity
US6020255A (en) * 1998-07-13 2000-02-01 Taiwan Semiconductor Manufacturing Company Dual damascene interconnect process with borderless contact
US6323118B1 (en) 1998-07-13 2001-11-27 Taiwan Semiconductor For Manufacturing Company Borderless dual damascene contact
US6406995B1 (en) 1998-09-30 2002-06-18 Intel Corporation Pattern-sensitive deposition for damascene processing
US6649515B2 (en) 1998-09-30 2003-11-18 Intel Corporation Photoimageable material patterning techniques useful in fabricating conductive lines in circuit structures
US6165898A (en) * 1998-10-23 2000-12-26 Taiwan Semiconductor Manufacturing Company Dual damascene patterned conductor layer formation method without etch stop layer
TW406369B (en) * 1998-12-18 2000-09-21 United Microelectronics Corp Method for manufacturing damascene
KR100452418B1 (ko) * 1999-06-30 2004-10-12 인텔 코오퍼레이션 듀얼 대머신 공정 중에서 하부 배선층을 보호하는 방법
US6124197A (en) 1999-10-01 2000-09-26 Advanced Micro Devices, Inc. Adjusting the size of conductive lines based upon contact size
US6812130B1 (en) 2000-02-09 2004-11-02 Infineon Technologies Ag Self-aligned dual damascene etch using a polymer
US6461963B1 (en) 2000-08-30 2002-10-08 Micron Technology, Inc. Utilization of disappearing silicon hard mask for fabrication of semiconductor structures
US6518643B2 (en) 2001-03-23 2003-02-11 International Business Machines Corporation Tri-layer dielectric fuse cap for laser deletion
US6566242B1 (en) 2001-03-23 2003-05-20 International Business Machines Corporation Dual damascene copper interconnect to a damascene tungsten wiring level
US6821896B1 (en) 2001-05-31 2004-11-23 Taiwan Semiconductor Manufacturing Company, Ltd. Method to eliminate via poison effect
US7200629B2 (en) * 2002-01-04 2007-04-03 Infineon Technologies Ag Apparatus and method for Fast Hadamard Transforms
US20050230262A1 (en) * 2004-04-20 2005-10-20 Semitool, Inc. Electrochemical methods for the formation of protective features on metallized features
US6887785B1 (en) 2004-05-13 2005-05-03 International Business Machines Corporation Etching openings of different depths using a single mask layer method and structure
US8263539B2 (en) 2005-10-28 2012-09-11 Dynaloy, Llc Dynamic multi-purpose composition for the removal of photoresists and methods for its use
US20070243773A1 (en) * 2005-10-28 2007-10-18 Phenis Michael T Dynamic multi-purpose composition for the removal of photoresists and method for its use
US7632796B2 (en) * 2005-10-28 2009-12-15 Dynaloy, Llc Dynamic multi-purpose composition for the removal of photoresists and method for its use
US9329486B2 (en) 2005-10-28 2016-05-03 Dynaloy, Llc Dynamic multi-purpose composition for the removal of photoresists and method for its use
US20100104824A1 (en) * 2006-10-23 2010-04-29 Phenis Michael T Dynamic multi-purpose composition for the removal of photoresists
US8136224B1 (en) 2008-05-15 2012-03-20 Western Digital (Fremont), Llc Method and system for providing a perpendicular magnetic recording head utilizing a mask having an undercut line
TWI450052B (zh) * 2008-06-24 2014-08-21 黛納羅伊有限責任公司 用於後段製程操作有效之剝離溶液
TWI539493B (zh) 2010-03-08 2016-06-21 黛納羅伊有限責任公司 用於摻雜具有分子單層之矽基材之方法及組合物
FR2974194B1 (fr) 2011-04-12 2013-11-15 Commissariat Energie Atomique Procede de lithographie
US9158202B2 (en) 2012-11-21 2015-10-13 Dynaloy, Llc Process and composition for removing substances from substrates
US10249621B2 (en) * 2016-12-15 2019-04-02 Texas Instruments Incorporated Dummy contacts to mitigate plasma charging damage to gate dielectrics

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4944836A (en) * 1985-10-28 1990-07-31 International Business Machines Corporation Chem-mech polishing method for producing coplanar metal/insulator films on a substrate
US4789648A (en) * 1985-10-28 1988-12-06 International Business Machines Corporation Method for producing coplanar multi-level metal/insulator films on a substrate and for forming patterned conductive lines simultaneously with stud vias
US4987099A (en) * 1989-12-29 1991-01-22 North American Philips Corp. Method for selectively filling contacts or vias or various depths with CVD tungsten
JPH0746755B2 (ja) * 1990-11-15 1995-05-17 インターナシヨナル・ビジネス・マシーンズ・コーポレーシヨン 多層薄膜構造の製造方法
US5262354A (en) * 1992-02-26 1993-11-16 International Business Machines Corporation Refractory metal capped low resistivity metal conductor lines and vias

Also Published As

Publication number Publication date
US5422309A (en) 1995-06-06
JPH06244290A (ja) 1994-09-02
EP0609496A1 (de) 1994-08-10
EP0609496B1 (de) 1998-04-15
DE59308407D1 (de) 1998-05-20

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Legal Events

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MK4A Expiration of patent term of an invention patent