TW275146B - Manufacturing method for a CMOS field effect transistor - Google Patents

Abstract

A manufacturing method for a CMOS field effect transistor utilizing big angle ion-implantation technique to form N-channel field effect transistors and P-channel field effect transistors on a P-type silicon substrate, comprising the steps of: (a) providing the silicon substrate at least with P-channel well, N-channel well, a plurality of gate electrodes and gate oxide layers formed on; (b) utilizing a first photomask to cover the region for forming the P-channel field effect transistor, and then performing N- ion small angle implantation to form a first N-type ion-implantation region; (c) forming a first spacer; (d) utilizing a second photomask to cover the region for forming the P-channel field effect transistor, and then performing a first N+ ion small angle implantation to form a second N-type ion-implantation region; (e) forming a second spacer; (f) utilizing a third photomask to cover the region for forming the P-channel field effect transistor, and then performing a second N+ ion small angle implantation to form a third N-type ion-implantation region; (g) utilizing a fourth photomask to cover the region for forming the N-channel field effect transistor, and then performing a P- ion big angle implantation to form a first P-type ion-implantation region, and further performing P+ ion small angle implantation to form a second P-type ion-implantation region; (h) depositing an insulator layer on the field oxide layer and the transistor devices; (i) utilizing a fifth photomask to form contact windows.