TW274146B - - Google Patents
Info
- Publication number
- TW274146B TW274146B TW082106942A TW82106942A TW274146B TW 274146 B TW274146 B TW 274146B TW 082106942 A TW082106942 A TW 082106942A TW 82106942 A TW82106942 A TW 82106942A TW 274146 B TW274146 B TW 274146B
- Authority
- TW
- Taiwan
Links
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/22—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities
- H01L21/225—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities using diffusion into or out of a solid from or into a solid phase, e.g. a doped oxide layer
- H01L21/2251—Diffusion into or out of group IV semiconductors
- H01L21/2252—Diffusion into or out of group IV semiconductors using predeposition of impurities into the semiconductor surface, e.g. from a gaseous phase
- H01L21/2253—Diffusion into or out of group IV semiconductors using predeposition of impurities into the semiconductor surface, e.g. from a gaseous phase by ion implantation
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
- H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
- H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
- H10D84/0165—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
- H10D84/0191—Manufacturing their doped wells
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
- H10D84/02—Manufacture or treatment characterised by using material-based technologies
- H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
- H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/80—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
- H10D84/82—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components
- H10D84/83—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET]
- H10D84/85—Complementary IGFETs, e.g. CMOS
- H10D84/859—Complementary IGFETs, e.g. CMOS comprising both N-type and P-type wells, e.g. twin-tub
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/112—Nitridation, direct, of silicon
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Element Separation (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
- Thyristors (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US07/869,423 US5256563A (en) | 1992-04-16 | 1992-04-16 | Doped well structure and method for semiconductor technologies |
Publications (1)
Publication Number | Publication Date |
---|---|
TW274146B true TW274146B (en, 2012) | 1996-04-11 |
Family
ID=25353533
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
TW082106942A TW274146B (en, 2012) | 1992-04-16 | 1993-08-27 |
Country Status (6)
Country | Link |
---|---|
US (1) | US5256563A (en, 2012) |
EP (1) | EP0565936B1 (en, 2012) |
JP (1) | JPH0645543A (en, 2012) |
KR (1) | KR940006261A (en, 2012) |
DE (1) | DE69331358T2 (en, 2012) |
TW (1) | TW274146B (en, 2012) |
Families Citing this family (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5420056A (en) * | 1994-01-14 | 1995-05-30 | Texas Instruments Incorporated | Junction contact process and structure for semiconductor technologies |
US5455204A (en) * | 1994-12-12 | 1995-10-03 | International Business Machines Corporation | Thin capacitor dielectric by rapid thermal processing |
US5643825A (en) * | 1994-12-29 | 1997-07-01 | Advanced Micro Devices, Inc. | Integrated circuit isolation process |
US5583062A (en) * | 1995-06-07 | 1996-12-10 | Lsi Logic Corporation | Self-aligned twin well process having a SiO2 -polysilicon-SiO2 barrier mask |
KR0179831B1 (ko) * | 1995-07-27 | 1999-03-20 | 문정환 | 반도체 소자의 웰 형성방법 |
US5891809A (en) * | 1995-09-29 | 1999-04-06 | Intel Corporation | Manufacturable dielectric formed using multiple oxidation and anneal steps |
US5679588A (en) * | 1995-10-05 | 1997-10-21 | Integrated Device Technology, Inc. | Method for fabricating P-wells and N-wells having optimized field and active regions |
US5776816A (en) * | 1996-10-28 | 1998-07-07 | Holtek Microelectronics, Inc. | Nitride double etching for twin well align |
US6110803A (en) * | 1998-12-10 | 2000-08-29 | United Microelectronics Corp. | Method for fabricating a high-bias device |
US8003455B2 (en) * | 2009-05-21 | 2011-08-23 | International Business Machines Corporation | Implantation using a hardmask |
Family Cites Families (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB2199694A (en) * | 1986-12-23 | 1988-07-13 | Philips Electronic Associated | A method of manufacturing a semiconductor device |
US4786609A (en) * | 1987-10-05 | 1988-11-22 | North American Philips Corporation, Signetics Division | Method of fabricating field-effect transistor utilizing improved gate sidewall spacers |
IT1223571B (it) * | 1987-12-21 | 1990-09-19 | Sgs Thomson Microelectronics | Procedimento per la fabbricazione di dispositivi integrati cmos con lunghezze di porta ridotte |
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1992
- 1992-04-16 US US07/869,423 patent/US5256563A/en not_active Expired - Lifetime
-
1993
- 1993-03-29 EP EP93105135A patent/EP0565936B1/en not_active Expired - Lifetime
- 1993-03-29 DE DE69331358T patent/DE69331358T2/de not_active Expired - Fee Related
- 1993-04-15 KR KR1019930006276A patent/KR940006261A/ko not_active Ceased
- 1993-04-15 JP JP5088838A patent/JPH0645543A/ja active Pending
- 1993-08-27 TW TW082106942A patent/TW274146B/zh not_active IP Right Cessation
Also Published As
Publication number | Publication date |
---|---|
EP0565936B1 (en) | 2001-12-19 |
KR940006261A (ko) | 1994-03-23 |
DE69331358T2 (de) | 2002-08-14 |
US5256563A (en) | 1993-10-26 |
EP0565936A1 (en) | 1993-10-20 |
JPH0645543A (ja) | 1994-02-18 |
DE69331358D1 (de) | 2002-01-31 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
MM4A | Annulment or lapse of patent due to non-payment of fees |