TW255967B - - Google Patents

Info

Publication number
TW255967B
TW255967B TW083112248A TW83112248A TW255967B TW 255967 B TW255967 B TW 255967B TW 083112248 A TW083112248 A TW 083112248A TW 83112248 A TW83112248 A TW 83112248A TW 255967 B TW255967 B TW 255967B
Authority
TW
Taiwan
Application number
TW083112248A
Original Assignee
Samsug Electronics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Samsug Electronics Co Ltd filed Critical Samsug Electronics Co Ltd
Application granted granted Critical
Publication of TW255967B publication Critical patent/TW255967B/zh

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0175—Coupling arrangements; Interface arrangements
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/003—Modifications for increasing the reliability for protection
    • H03K19/00369—Modifications for compensating variations of temperature, supply voltage or other physical parameters
    • H03K19/00376—Modifications for compensating variations of temperature, supply voltage or other physical parameters in bipolar transistor circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1078—Data input circuits, e.g. write amplifiers, data input buffers, data input registers, data input level conversion circuits

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Logic Circuits (AREA)
  • Static Random-Access Memory (AREA)
  • Dram (AREA)
TW083112248A 1993-12-31 1994-12-28 TW255967B (zh)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019930031786A KR960002334B1 (ko) 1993-12-31 1993-12-31 반도체 메모리 장치의 입력버퍼

Publications (1)

Publication Number Publication Date
TW255967B true TW255967B (zh) 1995-09-01

Family

ID=19374718

Family Applications (1)

Application Number Title Priority Date Filing Date
TW083112248A TW255967B (zh) 1993-12-31 1994-12-28

Country Status (4)

Country Link
US (1) US5561634A (zh)
JP (1) JP3821308B2 (zh)
KR (1) KR960002334B1 (zh)
TW (1) TW255967B (zh)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3565984B2 (ja) * 1996-05-14 2004-09-15 三菱電機株式会社 データ保持回路およびバッファ回路
JP2001118388A (ja) * 1999-10-18 2001-04-27 Nec Ic Microcomput Syst Ltd バッファ回路
US8213197B1 (en) * 2006-09-05 2012-07-03 Marvell International Ltd. Switching capacitor power supply

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5243237A (en) * 1992-01-22 1993-09-07 Samsung Semiconductor, Inc. Noninverting bi-cmos gates with propagation delays of a single bi-cmos inverter

Also Published As

Publication number Publication date
KR960002334B1 (ko) 1996-02-16
US5561634A (en) 1996-10-01
JP3821308B2 (ja) 2006-09-13
KR950022139A (ko) 1995-07-28
JPH07235183A (ja) 1995-09-05

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Legal Events

Date Code Title Description
MM4A Annulment or lapse of patent due to non-payment of fees