TW248612B - - Google Patents
Info
- Publication number
- TW248612B TW248612B TW083101872A TW83101872A TW248612B TW 248612 B TW248612 B TW 248612B TW 083101872 A TW083101872 A TW 083101872A TW 83101872 A TW83101872 A TW 83101872A TW 248612 B TW248612 B TW 248612B
- Authority
- TW
- Taiwan
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P74/00—Testing or measuring during manufacture or treatment of wafers, substrates or devices
- H10P74/27—Structural arrangements therefor
- H10P74/277—Circuits for electrically characterising or monitoring manufacturing processes, e.g. circuits in tested chips or circuits in testing wafers
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B12/00—Dynamic random access memory [DRAM] devices
- H10B12/01—Manufacture or treatment
- H10B12/02—Manufacture or treatment for one transistor one-capacitor [1T-1C] memory cells
- H10B12/03—Making the capacitor or connections thereto
- H10B12/038—Making the capacitor or connections thereto the capacitor being in a trench in the substrate
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B12/00—Dynamic random access memory [DRAM] devices
- H10B12/30—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
- H10B12/37—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells the capacitor being at least partially in a trench in the substrate
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P74/00—Testing or measuring during manufacture or treatment of wafers, substrates or devices
- H10P74/23—Testing or measuring during manufacture or treatment of wafers, substrates or devices characterised by multiple measurements, corrections, marking or sorting processes
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P74/00—Testing or measuring during manufacture or treatment of wafers, substrates or devices
- H10P74/20—Testing or measuring during manufacture or treatment of wafers, substrates or devices characterised by the properties tested or measured, e.g. structural or electrical properties
- H10P74/203—Structural properties, e.g. testing or measuring thicknesses, line widths, warpage, bond strengths or physical defects
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S438/00—Semiconductor device manufacturing: process
- Y10S438/982—Varying orientation of devices in array
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Testing Or Measuring Of Semiconductors Or The Like (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US4069593A | 1993-03-31 | 1993-03-31 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| TW248612B true TW248612B (enFirst) | 1995-06-01 |
Family
ID=21912412
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| TW083101872A TW248612B (enFirst) | 1993-03-31 | 1994-03-03 |
Country Status (5)
| Country | Link |
|---|---|
| US (1) | US5576223A (enFirst) |
| EP (1) | EP0618615A1 (enFirst) |
| JP (1) | JPH06326167A (enFirst) |
| KR (1) | KR100294063B1 (enFirst) |
| TW (1) | TW248612B (enFirst) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN119850601A (zh) * | 2025-03-18 | 2025-04-18 | 江西智成飞桨科技有限公司 | 光伏电池板ai瑕疵检测方法及设备 |
Families Citing this family (36)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH10229174A (ja) * | 1997-02-18 | 1998-08-25 | Mitsubishi Electric Corp | 半導体記憶装置の製造方法 |
| US6294397B1 (en) * | 1999-03-04 | 2001-09-25 | Advanced Micro Devices, Inc. | Drop-in test structure and abbreviated integrated circuit process flow for characterizing production integrated circuit process flow, topography, and equipment |
| US6268717B1 (en) | 1999-03-04 | 2001-07-31 | Advanced Micro Devices, Inc. | Semiconductor test structure with intentional partial defects and method of use |
| US6452412B1 (en) | 1999-03-04 | 2002-09-17 | Advanced Micro Devices, Inc. | Drop-in test structure and methodology for characterizing an integrated circuit process flow and topography |
| US6297644B1 (en) | 1999-03-04 | 2001-10-02 | Advanced Micro Devices, Inc. | Multipurpose defect test structure with switchable voltage contrast capability and method of use |
| US6258437B1 (en) | 1999-03-31 | 2001-07-10 | Advanced Micro Devices, Inc. | Test structure and methodology for characterizing etching in an integrated circuit fabrication process |
| US6429452B1 (en) | 1999-08-17 | 2002-08-06 | Advanced Micro Devices, Inc. | Test structure and methodology for characterizing ion implantation in an integrated circuit fabrication process |
| US6740555B1 (en) * | 1999-09-29 | 2004-05-25 | Infineon Technologies Ag | Semiconductor structures and manufacturing methods |
| US6434503B1 (en) | 1999-12-30 | 2002-08-13 | Infineon Technologies Richmond, Lp | Automated creation of specific test programs from complex test programs |
| DE10010821A1 (de) * | 2000-02-29 | 2001-09-13 | Infineon Technologies Ag | Verfahren zur Erhöhung der Kapazität in einem Speichergraben und Grabenkondensator mit erhöhter Kapazität |
| US6617180B1 (en) | 2001-04-16 | 2003-09-09 | Taiwan Semiconductor Manufacturing Company | Test structure for detecting bridging of DRAM capacitors |
| JP3875047B2 (ja) | 2001-06-22 | 2007-01-31 | シャープ株式会社 | 半導体基板の面方位依存性評価方法及びそれを用いた半導体装置 |
| US6576487B1 (en) | 2002-04-19 | 2003-06-10 | Advanced Micro Devices, Inc. | Method to distinguish an STI outer edge current component with an STI normal current component |
| TW556303B (en) * | 2002-10-25 | 2003-10-01 | Nanya Technology Corp | Test key of detecting whether the overlay of active area and memory cell structure of DRAM with vertical transistors is normal and test method of the same |
| US20060009011A1 (en) * | 2004-07-06 | 2006-01-12 | Gary Barrett | Method for recycling/reclaiming a monitor wafer |
| WO2006022946A1 (en) * | 2004-07-30 | 2006-03-02 | Advanced Micro Devices, Inc. | Technique for evaluating local electrical characteristics in semiconductor devices |
| DE102004036971B4 (de) * | 2004-07-30 | 2009-07-30 | Advanced Micro Devices, Inc., Sunnyvale | Technik zur Bewertung lokaler elektrischer Eigenschaften in Halbleiterbauelementen |
| US8061224B2 (en) * | 2008-05-06 | 2011-11-22 | Globalfoundries Singapore Pte. Ltd. | Method for performing a shelf lifetime acceleration test |
| DE102010026351B4 (de) * | 2010-07-07 | 2012-04-26 | Siltronic Ag | Verfahren und Vorrichtung zur Untersuchung einer Halbleiterscheibe |
| US8716037B2 (en) | 2010-12-14 | 2014-05-06 | International Business Machines Corporation | Measurement of CMOS device channel strain by X-ray diffraction |
| KR102046761B1 (ko) | 2013-01-14 | 2019-12-02 | 삼성전자 주식회사 | 비휘발성 메모리 장치 |
| US9805994B1 (en) | 2015-02-03 | 2017-10-31 | Pdf Solutions, Inc. | Mesh-style NCEM pads, and process for making semiconductor dies, chips, and wafers using in-line measurements from such pads |
| US10199283B1 (en) | 2015-02-03 | 2019-02-05 | Pdf Solutions, Inc. | Method for processing a semiconductor wager using non-contact electrical measurements indicative of a resistance through a stitch, where such measurements are obtained by scanning a pad comprised of at least three parallel conductive stripes using a moving stage with beam deflection to account for motion of the stage |
| US9799575B2 (en) | 2015-12-16 | 2017-10-24 | Pdf Solutions, Inc. | Integrated circuit containing DOEs of NCEM-enabled fill cells |
| US10593604B1 (en) | 2015-12-16 | 2020-03-17 | Pdf Solutions, Inc. | Process for making semiconductor dies, chips, and wafers using in-line measurements obtained from DOEs of NCEM-enabled fill cells |
| US10978438B1 (en) | 2015-12-16 | 2021-04-13 | Pdf Solutions, Inc. | IC with test structures and E-beam pads embedded within a contiguous standard cell area |
| US9929063B1 (en) | 2016-04-04 | 2018-03-27 | Pdf Solutions, Inc. | Process for making an integrated circuit that includes NCEM-Enabled, tip-to-side gap-configured fill cells, with NCEM pads formed from at least three conductive stripes positioned between adjacent gates |
| US9627370B1 (en) | 2016-04-04 | 2017-04-18 | Pdf Solutions, Inc. | Integrated circuit containing standard logic cells and library-compatible, NCEM-enabled fill cells, including at least via-open-configured, GATE-short-configured, GATECNT-short-configured, and TS-short-configured, NCEM-enabled fill cells |
| US9905553B1 (en) | 2016-04-04 | 2018-02-27 | Pdf Solutions, Inc. | Integrated circuit containing standard logic cells and library-compatible, NCEM-enabled fill cells, including at least via-open-configured, AACNT-short-configured, GATECNT-short-configured, and metal-short-configured, NCEM-enabled fill cells |
| US9748153B1 (en) | 2017-03-29 | 2017-08-29 | Pdf Solutions, Inc. | Process for making and using a semiconductor wafer containing first and second does of standard cell compatible, NCEM-enabled fill cells, with the first DOE including side-to-side short configured fill cells, and the second DOE including tip-to-side short configure |
| US9773774B1 (en) | 2017-03-30 | 2017-09-26 | Pdf Solutions, Inc. | Process for making and using a semiconductor wafer containing first and second DOEs of standard cell compatible, NCEM-enabled fill cells, with the first DOE including chamfer short configured fill cells, and the second DOE including corner short configured fill cells |
| US9786649B1 (en) | 2017-06-27 | 2017-10-10 | Pdf Solutions, Inc. | Process for making and using a semiconductor wafer containing first and second DOEs of standard cell compatible, NCEM-enabled fill cells, with the first DOE including via open configured fill cells, and the second DOE including stitch open configured fill cells |
| US9768083B1 (en) | 2017-06-27 | 2017-09-19 | Pdf Solutions, Inc. | Process for making and using a semiconductor wafer containing first and second DOEs of standard cell compatible, NCEM-enabled fill cells, with the first DOE including merged-via open configured fill cells, and the second DOE including snake open configured fill cells |
| US10096530B1 (en) | 2017-06-28 | 2018-10-09 | Pdf Solutions, Inc. | Process for making and using a semiconductor wafer containing first and second DOEs of standard cell compatible, NCEM-enabled fill cells, with the first DOE including merged-via open configured fill cells, and the second DOE including stitch open configured fill cells |
| US9865583B1 (en) | 2017-06-28 | 2018-01-09 | Pdf Solutions, Inc. | Process for making and using a semiconductor wafer containing first and second DOEs of standard cell compatible, NCEM-enabled fill cells, with the first DOE including snake open configured fill cells, and the second DOE including stitch open configured fill cells |
| CN113311309B (zh) * | 2021-07-30 | 2021-10-12 | 度亘激光技术（苏州）有限公司 | 半导体结构的覆盖层剥除方法及半导体结构失效分析方法 |
Family Cites Families (17)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3304594A (en) * | 1963-08-15 | 1967-02-21 | Motorola Inc | Method of making integrated circuit by controlled process |
| US3615466A (en) * | 1968-11-19 | 1971-10-26 | Ibm | Process of producing an array of integrated circuits on semiconductor substrate |
| US3751647A (en) * | 1971-09-22 | 1973-08-07 | Ibm | Semiconductor and integrated circuit device yield modeling |
| US3842491A (en) * | 1972-12-08 | 1974-10-22 | Ibm | Manufacture of assorted types of lsi devices on same wafer |
| DE2707612A1 (de) * | 1977-02-22 | 1978-08-24 | Siemens Ag | Verfahren zum herstellen von halbleitervorrichtungen |
| JPS54110787A (en) * | 1978-02-17 | 1979-08-30 | Nec Corp | Method and apparatus for semiconductor element |
| US4257825A (en) * | 1978-08-30 | 1981-03-24 | U.S. Philips Corporation | Method of manufacturing semiconductor devices having improvements in device reliability by thermally treating selectively implanted test figures in wafers |
| JPS55120164A (en) * | 1979-03-12 | 1980-09-16 | Fujitsu Ltd | Semiconductor device |
| FR2473789A1 (fr) * | 1980-01-09 | 1981-07-17 | Ibm France | Procedes et structures de test pour circuits integres a semi-conducteurs permettant la determination electrique de certaines tolerances lors des etapes photolithographiques. |
| US4386459A (en) * | 1980-07-11 | 1983-06-07 | Bell Telephone Laboratories, Incorporated | Electrical measurement of level-to-level misalignment in integrated circuits |
| JPS57121244A (en) * | 1981-01-21 | 1982-07-28 | Hitachi Ltd | Evaluating method for wafer |
| US4672314A (en) * | 1985-04-12 | 1987-06-09 | Rca Corporation | Comprehensive semiconductor test structure |
| DE3530578A1 (de) * | 1985-08-27 | 1987-03-05 | Siemens Ag | Struktur zur qualitaetspruefung einer substratscheibe aus halbleitermaterial |
| US4835466A (en) * | 1987-02-06 | 1989-05-30 | Fairchild Semiconductor Corporation | Apparatus and method for detecting spot defects in integrated circuits |
| JPH01161845A (ja) * | 1987-12-18 | 1989-06-26 | Hitachi Ltd | 半導体ウェハー試験方法 |
| US4855253A (en) * | 1988-01-29 | 1989-08-08 | Hewlett-Packard | Test method for random defects in electronic microstructures |
| JPH0444244A (ja) * | 1990-06-07 | 1992-02-14 | Mitsubishi Materials Corp | ウエーハの結晶欠陥検査装置 |
-
1994
- 1994-03-03 TW TW083101872A patent/TW248612B/zh active
- 1994-03-28 EP EP94104890A patent/EP0618615A1/en not_active Withdrawn
- 1994-03-30 KR KR1019940006495A patent/KR100294063B1/ko not_active Expired - Fee Related
- 1994-03-30 JP JP6085475A patent/JPH06326167A/ja active Pending
- 1994-10-03 US US08/317,148 patent/US5576223A/en not_active Expired - Fee Related
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN119850601A (zh) * | 2025-03-18 | 2025-04-18 | 江西智成飞桨科技有限公司 | 光伏电池板ai瑕疵检测方法及设备 |
Also Published As
| Publication number | Publication date |
|---|---|
| KR100294063B1 (ko) | 2001-10-24 |
| US5576223A (en) | 1996-11-19 |
| EP0618615A1 (en) | 1994-10-05 |
| JPH06326167A (ja) | 1994-11-25 |
| KR940022775A (ko) | 1994-10-21 |