TW247370B - - Google Patents

Info

Publication number
TW247370B
TW247370B TW082109364A TW82109364A TW247370B TW 247370 B TW247370 B TW 247370B TW 082109364 A TW082109364 A TW 082109364A TW 82109364 A TW82109364 A TW 82109364A TW 247370 B TW247370 B TW 247370B
Authority
TW
Taiwan
Application number
TW082109364A
Other languages
Chinese (zh)
Original Assignee
At & T Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by At & T Corp filed Critical At & T Corp
Application granted granted Critical
Publication of TW247370B publication Critical patent/TW247370B/zh

Links

Classifications

    • H10D64/011
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76802Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Drying Of Semiconductors (AREA)
  • Formation Of Insulating Films (AREA)
  • Physical Vapour Deposition (AREA)
  • ing And Chemical Polishing (AREA)
  • Electrodes Of Semiconductors (AREA)
TW082109364A 1992-11-12 1993-11-06 TW247370B (en:Method)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US07/975,235 US5268332A (en) 1992-11-12 1992-11-12 Method of integrated circuit fabrication having planarized dielectrics

Publications (1)

Publication Number Publication Date
TW247370B true TW247370B (en:Method) 1995-05-11

Family

ID=25522812

Family Applications (1)

Application Number Title Priority Date Filing Date
TW082109364A TW247370B (en:Method) 1992-11-12 1993-11-06

Country Status (5)

Country Link
US (1) US5268332A (en:Method)
EP (1) EP0597634A3 (en:Method)
JP (1) JPH06224188A (en:Method)
KR (1) KR100276146B1 (en:Method)
TW (1) TW247370B (en:Method)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2926864B2 (ja) * 1990-04-12 1999-07-28 ソニー株式会社 銅系金属膜のエッチング方法
US6297110B1 (en) * 1994-07-29 2001-10-02 Stmicroelectronics, Inc. Method of forming a contact in an integrated circuit
EP0833671A2 (en) 1995-06-07 1998-04-08 Noven Pharmaceuticals, Inc. Transdermal compositions containing low molecular weight drugs which are liquid at room temperatures
CN102157437B (zh) * 2010-02-11 2013-12-25 中国科学院微电子研究所 半导体结构的形成方法

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4708770A (en) * 1986-06-19 1987-11-24 Lsi Logic Corporation Planarized process for forming vias in silicon wafers
DE3686721D1 (de) * 1986-10-08 1992-10-15 Ibm Verfahren zur herstellung einer kontaktoeffnung mit gewuenschter schraege in einer zusammengesetzten schicht, die mit photoresist maskiert ist.
US5022958A (en) * 1990-06-27 1991-06-11 At&T Bell Laboratories Method of etching for integrated circuits with planarized dielectric

Also Published As

Publication number Publication date
KR940012505A (ko) 1994-06-23
KR100276146B1 (ko) 2001-01-15
JPH06224188A (ja) 1994-08-12
EP0597634A3 (en) 1994-08-24
EP0597634A2 (en) 1994-05-18
US5268332A (en) 1993-12-07

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Legal Events

Date Code Title Description
MK4A Expiration of patent term of an invention patent