TW240300B - Apparatus and method for integrating bus master ownership of local bus load by plural data transceivers - Google Patents

Apparatus and method for integrating bus master ownership of local bus load by plural data transceivers

Info

Publication number
TW240300B
TW240300B TW083100672A TW83100672A TW240300B TW 240300 B TW240300 B TW 240300B TW 083100672 A TW083100672 A TW 083100672A TW 83100672 A TW83100672 A TW 83100672A TW 240300 B TW240300 B TW 240300B
Authority
TW
Taiwan
Prior art keywords
local bus
bus interface
scsi
ethernet
communications channel
Prior art date
Application number
TW083100672A
Other languages
English (en)
Inventor
Chih-Siung Wu
Chun-Jen Kuo
Original Assignee
Advanced Micro Devices Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Advanced Micro Devices Inc filed Critical Advanced Micro Devices Inc
Application granted granted Critical
Publication of TW240300B publication Critical patent/TW240300B/zh

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14Handling requests for interconnection or transfer
    • G06F13/36Handling requests for interconnection or transfer for access to common bus or bus system
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/10Program control for peripheral devices
    • G06F13/12Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor
    • G06F13/124Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor where hardware is a sequential transfer control unit, e.g. microprocessor, peripheral processor or state-machine
    • G06F13/128Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor where hardware is a sequential transfer control unit, e.g. microprocessor, peripheral processor or state-machine for dedicated transfers to a network
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38Information transfer, e.g. on bus
    • G06F13/40Bus structure
    • G06F13/4004Coupling between buses
    • G06F13/4022Coupling between buses using switching circuits, e.g. switching matrix, connection or expansion network

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Mathematical Physics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Bus Control (AREA)
  • Small-Scale Networks (AREA)
  • Semiconductor Integrated Circuits (AREA)
TW083100672A 1994-01-21 1994-01-24 Apparatus and method for integrating bus master ownership of local bus load by plural data transceivers TW240300B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US08/184,295 US5611053A (en) 1994-01-21 1994-01-21 Apparatus and method for integrating bus master ownership of local bus load by plural data transceivers

Publications (1)

Publication Number Publication Date
TW240300B true TW240300B (en) 1995-02-11

Family

ID=22676341

Family Applications (1)

Application Number Title Priority Date Filing Date
TW083100672A TW240300B (en) 1994-01-21 1994-01-24 Apparatus and method for integrating bus master ownership of local bus load by plural data transceivers

Country Status (6)

Country Link
US (2) US5611053A (zh)
EP (1) EP0664514B1 (zh)
JP (1) JPH07262131A (zh)
KR (1) KR950033873A (zh)
DE (1) DE69432401T2 (zh)
TW (1) TW240300B (zh)

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Also Published As

Publication number Publication date
US5682483A (en) 1997-10-28
EP0664514B1 (en) 2003-04-02
KR950033873A (ko) 1995-12-26
DE69432401T2 (de) 2004-03-04
DE69432401D1 (de) 2003-05-08
US5611053A (en) 1997-03-11
EP0664514A1 (en) 1995-07-26
JPH07262131A (ja) 1995-10-13

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