TW216829B - Manufacturing method for complementary bipolar CMOS - Google Patents

Abstract

A manufacturing method for complementary bipolar CMOS to manufacture a PMOS, a NMOS, a lateral NPN bipolar, a lateral PNP bipolar and a vertical NPN bipolar transistors on a substrate, consists of the following steps: - Seperates the active regions of the NMOS and PMOS transistors and forms P-well and N-well on the substrate. - Forms the NMOS and PMOS transistors on the P-well and N-well respectively. - Forms the NPN and PNP bipolar transistor on the N-well. - Implants conductivity modifier to the N-well of the NPN bipolar transistor to form the base of the lateral NPN bipolar transistor. - Forms the N-base of the lateral PNP bipolar transistor. - Grows the gate oxidation. - Forms an opening on the gate oxidation for the base contact and burying contact. - Deposits polysilicon. - Implants conductivity modifier to the polysilicon to form N+ polysilicon and P+ polysilicon. - Forms un-doped oxidation. - Forms side wall spacer. - Implants conductivity modifier to form the source/drain of the NMOS transistor, the collector of the lateral NPN bipolar transistor, the emitter of the vertical NPN bipolar transistor and the N-well contact. - Implants conductivity modifier to form the source/drain of the PMOS transistor, the collector of the lateral PNP bipolar transistor, the emitter of the vertical PNP bipolar transistor and the P-well contact.