TW202425125A - 具有隔離結構之半導體裝置的形成方法 - Google Patents

具有隔離結構之半導體裝置的形成方法 Download PDF

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Publication number
TW202425125A
TW202425125A TW112132011A TW112132011A TW202425125A TW 202425125 A TW202425125 A TW 202425125A TW 112132011 A TW112132011 A TW 112132011A TW 112132011 A TW112132011 A TW 112132011A TW 202425125 A TW202425125 A TW 202425125A
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TW
Taiwan
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layer
methods
semiconductor devices
isolation structures
forming semiconductor
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TW112132011A
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English (en)
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金昊珍
明梅 王
蔡洙杜
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日商東京威力科創股份有限公司
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Publication of TW202425125A publication Critical patent/TW202425125A/zh

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Abstract

揭露了一種半導體裝置的形成方法。方法包括形成第一層在基板上。方法包括形成第二層在第一層上。基板以及第二層具有第一半導體材料且第一層具有第二半導體材料,以及第一半導體材料以及第二半導體材料之間存在蝕刻選擇性。方法包括進行第一蝕刻處理,以去除第二層的一部分,直至曝露出第一層,其中第一層被配置為第一蝕刻處理的蝕刻停止層。
TW112132011A 2022-08-29 2023-08-25 具有隔離結構之半導體裝置的形成方法 TW202425125A (zh)

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US17/898,104 2022-08-29

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TW202425125A true TW202425125A (zh) 2024-06-16

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