TW202411470A - Method and apparatus for a novel high-performance conductive metal-based material using combustion chemical vapor deposition and electroplating processes - Google Patents

Abstract

Presented herein is a copper and silicon dioxide layer-based conductive material. The material of the present invention comprises copper infused with imperfect layers of silicon dioxide. An imperfect layer is one that does not fully separate one copper layer from another but allows for the copper layers to directly connect to each other through the silicon dioxide layers. The copper layers encapsulate and reach through nanoscale pores within the silicon dioxide layers to bond with each other. This material can be built with connectors to enable easy integration into legacy systems. This material has novel electrical behaviors, having an increased impedance when compared to copper and a new unique skin effect depth that is directionally dependent. The unique directionally dependent skin depth makes the new material exceptionally suitable for high-frequency applications. The material is created by deposition, and the deposition process allows the material to be fast and low-cost to produce—enabling practicality for manufacturing at scale.

Description

Method and apparatus for novel high performance conductive metal-based materials using combustion chemical vapor deposition and electroplating processes

The technical field of the present invention is generally and particularly related to conductors.

The resistance of a conductor such as a copper conductor increases with frequency due to the well-known phenomenon of "skin effect". The skin effect is caused by the current "I" flowing in the conductor. The current generates a magnetic field "H", which in turn generates an eddy current " _Iw ", which flows inside the copper conductor in the opposite direction to the primary current "I", increasing the resistance inside the copper conductor. According to Lenz's law, the increase in the resistance inside the conductor effectively forces the current to flow to the outside of the conductor.

When the frequency of "I" is zero, the eddy current " _Iw " generated is zero because there is no change in the magnetic field "H" and the entire cross-section of the conductor carries the current. As the frequency of "I" increases, the eddy current increases, eventually forcing almost all of the current "I" to flow to the surface of the conductor, leaving a dead zone in the center of the conductor with almost no current, and the current density increases as it approaches the surface. The industry standardizes the skin effect performance of metals with a term called "Skin Depth", which refers to the extent of the remaining active zone defined by the distance from the surface to the point in the interior where the current density drops by 1/e or ~37%.

At 60 Hz, the skin depth of copper conductors is ~8.4 mm; at 60 kHz, the skin depth of copper conductors is ~266 microns; and at 6 MHz, the skin depth of copper conductors is about 26.6 microns. Therefore, to reduce impedance at higher frequencies: increasing the surface area of the conductor is more effective than continuing to increase the thickness of the conductor to exceed the skin depth.

Some typical methods can help reduce the skinning effect. These methods include using wide and thin conductors to increase the surface area without increasing the overall volume of the conductor, for example, widening the traces of a printed circuit board. Other methods of reducing high frequency impedance include using stranded Litz wire and silver plating on aluminum or copper wire or traces, which can be used in combination or separately. Litz wire increases the surface area of the wire compared to solid core wire, and adding low resistance metal to the surface of the wire reduces resistance and increases skinning depth.

Some applications also use multiple layer structures. For example, by placing wide and thin lines in parallel, separated by an insulator but connected at the start and end of the lines, these structures can significantly reduce the impedance by increasing the total surface area, where the total impedance is calculated according to Ohm's law as the parallel combination of the layers, assuming that the thickness of the insulator is sufficient to minimize the electrical interaction between the layers.

Multi-layer conductor

Multi-layer conductors made from epoxy or plastic use low-cost materials, but their manufacturing costs are still high. The cost of manufacturing conductors in this way comes from the increase in the number of manufacturing steps, which generally include: electroless copper preparation, electroless copper plating, electrode repositioning, cleaning, dry film patterning, electroplating, cleaning, dry film removal, etching, cleaning, insulator placement, a total of 11 steps in this process, and then repeating this 11-step process until the required number of layers is reached. In addition, this layer stacking method often has problems with excessive thickness and delamination, which will further increase the process steps or limit the materials that can be used as the insulating layer.

Integrated multi-layer conductors fabricated on silicon surfaces are expensive or unavailable because silicon wafers themselves are expensive and do not support or are not capable of depositing copper thicker than skin deposits.

A desirable embodiment provides a novel copper-based composite conductive material that can handle high frequency currents and has a greater collection depth than bulk copper of the same conductor cross-section, thereby having a lower impedance for a given track or line length. In practice, the conductive material provides a higher quality factor (Q) because the frequency-dependent impedance is significantly reduced compared to bulk copper of the same conductor cross-section. For example, the width of the novel copper-based composite line can be significantly reduced compared to a bulk copper line with similar frequency-dependent impedance.

The conductive material of the present invention comprises copper with a unique formation infused with an incomplete sponge-like silicon dioxide (SiO ₂ ) layer. The ultra-thin SiO ₂ layer of 10 to 250 nanometers significantly improves the impedance of the conductive material of the present invention in the direction perpendicular to the current flow compared to bulk copper, but the impedance change in the current flow direction is very small. Since eddy currents are perpendicular to the main current, the SiO ₂ layer suppresses the eddy currents, thereby significantly improving its performance compared to bulk copper of the same total thickness. The number of layers, thickness and coverage of the incomplete SiO ₂ layer and the total thickness of the new conductive material can be changed so that the conductor can be specifically designed according to the performance and cost of the application.

The new composite material is produced by alternating layers of electroplated copper and spongy SiO2. _{The SiO2 layers} are deposited onto each copper layer by a combustion chemical vapor deposition (CCVD) process. In the CCVD process, _SiO2 molecules are accelerated toward the copper by gravity and the force of the burning pressurized gas, randomly clump together in the flame, and then fall onto the surface of the conductor like snowflakes. In an ideal implementation, the coverage should not be so small that the eddy current limiting effect is almost eliminated, nor so large that it prevents the electroplating of the next layer of copper.

In an ideal implementation, a spongy _SiO2 layer is formed, covering more than 90% of the conductor surface. The thickness and coverage of the porous _SiO2 can be varied by the speed of the CCVD flame passing through the new composite material, the feed rate of the silicon precursor into the flame, the temperature of the composite material during deposition, the distance from the flame, and the _local environmental influences.

In the present invention, the spongy layer of _SiO2 molecules provides a means to use the previous bottom layer of copper as the electroplating electrode for the next copper electroplating layer. Compared to the traditional stacking method, although the last layer of copper as the electrode is covered on a portion of the insulator, the ability to reuse the last layer of copper as the electrode can fundamentally reduce the number of process steps and the associated labor and material costs, such as dry film. This is due to the fact that the incomplete _SiO2 layer does not completely separate the copper below physically and electrically, but allows the next electroplated copper layer to deposit upward through the _SiO2 pores or gaps or defects in the spongy _SiO2 layer. Once the new copper layer is deposited by the SiO ₂ sponge, it will continue to grow to an additional desired thickness, usually 0.1 micron to 1 micron thicker than the previous SiO ₂ layer. Repeating this layer stacking process as many times as required can obtain a new composite material, which is the basis of the ideal implementation method of the present invention.

Determine the impedance and penetration depth of new materials

_SiO2 is a very good insulator, so the parallel combination of the impedance of copper in the pores to _SiO2 measured perpendicularly is actually the impedance of copper in the pores. Therefore, at 95% coverage, this increases the impedance of the thin layer by about 20 times or 1/(1-95%) compared to the case without _SiO2 .

Therefore, for a conductive material with 95% coverage of the copper layer by the _SiO2 layer, the total increase in vertical resistance in the material is the ratio of [[thickness of the copper ( _Tc ) times 1.68 µohm.cm] + [thickness of the _SiO2 implanted with copper ( _TCiSO ) times 1.68 µohm.cm x 20 (for 95% area coverage)]] / [thickness of the copper ( _Tc ) + thickness of the _SiO2 implanted with copper ( _TCiSO )], as described below.

The method of electroplating through a porous insulator does not require a seed layer formed by electroless copper, electroless copper preparation, or a new dry film or dry film removal step.

When the conductive materials are only CCVD SiO ₂ and copper

After the initial copper layer is deposited in a conventional manner, all subsequent layers are deposited using new CCVD _SiO2 and electroplating through the insulator, which is essentially a 3-step process. The stacking process consists of simply electrodepositing copper, cleaning with a rinse, performing _SiO2 CCVD, and repeating. Electroplating copper on the new _SiO2 layer consists of placing the _SiO2 layer and the copper layer below it directly back into the copper electrodeposition bath to be plated with the new copper layer. After the _SiO2 CCVD, there is no need to deposit an additional electroless seed layer or electroplate a pig-tail sacrificial layer to form an electrode for the next layer. There is no need to remove the existing dry film patterning the previous copper layer, as it is compatible with the process using _SiO2 CCVD overcoating dozens of times. Because there is no need to remove the dry film patterning of the previous layer, no new dry film patterning step is required. With the elimination of these process steps, intermediate process steps are also eliminated, such as cleaning, etching or grinding conductors, insulators or dry films.

When the conductive material is CCVD SiO ₂ , copper and nickel phosphorus

After the initial copper layer is deposited in the conventional manner, all subsequent layers use the new CCVD _SiO2 and electroplating through the insulator method, which is basically a 3-step process. However, a 4-step method can also be used to obtain more high-frequency conductor performance. The basic concept of the present invention is the same, but instead of using very low-impedance copper as the electroplated metal through the insulator, nickel phosphorus "NiP" is used, where the phosphorus content is greater than 6%, ideally between 10 and 13%, which gives a material resistance of ~110μohm.cm. Since the CCVD _SiO2 covers 95% of the previous layer, the impedance of the insulating layer deposited after the NiP is ~2200 μohm.cm. This higher layer of insulation impedance greatly reduces the eddy currents. At a total composite thickness of 16 microns, and a single copper layer thickness of ~0.6 microns, the resistance remains relatively stable to about 9 GHz.

A pure bulk copper material of similar size has a relatively stable resistance to about 200 MHz. A composite material of similar size but with copper in the insulator has a relatively stable resistance to about 800 MHz. After NiP deposition, the process returns to the CCVD copper process described previously. The conductive material is generally only CCVD X, Y and Z.

There are various insulating materials that can be deposited using CCVD methods, which also produce a porous layer that can be plated through the insulator. These materials include _TiO2 , _SiO2 , _WOx , _MoOx , ZnO, _ZrO2 , _SnO2 , and _Al2O3 . However, _SiO2 is _an ideal implementation because of its excellent safety, low environmental pollution, low cost, and very high electrical resistance. These other oxides are included because they are good enough to be competitive compared to bulk copper in some cases.

There are various through-insulator metals that can be electrodeposited with higher resistance than copper that will result in new composite conductors with better resistance at high frequencies, some of which include nickel and nickel alloys, iron and iron alloys, copper-iron alloys, and some molecular forms of carbon that have low resistance.

Depending on the application, there are a variety of different conductive metals that can be used to replace copper, including but not limited to: silver, aluminum, gold, and various copper alloys.

The stacking process includes electro-depositing copper, cleaning with a rinse, performing _SiO2 CCVD, and repeating. Electro-plating copper on the new _SiO2 layer includes placing the _SiO2 layer and the copper layer below it directly back into the copper electrodeposition bath to plate the new copper layer. After the _SiO2 CCVD, there is no need to deposit an additional electroless seed layer or electro-plating a pig-tail sacrificial layer to form an electrode for the next layer. There is no need to remove the existing dry film that patterned the previous copper layer because it is compatible with the process of over-coating dozens of times using _SiO2 CCVD. Because there is no need to remove the dry film patterning of the previous layer, there is no need for a new dry film patterning step. Along with the elimination of these process steps, intermediate process steps are also eliminated, such as cleaning, etching or polishing conductors, insulators or dry films.

Circular CCVD Metal Composite Process

All CCVD metal composite processes can also be used to build multi-layer structures using the following method. The process begins with dry film patterning etching, or electroless copper deposition followed by dry film patterning etching to produce a seed pattern on which multiple layers of conductors are grown. The dry film photoresist is removed, and CCVD and metal layer stacking begins according to the various methods discussed. However, there are no edge boundaries in the layer stacking process, resulting in a pearl-like layer stacking structure. This rounded structure has some electrical benefits at high frequencies, for example, the sharp corners will cause impedance mismatch at high frequencies.

Initial patterning can be used to shape the desired conductive material. Multiple pigtails or studs, or both, can be used. Pigtails can be removed by sawing and etching processes.

Integrating conductive materials as wires into microelectronic systems

The layered conductive material of the present invention is designed to conduct current in one direction, but resists the current flowing toward the insulating layer. Such layering helps to reduce the negative effects of eddy currents in high-frequency applications. Such layered materials can be used as conductors, and current can flow longitudinally along the conductors, with the longitudinal insulating layer forming a channel for its flow.

Such wires, in many applications, including but not limited to semiconductor systems, may have to be connected to components above and below them, or in some other direction perpendicular to the intended current flow. As shown in Figure 1, ordinary connections above or below such wires can direct the current to flow against the stack of wires by making connections to the top or bottom of the wire. This significantly limits the intended benefit of using stacked materials because it directs the current in such a way that it must initially flow in the direction of high resistance in order to travel along the wire.

Therefore, there are implementations of CCVD and metal plating processes that provide connectors for connecting stacked conductive materials to a system in a manner that optimizes the benefits of the stacked conductive materials. This is achieved by providing a connector that receives current entering from one direction and allows it to be bent to best fit the directionality of the stacked material. An ideal implementation of the connector of the present invention is a unitary conductive block (in an ideal implementation, a copper block) that connects the stacked material to other components of the system and integrates the stacked material into the system. The connector is located at the connection point of the stacked material and can extend above the stacked material. The connection point of the stacked material, in the case of a wire, is the end of the wire. So, if it is wire, the connector is located at the opposite end of the wire. The connector provides a safe spacing for the vertical connection point.

When the connector is at the end of a wire, the current can flow vertically into the connector and then change direction to match the best path along the wire. This is because the connector is non-stacked, so it can accept current connections that are perpendicular to the expected flow direction of the wire and allow it to bend through the space of the connector to adapt to the directionality of the wire. The connector can also allow current to flow out of the wire and change direction to enter other components perpendicular to the wire path.

In an ideal implementation, the connector is a bulk conductive material, such as copper, and therefore has no directional resistance to the current. The wires are located vertically between the connectors, and the connector covers the cross-sectional area of the wires, so the current needs to pass through a non-insulating barrier to flow along the horizontal path of the stacked materials.

Electrodeposition techniques can be used to create connectors at the longitudinal ends of the wires. These deposition techniques can easily create connectors in the same plating process as the stacked wires.

In an ideal implementation, the connectors are first plated as copper pillars, and then a layer of conductive material is plated between the copper pillars. Once the build-up film is added, the polishing process can expose, flatten and shorten the copper connector as needed.

In an ideal implementation, the stacked material is first plated into a wire. A new dry film and electroplating process is then used to place copper pillars at the ends of the wires. Once the build-up film is added, a grinding process can flatten, expose, and shorten the copper pillars as needed.

A third preferred embodiment includes coating the laminated material as a conductor on the PCB. After coating the laminated material, a through hole is drilled at each end of the conductor that penetrates the laminated material and the PCB below. The through hole is then coated with a conductive material. Multiple layers of conductors can be coated on the PCB before drilling the holes.

Applications

By creating new copper-based composite materials to address the losses of the skin effect, the size and shape of the conductor can be significantly reduced for the same performance, or the high frequency performance of the material will be significantly better than bulk copper when measured as impedance or Q at higher frequencies (200 MHz to 30 GHz). The conductive materials of this invention can be adapted to a variety of sizes and shapes to keep pace with the industry's move toward smaller and thinner components and products, while enabling these components and products to handle higher frequencies than they were originally capable of handling.

The preferred embodiment of the present invention is a copper and silicon based conductive material. As shown in FIG2, the material is produced using deposition methods, wherein copper is deposited electrochemically and silicon dioxide ( _SiO2 ) is deposited by a combustion chemical vapor deposition (CCVD) process. As shown in FIG3, these deposition methods are used to produce a layered material, wherein copper and silicon are layered on top of each other. Thus, in essence, the copper has internalized an incomplete layer of silicon dioxide. An incomplete layer is a layer that does not completely separate one copper layer from another copper layer, but allows the copper layers to directly connect to each other through the silicon dioxide layer. In the present invention, the connection ability of the first copper layer to the second copper layer is due to the random distribution of silicon dioxide molecules. In view of the random distribution of _SiO2 and the method of coating _SiO2 , not all surfaces of the copper layers are covered by _SiO2 , so there are some points between _SiO2 that allow one copper layer to directly bond to another copper layer by encapsulating the _SiO2 layer in copper. Compared to copper, this material has novel electrical properties because its impedance in the plane perpendicular to the current flow is increased, and the impedance in the DC current flow direction is only slightly increased compared to bulk copper. However, at high frequencies, the high vertical resistance significantly reduces the formation of eddy currents, which in turn increases the conductor's skin depth, allowing more of the conductor to carry the current, which is measured as a significant reduction in overall impedance. High frequency and low impedance make this new material particularly suitable for use in high frequency applications, where low impedance is a key performance indicator.

Due to the interaction of the conductive layers, the material does not have a new perfect insulator separating the layers as is typical for multi-layer materials; instead, the material exhibits unique characteristics, such as a new concentration depth. The deposition process enables fast and low-cost production of the conductive material, enabling scalable manufacturing even in cost-sensitive applications.

As described above, in an ideal embodiment of the present invention, there is a layered conductive material. The conductive material can be formed into a wire. The layered wire is a wire made by a hybrid electroplating and combustion chemical vapor deposition (CCVD) method. In this hybrid method, copper or another conductive material is plated by electroplating. Then an incomplete silicon dioxide layer is deposited by CCVD. This silicon dioxide layer does not completely cover the copper layer and has a very rough surface. Both of these silicon dioxide layer conditions are produced by the CCVD method, which produces a silicon dioxide layer with the product of a combustion reaction of a silicon dioxide precursor in air, which occurs in the area that receives the silicon dioxide layer. After burning, the newly formed silicon dioxide falls like snowflakes onto the layer below. Another copper layer can be electroplated directly onto the silicon dioxide layer, because the previous copper layer serves as an electrode for plating when the silicon dioxide layer does not completely cover the previous copper layer. The production of copper and silicon dioxide layers can be repeated until the required number of layers is reached.

This plating method can be referred to as a hybrid method for forming a conductive material, which can be used to produce a conductor with a significantly increased resistance in the longitudinal direction perpendicular to the layer, and a conductive element including a conductive line. (The reason for the increased resistance is that when the current flows perpendicular to the longitudinal direction of the silicon dioxide layer, it must pass through the silicon dioxide layer).

Since the layers in the hybrid process separate the conductive material vertically, to optimize the expected benefit, the current should also flow vertically through the wires.

Especially in the microelectronics industry, many components may be stacked vertically in a system. This often occurs in system-in-package, system-on-package or system-on-chip systems or in lead frames, or in general. Therefore, the conductive material of the present invention must be able to be connected to the component perpendicular to the direction of its expected current flow. For example, this need arises when the conductive material forms a horizontally placed wire. As shown in Figure 1, if the component above the wire is simply connected to the top of the stacked wire, the current will have to pass through the insulating silicon dioxide layer to be transmitted along the long side of the wire.

In Figure 1, the CCVD copper wire 100 must be connected to the layer 110 above it. The copper wire has an insulating layer 101 of _SiO2 particles extending perpendicular to the layer stack. Therefore, the current path, such as path 102, which uses the copper wire 100, must pass through the insulating layer 101. This reduces the benefit of the copper wire 100.

Therefore, by providing a connector 200 at the end of a wire 100 that is a block of conductive material that is itself a non-directional insulating layer, a component placed above the wire can be connected vertically to the connector rather than the wire. Because the connector does not have an insulating layer, current 102 can enter from one direction and leave the connector at an angle that deviates from its entry direction without passing through the insulating layer 101. This makes the connector 200 suitable for obtaining current and allowing the current to re-adjust its direction to pass through the wire in an optimal manner. The connector can also obtain current from the wire and allow the current to adjust its direction to enter the next component in the system in an optimal manner. Figure 4 shows an example of a current path through a first connector, a wire, and a last connector.

In order to integrate such a connector with the wires in a cost-effective manner, it can be manufactured as part of the wire manufacturing process, even if the process is a hybrid CCVD process. As shown in Figure 5, in an ideal method for producing the connector and conductive material of the present invention, the wires are first produced, and then two connectors are created at the ends of the wires. The first step of this method is to produce a wire with a horizontal layer. This is achieved by performing a dry film process on an electroless copper seed layer, wherein the dry film is patterned to provide the shape of the wire. An initial copper layer is electroplated onto the seed layer between the dry films. An incomplete silicon dioxide layer is then deposited by a CCVD process, and a copper layer is electroplated on the silicon dioxide layer using the previous copper layer as an electrode. The electroplated copper and silicon dioxide CCVD process can be repeated until the desired number of layers is reached. The dry film is then removed and a new dry film is applied and patterned so that copper pillars can be plated at the ends of the wires. These copper pillars will act as connectors. As shown in Figure 5, the new dry film will leave a negligible portion of the end of the upper surface of the wire uncovered. The copper pillars will be electroplated and rise above the wire. Therefore, the copper pillars completely cover the ends of the wires so that no matter which layer of the wire the current may flow along, it will not need to pass through any insulating layer. The copper pillars will not be completely flat initially due to the portion that is plated on the wire. However, once the copper pillars are plated, a black build-up film is added to cover the copper pillars, and a polishing step is performed to flatten and expose the copper pillars so that they can be electrically connected to other components of the system.

Figure 6 shows an alternative method of forming stacked wires and connectors, in which the connectors are plated first. The initial dry film patterning is therefore directed to two copper pillars which will serve as the ends of the stacked wires. The pillars are plated onto the dry film pattern and then the dry film is removed. New dry film is added and patterned to fit the positions of the copper pillars and wires to be produced. The dry film leaves some space between it and the copper pillars, as the copper pillars will receive the copper deposited when the wires are deposited. The space between the dry film and the copper pillars is shown in the top view of step 5 in Figure 6. Although the copper shown in Figure 6 has different colors, depending on the time it was plated during the plating process, it is all copper and therefore, in its final form, is equivalent to the implementation method shown in Figure 4.

After the dry film is patterned, an initial copper layer is electroplated. This new copper layer will be plated on the exposed surfaces of the copper pillars and the copper seed layer, expanding the thickness and height of the copper pillars, and also forming the first layer of the stacked wires. In order to show the location of the newly plated copper, the plated copper shown in Figure 6 is different in color from the copper pillars and the electroless copper seed layer. After the initial copper layer, an incomplete silicon dioxide layer is plated by the CCVD process. The silicon dioxide will fall onto the wires and form an insulating layer for the wires. However, the silicon dioxide will also fall onto the copper pillars. Because the silicon dioxide comes directly from above, in the case of copper pillars, most of it will fall to the top of the copper pillars, with only a negligible amount falling to the sides. (However, airflow between the copper pillars caused by the heat of the CCVD process and other environmental factors may cause some silicon dioxide to snowflake at the base of the copper pillars with each silicon dioxide layer.) The electroplated copper and silicon dioxide CCVD layers are repeated until the desired number of stacked conductors is reached.

On the copper pillar, after repeated copper and silicon dioxide deposition steps, there will be a copper and silicon dioxide layer for each copper and silicon dioxide layer, thus forming a conductor. The excess on the copper pillar will be removed by a grinding process, which includes removing the current dry film, adding a black growth layer, and then grinding everything away until the layer on the copper pillar is removed and the ideal height of the copper pillar is reached. Despite this, in most cases, the copper pillar will still be much taller than the stacked conductors.

In an alternative embodiment of the invention, as shown in FIG. 7 , stacked conductors are plated onto a PCB and plated through holes that serve as connectors. Here, a hybrid plating and CCVD method is used to make the conductors to make the conductors on the PCB. The ends of the conductors and the portion of the PCB where these ends are located are drilled through. These through holes are then plated with copper. The copper that is plated through serves as a connector because it starts from above the conductors and passes through the cross-section of the conductors. Using a PCB, conductors can be plated in multiple areas of the PCB to produce more than one conductor.

The method of plating copper wires together with connectors can be used to plate multiple copper wires and connectors at one time. Figures 8a and 8b show an ideal implementation method, which is a method for plating multiple wires and connectors at the same time, where the wires are plated first. This is achieved by plating multiple conductive materials on the seed layer of a single silicon wafer. Specific electroplating methods can be used, such as pigtail electroplating.

The drawings and graphics show multiple implementations and are intended to describe specific implementations, but do not limit the scope, number or pattern of implementations of the invention.

All figures are prototypes and rough diagrams: further refinement of the final product may be made by one of ordinary skill in the art. Nothing should be construed as critical or essential unless expressly described. In addition, the articles "a" and "an" may be understood as "one or more." If only one item is intended, the term "one" or other similar terms are used. In addition, the terms "has," "have," "having," etc. are intended to be open-ended terms. When a range is included, any number within the original range may be used as a subsequent range, which exists as a concept and is intended to be disclosed. When a term defined in the specification differs from the content incorporated by reference, the specification shall prevail with respect to the present invention; when a range is disclosed in the specification, all such ranges covered by the given range may be included. Connectors and silicon dioxide formations, including their defects, are not drawn to scale in the figure, but they are enlarged so that they can be seen. Although the request item is removed to comply with regulations, it does not reflect the purpose but the strategy. After encountering some limitations, such as time or focus, these limitations may be excluded, so the request item may also be re-added.

Further explanation

Some applications of the conductive material of the present invention include the following examples. However, the present invention is not limited to the following and can be used anywhere copper is used, and is particularly suitable for replacing copper conductors produced by electroplating processes.

Application: [Example]

Several implementation methods

1. [Ideal implementation] A conductive material comprising: 1. A copper block having an internalized silicon dioxide formation spanning the interior of the copper block from a first edge to a second edge opposite to the first edge, forming at least one porous silicon dioxide layer; and wherein, 2. The silicon dioxide layer does not completely divide the copper block, and its thickness is greater than 10 nanometers and less than 250 nanometers.

2. [Uniform spacing implementation] The conductive material as described in implementation 1 further includes at least one or more layers, which span from a first edge to a second edge opposite to the first edge, wherein the silicon dioxide layer does not completely divide the copper block, and its thickness is less than 200 nanometers, and these silicon dioxide layers are separated from each other by copper and are uniformly spaced.

3. [Some layers are thicker than other layers] The conductive material as described in embodiment 1 further includes at least one more silicon dioxide layer, which spans from a first edge to a second edge opposite to the first edge, wherein the silicon dioxide formation has a high edge roughness, does not completely divide the copper block, and has a thickness of more than 250 nanometers, and wherein these silicon dioxide formations are separated from each other.

4. [Incorporation into a Passive Component] The conductive material as described in Embodiment 1 further includes the conductive material formed by a deposition process to be used as the conductive material of a passive component.

5. [Incorporation into an Inductor] The conductive material as described in Embodiment 1 further includes the conductive material formed by a deposition process for use when the passive element is an inductor.

6. [Incorporation into a Passive Element] The conductive material as described in Embodiment 1, wherein the conductive material is used as the conductive material of an active element.

7. [Incorporation into purpose] The conductive material as described in embodiment 1, wherein the conductive material is incorporated into an electronic component by replacing the conductor production process with a deposition-based method of the conductive material, the purpose of which is to produce a conductor for use as a conductive component that can achieve or improve the performance of high-frequency applications, or to reduce the size of such components that are suitable for processing high-frequency applications, or any combination of such improvements.

8. [Ideal Implementation] A deposition-based method for producing conductive materials, comprising: 1. Performing an initial layer and dry film patterning process; 2. Electrodepositing a copper layer; 3. Performing combustion chemical vapor deposition of a silicon dioxide layer on the copper layer by oxygen-based combustion of a silicon precursor; 4. Accelerating the oxygen-based combustion product of the silicon precursor to the edge of the copper layer; and 5. A copper layer is electrodeposited onto the silicon dioxide layer to form a copper block, which internalizes a set of silicon dioxide formations spanning the interior of the copper block from a first edge to a second edge opposite the first edge, wherein the layer formed by the silicon dioxide formation has high edge roughness, does not completely divide the copper block, and has a thickness of less than 250 nanometers.

9. [Implementation method for producing multiple layers] The method as described in implementation method 8 further includes: repeating the following steps at least once: performing combustion chemical vapor deposition of a silicon dioxide layer on the copper layer by oxygen-based combustion of a silicon precursor; accelerating the product to a second edge of the copper layer; and electro-depositing the copper layer onto the silicon dioxide layer to form a copper block that internalizes a group of silicon dioxide formations spanning the interior of the copper block from a first edge to a second edge opposite to the first edge, wherein the silicon dioxide layer formed by the silicon dioxide formations has high edge roughness, does not completely divide the copper block, and has a thickness of less than 250 nanometers.

10. [Uniform Spacing Implementation] The method of implementation 9, wherein the combustion chemical vapor deposition of a silicon dioxide layer on the copper layer is repeated at least once by oxygen-based combustion of a silicon precursor, accelerating the product to a second edge of the copper layer, and electro-depositing the copper layer onto the silicon dioxide layer to form a copper block that is internalized from a first edge to a second edge opposite to the first edge. A second edge of the copper block spans a set of silicon dioxide formations within the copper block, wherein the silicon dioxide formation forms a silicon dioxide layer with high edge roughness, does not completely divide the copper block, and has a thickness of less than 250 nanometers, resulting in a conductive material with the silicon dioxide formations, which are separated from each other by copper and are uniformly spaced apart.

11. [Implementation of superstructure] The method as described in Implementation 9, wherein at least one of the following is performed: combustion chemical vapor deposition of a silicon dioxide layer on the copper layer by oxygen-based combustion of a silicon precursor, accelerating the product to produce the silicon dioxide layer with high edge roughness on the clean edge of the copper layer, incompletely dividing the copper block, and a thickness that is at least 5 nanometers greater than the thickness of other silicon dioxide layers, and wherein all silicon dioxide layers are separated by copper.

12. [Incorporation into Passive Element] The method as described in Embodiment 9 further comprises incorporating the conductive material into the passive element by using the conductive material as the conductive element of the inductor.

13. [Combined with an inductor] The method as described in embodiment 12, wherein the passive element is an inductor or a transformer.

14. [Incorporation into an active element] The method as described in Implementation Method 9 further comprises incorporating the conductive material into an active element to serve as a conductor in the active element.

15. [Incorporation into Purpose Implementation] The method of producing a conductive material as described in Implementation 9 further comprises incorporating the conductive material into an electronic component by replacing the conductor production process with the deposition-based method of the conductive material, the purpose of which is to produce a conductor for use as a conductive component that can achieve or improve the performance of high-frequency applications, or reduce the size of such components that are suitable for processing high-frequency applications, or any combination of such improvements.

100: copper conductor 101: insulation layer 102: current/path 110: layer

[FIG. 1] A perspective view of a resistive current path when a connection is made directly on a wire. [FIG. 2] A flow chart of the manufacturing steps of an ideal implementation of a conductive material. [FIG. 3] A perspective view of a _SiO2 layer of the present invention coated with copper and having nanoscale vias filled with copper. [FIG. 4] A perspective view of an unresisted current path that occurs when a connector is placed at each end of a wire. [FIG. 5] A step-by-step view of constructing a connector to connect to a wire by first hybrid CCVD-plating the wire and then copper-plating the connector at the end of the wire. [Figure 6] A step-by-step view of constructing a connector connected to a wire by first electroplating a pair of copper connectors, then hybrid CCVD-plating a layer of conductive material between the two copper connectors as the wire. [Figure 7] shows the steps of constructing a connector connected to a wire by hybrid CCVD-plating the stacked wires onto the PCB, drilling through the stacked material and the PCB, and then copper-plating through holes to serve as connectors at the ends of the wires. [Figure 8] shows the steps of constructing a connector connected to a wire by first hybrid CCVD-plating the stacked wires, then copper-plating the connectors at the ends of the wires, wherein multiple wires and connectors are plated simultaneously. Because Figure 15 has multiple pages, the first page is called 8a and the second page is called 8b.

100: Copper metal wire

101: Insulation layer

102: Current/Path

Claims (10)

A conductive material with a connector, comprising: a. A copper block having an internalized silicon dioxide formation spanning the interior of the copper block from a first edge to a second edge opposite to the first edge, forming at least one porous silicon dioxide layer, which gives the copper block directional resistance; b. A first conductive block connector is operatively connected to a first side of the copper block so that current can enter from one direction and flow into the copper block in an optimal direction to reduce resistance along the direction of the current path; and c. The second conductive block connector is operatively connected to the second side of the copper block opposite to the first conductive block connector so that the current can enter from the optimal direction to reduce the resistance along the current path and be led out in another direction. The conductive material as described in claim 1 further comprises at least one or more silicon dioxide layers, which span the interior of the copper block from a first edge to a second edge opposite to the first edge to form a porous silicon dioxide layer; wherein the silicon dioxide layer does not completely divide the copper block, and its thickness is greater than 10 nanometers and less than 250 nanometers, and each of the silicon dioxide layers is separated from each other by the copper portion in the copper block and is uniformly spaced apart. The conductive material as described in claim 1 further includes at least one more silicon dioxide layer, which spans the interior of the copper block from a first edge to a second edge opposite to the first edge to form a porous silicon dioxide layer; wherein the silicon dioxide layer does not completely divide the copper block, and its thickness is at least 10 nanometers greater than the thickness of other silicon dioxide layers, and the silicon dioxide formations are separated from each other by the copper portion within the copper block. The conductive material as described in claim 1 further includes the conductive material formed by a deposition process to be used as the conductive material of a passive element. The conductive material as described in claim 1, wherein the passive element is a conductor. The conductive material as described in claim 1, wherein the conductive material is used as the conductive material of an active element. The conductive material as described in claim 1, wherein the conductive material is incorporated into an electronic component by replacing the conductor production process with a deposition-based method of the conductive material, with the purpose of producing a conductor with a connector for use as a conductive component that can achieve or improve the performance of the high-frequency application, or reduce the size of such components suitable for processing high-frequency applications, or any combination of such improvements. A method for producing a stacked wire having a connector at each longitudinal end of the wire, comprising: a. performing a dry film patterning process on an electroless copper seed layer to pattern the dry film into a wire; b. electroplating a copper layer on the electroless copper seed layer according to the pattern produced by the dry film patterning process; c. coating a silicon dioxide layer on the copper and the dry film by burning a silicon dioxide precursor in a combustion chemical vapor deposition (CCVD) process so that the silicon dioxide precursor falls onto the dry film and the copper layer; d. Electroplating a copper layer on the silicon dioxide layer using the previous copper layer as an electrode to allow electroplating; e. Repeating the silicon dioxide layer and the copper layer until the required number of layers is reached; f. Removing the dry film and replacing it with a new dry film pattern so that a column can be plated at each longitudinal end of the wire; g. Electroplating a copper column at each of the patterned locations at the longitudinal ends of the wire; h. Removing the new dry film and depositing a black build-up film; and i. Grinding away the black build-up film and each of the copper columns so that the copper column is flat and has a top surface exposed in a manner that allows electrical connection. A method for producing a stacked wire having a connector at each longitudinal end of the wire, comprising: a. performing a dry film patterning process on an electroless copper seed layer to pattern the dry film into two copper pillars, the spacing between the two copper pillars being equal to the distance of the copper wire to be produced in the specific application of the method; b. electroplating the copper pillars on the electroless copper seed layer according to the pattern produced by the dry film patterning process; c. removing the dry film pattern and replacing it with a dry film pattern of a new pillar, so that a wire can be plated between each of the copper pillars, while providing space for the copper pillars to expand; d. electroplating a copper layer on the electroless copper seed layer according to the pattern produced by the replacement dry film patterning; e. The silicon dioxide layer is plated on the copper layer, the copper pillars and the dry film by burning a silicon dioxide precursor in a combustion chemical vapor deposition (CCVD) process so that the silicon dioxide precursor falls on the replacement dry film, the copper pillars and the copper layer; f. Repeating the silicon dioxide layer and electroplating the copper layer until the desired number of layers is reached; g. Removing the dry film and depositing a black build-up film; and h. Grinding away the black build-up film and each of the copper pillars so that the copper pillars no longer contain silicon dioxide and have a top surface exposed in a manner that allows electrical connection. A method for producing a stacked wire having a connector at each longitudinal end of the wire, comprising: a. performing a dry film patterning process on an electroless copper seed layer deposited on a printed circuit board (PCB) to pattern the dry film into a wire; b. electroplating the copper layer on the electroless copper seed layer according to the pattern produced by the dry film patterning process; c. burning a silicon dioxide precursor in a combustion chemical vapor deposition (CCVD) process so that the silicon dioxide precursor falls onto the dry film and the copper layer, thereby plating the silicon dioxide layer onto the copper and the dry film; d. Electroplating a copper layer on the silicon dioxide layer using the previous copper layer as an electrode to allow electroplating; e. Repeating the electroplating of the silicon dioxide layer and the electroplating of the copper layer until the required number of layers is reached; f. Removing the dry film; g. Drilling through the wire and the underlying printed circuit board at a first longitudinal end of the wire and a second longitudinal end of the wire opposite to the first longitudinal end, leaving a portion of the wire at each end, the portion of the wire being disconnected from the main portion of the wire by the drill hole to form two through holes; and h. Plating the two through holes with copper so that the copper covers the surface area of the through hole, including the wire portion.