TW202410199A - 藉由新式化學品及表面改質的矽相對矽鍺合金及介電質之選擇性且等向性蝕刻 - Google Patents

藉由新式化學品及表面改質的矽相對矽鍺合金及介電質之選擇性且等向性蝕刻 Download PDF

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TW202410199A
TW202410199A TW112116546A TW112116546A TW202410199A TW 202410199 A TW202410199 A TW 202410199A TW 112116546 A TW112116546 A TW 112116546A TW 112116546 A TW112116546 A TW 112116546A TW 202410199 A TW202410199 A TW 202410199A
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Taiwan
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plasma
layer
containing layer
substrate
fluorine
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TW112116546A
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English (en)
Chinese (zh)
Inventor
馬修 弗勞
強納森 奧蘭
蘇巴迪普 卡爾
欒平山
哈馬德 哈吉巴巴伊埃納加發巴帝
蔡宇浩
艾倫 莫斯登
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日商東京威力科創股份有限公司
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Publication of TW202410199A publication Critical patent/TW202410199A/zh

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00—Etching of wafers, substrates or parts of devices
    • H10P50/20—Dry etching; Plasma etching; Reactive-ion etching
    • H10P50/24—Dry etching; Plasma etching; Reactive-ion etching of semiconductor materials
    • H10P50/242—Dry etching; Plasma etching; Reactive-ion etching of semiconductor materials of Group IV materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/40—FETs having zero-dimensional [0D], one-dimensional [1D] or two-dimensional [2D] charge carrier gas channels
    • H10D30/43—FETs having zero-dimensional [0D], one-dimensional [1D] or two-dimensional [2D] charge carrier gas channels having one-dimensional [1D] charge carrier gas channels, e.g. quantum wire FETs or transistors having 1D quantum-confined channels
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/32—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by intermediate layers between substrates and deposited layers
    • H10P14/3242—Structure
    • H10P14/3244—Layer structure
    • H10P14/3251—Layer structure consisting of three or more layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/34—Deposited materials, e.g. layers
    • H10P14/3402—Deposited materials, e.g. layers characterised by the chemical composition
    • H10P14/3404—Deposited materials, e.g. layers characterised by the chemical composition being Group IVA materials
    • H10P14/3411—Silicon, silicon germanium or germanium
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/38—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by treatments done after the formation of the materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/63—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the formation processes
    • H10P14/6302—Non-deposition formation processes
    • H10P14/6316—Formation by nitridation, e.g. nitridation of the substrate
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/63—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the formation processes
    • H10P14/6302—Non-deposition formation processes
    • H10P14/6319—Formation by plasma treatments, e.g. plasma oxidation of the substrate
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00—Etching of wafers, substrates or parts of devices
    • H10P50/69—Etching of wafers, substrates or parts of devices using masks for semiconductor materials
    • H10P50/691—Etching of wafers, substrates or parts of devices using masks for semiconductor materials for Group V materials or Group III-V materials
    • H10P50/692—Etching of wafers, substrates or parts of devices using masks for semiconductor materials for Group V materials or Group III-V materials characterised by their composition, e.g. multilayer masks or materials
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B82—NANOTECHNOLOGY
    • B82Y—SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
    • B82Y10/00—Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/014—Manufacture or treatment of FETs having zero-dimensional [0D] or one-dimensional [1D] channels, e.g. quantum wire FETs, single-electron transistors [SET] or Coulomb blockade transistors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/67—Thin-film transistors [TFT]
    • H10D30/6729—Thin-film transistors [TFT] characterised by the electrodes
    • H10D30/673—Thin-film transistors [TFT] characterised by the electrodes characterised by the shapes, relative sizes or dispositions of the gate electrodes
    • H10D30/6735—Thin-film transistors [TFT] characterised by the electrodes characterised by the shapes, relative sizes or dispositions of the gate electrodes having gates fully surrounding the channels, e.g. gate-all-around
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/117—Shapes of semiconductor bodies
    • H10D62/118—Nanostructure semiconductor bodies
    • H10D62/119—Nanowire, nanosheet or nanotube semiconductor bodies
    • H10D62/121—Nanowire, nanosheet or nanotube semiconductor bodies oriented parallel to substrates
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/20—Electrodes characterised by their shapes, relative sizes or dispositions 
    • H10D64/23—Electrodes carrying the current to be rectified, amplified, oscillated or switched, e.g. sources, drains, anodes or cathodes
    • H10D64/251—Source or drain electrodes for field-effect devices
    • H10D64/258—Source or drain electrodes for field-effect devices characterised by the relative positions of the source or drain electrodes with respect to the gate electrode
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P70/00—Cleaning of wafers, substrates or parts of devices
    • H10P70/20—Cleaning during device manufacture

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  • Drying Of Semiconductors (AREA)
  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Plasma & Fusion (AREA)
  • Bipolar Transistors (AREA)
  • Weting (AREA)
TW112116546A 2022-05-09 2023-05-04 藉由新式化學品及表面改質的矽相對矽鍺合金及介電質之選擇性且等向性蝕刻 TW202410199A (zh)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
US202263339895P 2022-05-09 2022-05-09
US63/339,895 2022-05-09
US17/964,601 US12272558B2 (en) 2022-05-09 2022-10-12 Selective and isotropic etch of silicon over silicon-germanium alloys and dielectrics; via new chemistry and surface modification
US17/964,601 2022-10-12

Publications (1)

Publication Number Publication Date
TW202410199A true TW202410199A (zh) 2024-03-01

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TW112116546A TW202410199A (zh) 2022-05-09 2023-05-04 藉由新式化學品及表面改質的矽相對矽鍺合金及介電質之選擇性且等向性蝕刻

Country Status (5)

Country Link
US (1) US12272558B2 (https=)
JP (1) JP2025517645A (https=)
KR (1) KR20250008508A (https=)
TW (1) TW202410199A (https=)
WO (1) WO2023219716A1 (https=)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2025128543A1 (en) * 2023-12-15 2025-06-19 Lam Research Corporation Tunable selective lateral etch of silicon using radical species
WO2025250472A1 (en) * 2024-05-27 2025-12-04 Lam Research Corporation Passivation for selective etching semiconductor materials

Family Cites Families (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7501349B2 (en) * 2006-03-31 2009-03-10 Tokyo Electron Limited Sequential oxide removal using fluorine and hydrogen
US9117653B2 (en) * 2012-10-24 2015-08-25 The Regents Of The University Of California Method for in-situ dry cleaning, passivation and functionalization of Ge semiconductor surfaces
JP6138653B2 (ja) 2013-10-08 2017-05-31 株式会社日立ハイテクノロジーズ ドライエッチング方法
KR20180014207A (ko) 2015-06-26 2018-02-07 도쿄엘렉트론가부시키가이샤 기상 식각 시스템 및 방법
KR102577628B1 (ko) * 2016-01-05 2023-09-13 어플라이드 머티어리얼스, 인코포레이티드 반도체 응용들을 위한 수평 게이트 올 어라운드 디바이스들을 위한 나노와이어들을 제조하기 위한 방법
KR102323389B1 (ko) 2016-03-02 2021-11-05 도쿄엘렉트론가부시키가이샤 튜닝가능한 선택도를 갖는 등방성 실리콘 및 실리콘-게르마늄 에칭
US10923356B2 (en) * 2018-07-20 2021-02-16 Tokyo Electron Limited Gas phase etch with controllable etch selectivity of silicon-germanium alloys
JP7113711B2 (ja) 2018-09-25 2022-08-05 東京エレクトロン株式会社 エッチング方法、エッチング装置、および記憶媒体
CN112789710B (zh) 2018-10-03 2025-03-04 朗姆研究公司 纳米线的选择性蚀刻
WO2020172208A1 (en) * 2019-02-20 2020-08-27 Tokyo Electron Limited Method for selective etching at an interface between materials
US11424120B2 (en) * 2021-01-22 2022-08-23 Tokyo Electron Limited Plasma etching techniques
US11482423B2 (en) * 2021-01-28 2022-10-25 Tokyo Electron Limited Plasma etching techniques
US11538690B2 (en) * 2021-02-09 2022-12-27 Tokyo Electron Limited Plasma etching techniques
US12002683B2 (en) * 2022-04-05 2024-06-04 Tokyo Electron Limited Lateral etching of silicon
US12261053B2 (en) * 2022-08-10 2025-03-25 Tokyo Electron Limited Substrate processing with selective etching
US12261054B2 (en) * 2022-08-11 2025-03-25 Tokyo Electron Limited Substrate processing with material modification and removal
US12512327B2 (en) * 2022-09-15 2025-12-30 Tokyo Electron Limited Surface modification to achieve selective isotropic etch

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Publication number Publication date
JP2025517645A (ja) 2025-06-10
KR20250008508A (ko) 2025-01-14
US12272558B2 (en) 2025-04-08
WO2023219716A1 (en) 2023-11-16
US20230360921A1 (en) 2023-11-09

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