TW202405529A - Display panel - Google Patents

Abstract

This invention discloses a display panel which includes a sub-pixel, a first metal layer, a second metal layer, a transparent conductive layer and a third metal layer. The sub-pixel includes a switching element. The first metal layer includes a scan line electrically connected with the switch element. The second metal layer is disposed on the first metal layer and includes a pixel electrode and a data line, the pixel electrode and the data line are electrically connected with the switching element, and a portion of the data line includes a blackened layer. The transparent conductive layer includes a transparent electrode disposed on the pixel electrode and electrically connected with the pixel electrode. The third metal layer includes a reflective electrode disposed on the transparent electrode and electrically connected with the transparent electrode.

Description

display panel

The present invention relates to a display panel, in particular to a reflective display panel.

In reflective display panels, there are gaps between adjacent sub-pixels, and light reflected by metal electrodes may leak through these gaps, resulting in poor contrast. Therefore, how to reduce light leakage of reflective display panels has become one of the important research issues to improve display quality.

The technical problem to be solved by the present invention is how to reduce the light leakage of the display panel to improve the display quality.

In order to solve the above technical problems, the present invention provides a display panel, which includes a display area and a non-display area, and the non-display area is arranged on at least one side of the display area. The display panel includes a first substrate, a first sub-pixel, a first metal layer, a second metal layer, a transparent conductive layer and a third metal layer. The first sub-pixel is disposed on the first substrate and in the display area, and the first sub-pixel includes a first switching element. The first metal layer is disposed on the first substrate. The first metal layer includes a plurality of first signal lines disposed in the display area. The first signal line includes a first scan line electrically connected to the first switching element, and the first scan line Extend along a first direction. A second metal layer is disposed on the first metal layer, and the second metal layer includes a first pixel electrode of the first sub-pixel and a plurality of second signal lines. The first pixel electrode is electrically connected to the first switching element. The second signal line is arranged in the display area. The second signal line includes a data line that is electrically connected to the first switching element. The data line extends along a second direction. The first direction and the second direction are different, and a part of the data line includes A blackened layer. The transparent conductive layer is disposed on the second metal layer, the second metal layer is disposed between the transparent conductive layer and the first metal layer, the transparent conductive layer includes a first transparent electrode of the first sub-pixel, and the first transparent electrode is disposed on The first pixel electrode is electrically connected to the first pixel electrode. The third metal layer is disposed on the transparent conductive layer. The transparent conductive layer is disposed between the third metal layer and the second metal layer. The third metal layer includes a first reflective electrode of the first sub-pixel, and the first reflective electrode is disposed The first transparent electrode is electrically connected to the first transparent electrode.

In the display panel of the present invention, part or all of the metal layer located under the gap includes a blackened layer, which can reduce reflected light and reduce light leakage, thereby improving contrast.

In order to enable those skilled in the art to further understand the present invention, preferred embodiments of the present invention are enumerated below, and the composition and intended effects of the present invention are described in detail with reference to the accompanying drawings. It should be noted that the accompanying drawings are simplified schematic diagrams. Therefore, only the components and combination relationships related to the present invention are shown to provide a clearer description of the basic structure or implementation method of the present invention. The actual components and layout may be more detailed. For complexity. In addition, for convenience of explanation, the components shown in the drawings of the present invention are not drawn in proportion to the actual number, shape, and size of the components, and the detailed proportions can be adjusted according to design requirements.

A direction X (or can be called a first direction), a direction Y (or can be called a second direction), and a direction Z (or can be called a vertical projection direction) are marked in the following figures. The direction Z may be perpendicular to an upper surface 100s of a substrate 100 (as shown in FIG. 3), and the directions X and Y may be parallel to the upper surface 100s of the substrate 100. Direction Z can be perpendicular to direction X and direction Y, and direction X can be perpendicular to direction Y. The following diagram can describe the spatial relationship of the structure in terms of direction X, direction Y, and direction Z.

Please refer to FIGS. 1 to 4 . FIG. 1 is a schematic top view of the display panel according to the first embodiment of the present invention. FIG. 2 is a schematic top view of the pixel structure of the display panel according to the first embodiment of the present invention. FIG. 3 is a schematic top view of the display panel according to the first embodiment of the present invention. 4 is a schematic cross-sectional view of the blackened layer of the first embodiment of the present invention. The structure of Figure 3 may correspond to the cross-section lines A-A', B-B' and C-C' in Figure 2. The display panel in this embodiment may be a reflective liquid crystal panel, but the invention is not limited thereto.

As shown in FIG. 1 , the display panel 10 includes a display area AA and a non-display area PA. The non-display area PA is provided on at least one side of the display area AA, as shown in Figure 1. The non-display area PA can surround the display area AA, but is not limited to this. In addition, the display panel 10 includes a plurality of sub-pixels SP disposed in the display area AA. As shown in FIG. 1 and FIG. 2 , the display panel 10 includes a sub-pixel SP1 (or can be called a first sub-pixel) and a sub-pixel SP2 (or can be called a second sub-pixel), and the sub-pixel SP1 and the sub-pixel SP2 are in the direction of Adjacent settings on X. Each sub-pixel SP includes at least one switching element. As shown in FIG. 2 , the sub-pixel SP1 includes a switching element SW1 (or may be called a first switching element), and the sub-pixel SP2 includes a switching element SW2 (or may be called a second switching element).

The switching element may include a thin film transistor, and the thin film transistor may be, for example, a bottom-gate thin film transistor, but is not limited thereto. In other embodiments, the thin film transistor may also be a top-gate thin film transistor. top-gate thin film transistor. In addition, the thin film transistor may be a low temperature poly-silicon (LTPS) thin film transistor, an indium gallium zinc oxide (IGZO) thin film transistor or an amorphous silicon (a-Si) thin film transistor. Crystals, but not limited to this.

As shown in FIG. 3 , the display panel 10 includes a substrate 100 (or can be called a first substrate), a substrate 200 (or can be called a second substrate) and a liquid crystal layer 300 . The substrate 200 is arranged relative to the substrate 100 in the direction Z, and The liquid crystal layer 300 is provided between the substrate 100 and the substrate 200 . In addition, sub-pixels SP1 and SP2 and switching elements SW1 and SW2 are provided on the substrate 100 .

The substrates 100 and 200 may include hard substrates such as glass substrates, plastic substrates, quartz substrates or sapphire substrates, but are not limited thereto. The substrates 100 and 200 may also include flexible substrates such as polyimide (PI) substrates or polyethylene terephthalate (PET) substrates, but are not limited thereto. The liquid crystal layer 300 may include any suitable type of liquid crystal, but is not limited thereto.

As shown in FIG. 3 , the display panel 10 includes a metal layer 102 (or can be called a first metal layer), an insulating layer 104 , a metal layer 108 (or can be called a second metal layer), an insulating layer 110 , and an insulating layer 108 . layer 112, a transparent conductive layer 114 and a metal layer 116 (which may be called a third metal layer), but is not limited thereto.

The metal layer 102 is disposed on the substrate 100, and the metal layer 102 includes a gate G of each switching element (such as the switching element SW1). The metal layer 102 includes a plurality of first signal lines disposed in the display area AA. As shown in FIG. (called the second scan line) and a common signal line CL, but it is not limited to this. The scanning line GL1, the scanning line GL2 and the common signal line CL extend along the direction X, the scanning line GL1 and the scanning line GL2 are arranged along the direction Y, and the common signal line CL is arranged between the scanning line GL1 and the scanning line GL2 in the direction Y. space, that is, a common signal line can be disposed between two adjacent scan lines in the direction Y, but is not limited to this.

The scanning line GL1 is electrically connected to the gate G of the switching element SW1, and the scanning line GL2 is electrically connected to the gate G of the switching element SW2. In addition, the metal layer 102 includes a common electrode CE1 (or may be called a first common electrode) of the sub-pixel SP1 and a common electrode CE2 (or may be called a second common electrode) of the sub-pixel SP2. The common electrode CE1 and the common electrode CE2 They are arranged along the direction X, and the common signal line CL is electrically connected to the common electrode CE1 and the common electrode CE2.

As shown in Figure 3, each switching element (such as switching element SW1) includes a semiconductor layer CH, the semiconductor layer CH and the metal layer 108 are disposed on the metal layer 102, and the insulating layer 104 is disposed between the semiconductor layer CH and the metal layer 102 and is disposed Between metal layer 108 and metal layer 102 . The semiconductor layer CH includes polycrystalline silicon, amorphous silicon or metal oxide, but is not limited thereto.

The metal layer 108 includes a plurality of second signal lines disposed in the display area AA, as shown in FIG. 2 . The second signal lines may include at least a data line DL1, a data line DL2 and a data line DL3, but are not limited thereto. The data lines DL1, DL2 and DL3 extend along the direction Y and are arranged along the direction X, and the data line DL1 is disposed between the data lines DL2 and DL3 in the direction X. The data line DL1 is electrically connected to a source S of the switching element SW1 and is electrically connected to the source S of the switching element SW2.

The metal layer 108 includes a pixel electrode of each sub-pixel. As shown in FIG. 2 , the metal layer 108 includes a pixel electrode PE1 of the sub-pixel SP1 (or may be called a first pixel electrode) and a pixel electrode PE2 of the sub-pixel SP2 (or may be called a first pixel electrode). called the second pixel electrode). The pixel electrode PE1 is electrically connected to a drain electrode D of the switching element SW1, the pixel electrode PE2 is electrically connected to a drain electrode D of the switching element SW2, and the metal layer 108 includes the source electrode S and the drain electrode D of each sub-pixel.

As shown in FIG. 2 , in the direction Z, the common electrode CE1 is provided between the pixel electrode PE1 and the substrate 100 , and the common electrode CE2 is provided between the pixel electrode PE2 and the substrate 100 . In the direction Y, the pixel electrode PE1, the common electrode CE1, the pixel electrode PE2 and the common electrode CE2 are arranged between the scanning line GL1 and the scanning line GL2, and the pixel electrode PE1 and the common electrode CE1 are arranged above the switching element SW1 and the scanning line GL1. , and the pixel electrode PE2 and the common electrode CE2 are provided below the switching element SW2 and the scanning line GL2.

As shown in FIG. 3 , the insulating layer 110 is disposed on the metal layer 108 and the semiconductor layer CH, and the insulating layer 112 , the transparent conductive layer 114 and the metal layer 116 are sequentially disposed on the insulating layer 110 , but it is not limited thereto. The thickness of the insulating layer 112 may be greater than the thickness of the insulating layer 110 , but is not limited thereto. The insulating layer 104, the insulating layer 110 and the insulating layer 112 may include inorganic or organic insulating materials, but are not limited thereto.

The insulating layer 110 includes a plurality of contact holes V1, and each contact hole V1 may expose a portion of the upper surface of a pixel electrode. As shown in FIG. 3 , the contact hole V1 passes through the insulating layer 110 and exposes a portion of the upper surface of the pixel electrode PE1 . The insulating layer 112 includes a plurality of contact holes V2, and each contact hole V2 can expose a contact hole V1. As shown in FIG. 3 , the contact hole V2 passes through the insulating layer 112 and exposes the contact hole V1 and a portion of the upper surface of the insulating layer 110 .

The transparent conductive layer 114 is disposed on the metal layer 108 , and the metal layer 108 is disposed between the transparent conductive layer 114 and the metal layer 102 . The transparent conductive layer 114 includes a transparent electrode of each sub-pixel. As shown in FIG. 2 , the transparent conductive layer 114 includes a transparent electrode TE1 of the sub-pixel SP1 (or may be called a first transparent electrode) and a transparent electrode TE2 of the sub-pixel SP2 (or Can be called the second transparent electrode).

The transparent electrode TE1 is disposed on the pixel electrode PE1 and is electrically connected to the pixel electrode PE1, and the transparent electrode TE2 is disposed on the pixel electrode PE2 and is electrically connected to the pixel electrode PE2. As shown in Figure 3, the transparent electrode TE1 can extend into the contact hole V2 and the contact hole V1 and can contact the pixel electrode PE1. Similarly, the transparent electrode TE2 in FIG. 2 can also extend into the corresponding contact hole V2 and the contact hole V1 and contact the pixel electrode PE2. The transparent conductive layer 114 may include indium tin oxide (ITO), indium zinc oxide (IZO) or aluminum zinc oxide (AZO), but is not limited thereto.

The metal layer 116 is disposed on the transparent conductive layer 114 , and the transparent conductive layer 114 is disposed between the metal layer 116 and the metal layer 108 . The metal layer 116 includes a reflective electrode of each sub-pixel. As shown in FIG. 2 , the metal layer 116 includes a reflective electrode RE1 (or can be called a first reflective electrode) of the sub-pixel SP1 and a reflective electrode RE2 (or can be called a first reflective electrode) of the sub-pixel SP2. is the second reflective electrode).

As shown in Figure 3, the reflective electrode RE1 is disposed on the transparent electrode TE1 and is electrically connected to the transparent electrode TE1. The reflective electrode RE1 can be in contact with the transparent electrode TE1, and the reflective electrode RE1 can also extend into the contact hole V2 and the contact hole V1. Similarly, the reflective electrode RE2 is disposed on the transparent electrode TE2 and is electrically connected to the transparent electrode TE2. The reflective electrode RE2 can be in contact with the transparent electrode TE2, and the reflective electrode RE2 can also extend into the contact hole V2 and the contact hole V1.

The metal layer 102 and the metal layer 108 may include single metal layers such as aluminum, copper, titanium, and tungsten, or composite metal layers such as molybdenum/aluminum/molybdenum, titanium/aluminum/titanium, titanium/copper/titanium, titanium/copper, etc., but Not limited to this. The metal layer 116 may include suitable reflective metal materials such as silver, and the conductive layer 116 may also include a single metal layer or a composite metal layer, but is not limited thereto.

The reflective electrode RE1, the transparent electrode TE1 and the pixel electrode PE1 can be electrically connected to each other and can be used together as a pixel electrode. Similarly, the reflective electrode RE2, the transparent electrode TE2 and the pixel electrode PE2 can be electrically connected to each other and can also be used together as a pixel electrode. But it is not limited to this.

There is a gap GP between the reflective electrode RE1 and the reflective electrode RE2. For example, the gap GP may be located between an edge 1220 of the reflective electrode RE1 and an edge 1221 of the reflective electrode RE2, but is not limited thereto.

As shown in FIG. 3 , a portion of the data line DL1 located below the gap GP in the direction Z includes a blackened layer 124 . In other words, the gap GP and the blackened layer 124 of a part of the data line DL1 partially overlap in the direction Z. The data line DL1 may also all include the blackened layer 124, but is not limited to this. In addition, as shown in FIG. 2 , the data line DL1 , the data line DL2 and the data line DL3 may all be located under the corresponding gap GP and may include part or all of the blackened layer 124 , but are not limited thereto.

When the reflective electrode RE1 and the reflective electrode RE2 are made, the gap GP is too large, which may cause the electric field in the display panel 10 to be unstable in the area near the gap GP, so the liquid crystal located in the area cannot be effectively controlled. At this time, when an ambient light IL is incident from the substrate 200 into the display panel 10 and is reflected by the metal layer (such as the data line DL1) below the gap GP, the reflected light may penetrate the gap GP and emit out of the display panel 10 to cause light leakage. , resulting in poor contrast.

However, in this embodiment, part or all of the metal layer (such as the data line DL1) located under the gap GP includes the blackened layer 124, thereby reducing the ambient light IL incident into the display panel 10 after being reflected by the metal layer. Causes light leakage, thereby improving contrast. In addition, it is also possible to eliminate the need to provide a shielding layer (such as a black matrix) on the substrate 200 . Therefore, no shielding layer is provided on the substrate 200 in this case, thereby saving costs.

In addition, in the metal layer 108 in this embodiment, except for the part below the gap GP (such as the data line DL1, the data line DL2 and/or the data line DL3), the remaining parts may not include a blackened layer, but this is not considered as limit. In addition, the metal layer 102 in this embodiment may not include a blackened layer, but is not limited to this.

As shown in FIG. 4 , in this embodiment, the blackened layer 124 may include a single-layer structure, and the single-layer structure may include a blackened metal. The blackened metal may include blackened molybdenum, but is not limited thereto.

Additionally, as shown in Figure 2, the transparent electrode may include designs with different widths. The transparent electrode TE1 includes a first part 1180 and a second part 1182. The pixel electrode PE1 may overlap with a portion of the first portion 1180 in the direction Z, and the first portion 1180 includes a first width W1 in the direction X. The second part 1182 is disposed on one side of the first part 1180 in the direction Y, as shown in FIG. 2 . The second part 1182 may be disposed above the first part 1180 in the direction Y, but is not limited to this. The second portion 1182 includes a second width W2 in the direction X, and the second width W2 is greater than the first width W1.

The transparent electrode TE2 includes a third part 1200 and a fourth part 1202. As shown in FIG. 2 , the pixel electrode PE2 may overlap with a portion of the third portion 1200 in the direction Z. The fourth part 1202 is disposed on one side of the third part 1200 in the direction Y. As shown in FIG. 2 , the fourth part 1202 may be disposed below the third part 1200 in the direction Y, but is not limited to this. The width of the fourth portion 1202 in the direction X is greater than the width of the third portion 1200 in the direction X.

In the existing display panel design, the transparent electrode does not have a retracted part, that is, the edge of the transparent electrode is aligned with or overlaps the edge of the reflective electrode in the direction Z. However, in some embodiments of the present invention, the transparent electrode TE1 includes a retracted first portion 1180 and the transparent electrode TE2 includes a retracted third portion 1200 to increase the distance of the spacing between the transparent electrode TE1 and the transparent electrode TE2, And make an edge 1260 of the transparent electrode TE1 away from the edge 1220 of the reflective electrode RE1 without overlapping each other, and also make an edge 1261 of the transparent electrode TE2 be far away from the edge 1221 of the reflective electrode RE2 without overlapping each other.

In addition, as shown in FIG. 3 , the display panel 10 includes a common electrode 202 disposed on the substrate 200 , and the common electrode 202 is disposed between the liquid crystal layer 300 and the substrate 200 . In this embodiment, the common electrode 202 may be completely formed on the substrate 200 and not patterned, but is not limited to this. In some embodiments, common electrode 202 may be patterned.

The display panel of the present invention is not limited to the above embodiment. Other embodiments of the present invention will continue to be disclosed below. However, in order to simplify the description and highlight the differences between the embodiments or modifications, the same elements will be labeled with the same reference numerals in the following, and repeated parts will not be described again.

Please refer to FIG. 5 , which is a schematic cross-sectional view of the blackened layer according to the first variation of the first embodiment of the present invention. The difference from the first embodiment is that the blackened layer 124 in this modified embodiment includes a stacked structure. As shown in Figure 5, the stacked structure may include a sub-layer 1280 and a sub-layer 1282, but the number of sub-layers is not limited thereto. The sub-layer 1280 is disposed on the sub-layer 1282. Since the blackened layer 124 can be disposed on the substrate 100, the sub-layer 1282 can be closer to the substrate 100 and the sub-layer 1280 can be farther away from the substrate 100, and the sub-layer 1282 can be disposed on the sub-layer 1280 and substrate 100. In the stacked structure, the sub-layer farthest from the substrate 100 (ie, the sub-layer 1280) includes blackened metal (such as blackened molybdenum), but is not limited thereto. The sub-layer 1282 may include unblackened metal, such as aluminum, but is not limited thereto. The stacked structure of the blackened layer 124 in this modified embodiment can be applied to other embodiments of the present invention.

Please refer to FIG. 6 , which is a schematic cross-sectional view of the blackened layer according to the second variation of the first embodiment of the present invention. The difference from the first modified embodiment is that the stacked structure in this modified embodiment may include a sub-layer 1280, a sub-layer 1282 and a sub-layer 1284, but the number of sub-layers is not limited thereto.

Since the blackened layer 124 can be disposed on the substrate 100, the sub-layer 1284 can be closer to the substrate 100, the sub-layer 1280 can be farther away from the substrate 100, the sub-layer 1284 can be disposed between the sub-layer 1280 and the substrate 100, and the sub-layer 1282 May be disposed between sub-layer 1280 and sub-layer 1284.

In the stacked structure, the sub-layer farthest from the substrate 100 (ie, the sub-layer 1280) includes blackened metal (such as blackened molybdenum), but is not limited thereto. Sublayer 1282 and sublayer 1284 may include unblackened metal. Sub-layer 1282 may include aluminum, and sub-layer 1284 may include molybdenum, but is not limited thereto. The stacked structure of the blackened layer 124 in this modified embodiment can be applied to other embodiments of the present invention.

Please refer to FIG. 7 , which is a schematic cross-sectional view of a display panel according to a second embodiment of the present invention. The difference from the first embodiment is that the metal layer 102 and the metal layer 108 in this embodiment both include a blackened layer 124, but are not limited thereto. In more detail, the entire metal layer 102 and the entire metal layer 108 include the blackened layer 124. Therefore, all devices in the metal layer 102 and all devices in the metal layer 108 may be formed by the blackened layer 124.

In some embodiments, the entire metal layer 108 may include the blackened layer 124, and the metal layer 102 may not include the blackened layer 124, but is not limited thereto. In some embodiments, all or part of the metal layer 108 may include a stacked structure of the blackened layer 124 in FIG. 5 or FIG. 6 , but is not limited thereto. In some embodiments, all or part of the metal layer 102 may include a stacked structure of the blackened layer 124 in FIG. 5 or FIG. 6 , but is not limited thereto.

To sum up, in the display panel of the present invention, part or all of the metal layer located under the gap includes a blackened layer, which can reduce the ambient light incident into the display panel and cause light leakage after being reflected by the metal layer, thereby improving the efficiency of the display panel. Contrast. The transparent electrode includes a retracted portion such that the edges of the transparent electrode are away from the edges of the reflective electrode and no longer overlap each other. Even if the manufacturing deviation of the reflective electrode is large, the phenomenon of residual metal material of the reflective electrode can be reduced, and the short circuit caused by the migration of residual metal ions can also be reduced. The above descriptions are only preferred embodiments of the present invention and are not intended to limit the present invention. For those skilled in the art, the present invention may have various modifications and changes. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present invention shall be included in the protection scope of the present invention.

10:Display panel 100,200:Substrate 100s: upper surface 102,108,116:Metal layer 104,110,112: Insulation layer 114:Transparent conductive layer 1180:Part 1 1182:Part 2 1200:Part 3 1202:Part 4 1220,1221,1260,1261: edge 124: blackened layer 1280,1282,1284: sub-layer 300: Liquid crystal layer AA: display area CH: semiconductor layer CE1, CE2, 202: common electrode CL: Common signal line D: drain DL1, DL2, DL3: data lines G: Gate GL1, GL2: scan line GP:Gap IL: ambient light PA: non-display area PE1, PE2: pixel electrode RE1, RE2: reflective electrode S: Source SP, SP1, SP2: sub-pixel SW1, SW2: switching elements TE1, TE2: transparent electrode V1, V2: contact hole W1: first width W2: second width X,Y,Z: direction

FIG. 1 is a schematic top view of a display panel according to a first embodiment of the present invention. FIG. 2 is a schematic top view of the pixel structure of the display panel according to the first embodiment of the present invention. FIG. 3 is a schematic cross-sectional view of the display panel according to the first embodiment of the present invention. Figure 4 is a schematic cross-sectional view of the blackened layer according to the first embodiment of the present invention. FIG. 5 is a schematic cross-sectional view of the blackened layer according to the first variation of the first embodiment of the present invention. FIG. 6 is a schematic cross-sectional view of the blackened layer according to the second variation of the first embodiment of the present invention. FIG. 7 is a schematic cross-sectional view of a display panel according to a second embodiment of the present invention.

100,200:Substrate

100s: upper surface

102,108,116:Metal layer

104,110,112: Insulation layer

114:Transparent conductive layer

1220,1221: Edge

124: blackened layer

202,CE1: Common electrode

300: Liquid crystal layer

CH: semiconductor layer

D: drain

DL1: data line

G: gate

GL1: scan line

GP:Gap

IL: ambient light

PE1: pixel electrode

RE1, RE2: reflective electrode

S: source

SW1: switching element

TE1: transparent electrode

V1, V2: contact hole

X,Y,Z: direction

Claims (10)

A display panel including: a display area and a non-display area, the non-display area being arranged on at least one side of the display area; a first substrate; A first sub-pixel is provided on the first substrate and in the display area, and the first sub-pixel includes a first switching element; A first metal layer is disposed on the first substrate. The first metal layer includes a plurality of first signal lines disposed in the display area. The plurality of first signal lines include a first scan line. The first switching element is connected, and the first scan line extends along a first direction; A second metal layer is provided on the first metal layer, and the second metal layer includes: a first pixel electrode of the first sub-pixel, and the first pixel electrode is electrically connected to the first switching element; and A plurality of second signal lines are provided in the display area. The plurality of second signal lines include a data line electrically connected to the first switching element. The data line extends along a second direction. One direction is different from the second direction, and a part of the data line includes a blackened layer; A transparent conductive layer is disposed on the second metal layer, the second metal layer is disposed between the transparent conductive layer and the first metal layer, the transparent conductive layer includes a first sub-pixel of the first sub-pixel. a transparent electrode, and the first transparent electrode is disposed on the first pixel electrode and is electrically connected to the first pixel electrode; and A third metal layer is disposed on the transparent conductive layer, the transparent conductive layer is disposed between the third metal layer and the second metal layer, the third metal layer includes the first sub-pixel a first reflective electrode, and the first reflective electrode is disposed on the first transparent electrode and is electrically connected to the first transparent electrode. The display panel according to claim 1, further comprising a second sub-pixel arranged on the first substrate, the first sub-pixel and the second sub-pixel being arranged adjacent to each other in the first direction. , and the second sub-pixel includes: a second switching element provided on the first substrate; A second pixel electrode is electrically connected to the second switching element, and the second metal layer includes the second pixel electrode; A second transparent electrode is disposed on the second pixel electrode and is electrically connected to the second pixel electrode, and the transparent conductive layer includes the second transparent electrode; and A second reflective electrode is disposed on the second transparent electrode and is electrically connected to the second transparent electrode. The third metal layer includes the second reflective electrode, the first reflective electrode and the second reflective electrode. There is a gap between the electrodes, and the gap partially overlaps with the blackened layer of the part of the data line in a vertical projection direction, wherein the vertical projection direction and an upper surface of the first substrate The surface is vertical. The display panel of claim 2, wherein the first metal layer includes a first common electrode of the first sub-pixel, a second common electrode of the second sub-pixel and a common signal line, and The plurality of first signal lines of the first metal layer include a second scan line, wherein the second scan line extends along the first direction and is electrically connected to the second switching element, and the second switching element is electrically connected to the data line, Wherein, the first common electrode is disposed between the first pixel electrode and the first substrate, the second common electrode is disposed between the second pixel electrode and the first substrate, and the The common signal line extends along the first direction and electrically connects the first common electrode and the second common electrode. The display panel of claim 1, wherein all of the second metal layers include the blackened layer. The display panel of claim 4, wherein all of the first metal layers include the blackened layer. The display panel of claim 1, wherein the blackened layer includes a laminated structure, and a first sub-layer in the laminated structure that is farthest from the first substrate includes a blackened metal. The display panel of claim 6, wherein the laminated structure includes a second sub-layer disposed between the first sub-layer and the first substrate, and the second sub-layer includes a non-black Chemical metal. The display panel of claim 6, wherein the laminated structure includes a second sub-layer and a third sub-layer, and the second sub-layer is disposed between the first sub-layer and the first substrate. The third sub-layer is disposed between the first sub-layer and the second sub-layer, and the second sub-layer and the third sub-layer include a non-blackened metal. The display panel of claim 1, wherein the blackened layer includes a single-layer structure, and the single-layer structure includes a blackened metal. The display panel as described in request item 1 also includes: A second substrate is disposed relative to the first substrate in a vertical projection direction, and a shielding layer is not provided on the second substrate; and A liquid crystal layer is provided between the first substrate and the second substrate.

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