TW202403709A - Pixel circuit, OLED display device and information processing device having a threshold voltage compensation function for alleviating the Mura phenomenon caused by inconsistent threshold voltages - Google Patents

Abstract

The present invention mainly discloses a pixel circuit for forming an OLED pixel unit with an OLED element. The pixel circuit includes: a data driving unit, a first capacitor, a second capacitor, a first switch unit, and a second switch unit. The data driving unit is coupled to the first capacitor, the second capacitor, the first switch unit, and the second switch unit. In particular, in the present invention, six TFT devices are used to form the data driving unit, one TFT device is used as the first switch unit, and one TFT device is used as the second switch unit. Based on this design, the pixel circuit of the present invention has a Vth compensation function, which can improve the Mura phenomenon caused by inconsistent Vth.

Description

Pixel circuits, OLED display devices and information processing devices

The present invention relates to the technical field of OLED display devices, and in particular, to a pixel circuit used to form an OLED pixel unit with an OLED element.

It is known that flat panel displays include non-self-luminous flat displays and self-luminous flat displays, among which liquid crystal displays are a non-self-luminous flat panel display that have been used for a long time, and organic light-emitting diodes (OLED) Displays and light-emitting diode (LED) displays are currently self-illuminating flat-panel displays with mainstream applications.

Figure 1 is a block diagram of a conventional OLED display. As shown in Figure 1, the architecture of the OLED display 1a mainly includes: an OLED display panel 11a and at least one display driver chip 12a, wherein the OLED display panel 11a includes M×N OLED pixel units, and each of the OLED pixel units The pixel unit is composed of a pixel circuit 111a and an OLED element 112a.

Traditionally, the pixel circuit 111a adopts a 2T1C architecture, that is, it includes two thin-film transistor (TFT) components and a capacitor. In recent years, in order to improve problems such as uneven luminance of the OLED element 112a caused by differences in transistor threshold voltage (Vth) and cross-voltage rise caused by the aging of the OLED element 112a, the pixel circuit 111a of the 4T1C or 5T1C architecture is adopted. It has been proposed one after another and has been practically applied in the production of OLED display panel 11a. Unfortunately, the existing pixel circuit 111a still has the problem of uneven brightness of the OLED element 112a caused by differences in threshold voltages, resulting in the so-called Mura phenomenon in some areas of the OLED display panel 11a.

From the above description, it can be seen that a new type of pixel circuit is urgently needed in this field.

The main purpose of the present invention is to provide a pixel circuit for forming an OLED pixel unit with an OLED element, and M×N OLED pixel units form an OLED panel. The pixel circuit of the present invention adopts an 8T2C architecture, which can compensate for the difference in threshold voltage between eight transistors, so that the brightness of each OLED element is uniform, ensuring that the OLED display panel does not appear in the process of displaying images. Mura phenomenon.

To achieve the above object, the present invention proposes an embodiment of the pixel circuit, which includes: A data driving unit has a first electrical terminal, a first control terminal, a second control terminal, a second electrical terminal, a third control terminal, a third electrical terminal, and a fourth control terminal. , a fourth electrical terminal, a fifth control terminal, and a sixth control terminal; wherein, the first electrical terminal is coupled to a first driving voltage, the first control terminal is coupled to a lighting control signal, and the The second control terminal is coupled to a first gate control signal, the second electrical terminal is coupled to a display data signal, the third control terminal is coupled to the lighting control signal, and the third electrical terminal is coupled to a secondary setting signal, the fourth control terminal is coupled to a second gate control signal, the fourth electrical terminal is used to couple to the anode terminal of an OLED element, and the fifth control terminal is coupled to the first gate control signal; A first storage capacitor has a first terminal and a second terminal, the first terminal is coupled to a first common contact between the first electrical terminal and the first driving voltage, and the second terminal The terminal is coupled to the sixth control terminal; A second storage capacitor also has a first terminal and a second terminal, and the first terminal is coupled to a second common contact point between the second terminal of the first storage capacitor and the sixth control terminal. ; A first switch unit has a control terminal, a first terminal and a second terminal, wherein the control terminal is coupled to the second gate control signal, the first terminal is coupled to the second common contact point, and The second terminal is coupled to the reset signal; and A second switch unit also has a control terminal, a first terminal and a second terminal, wherein the control terminal is coupled to a compensation signal, and the first terminal is coupled to the second terminal of the second storage capacitor, And the second terminal is coupled to a third common contact point between the second terminal of the first switch unit and the reset signal.

In one embodiment, the first switch unit includes a first TFT element having a gate terminal, a first electrical terminal and a second electrical terminal respectively serving as the control terminal of the first switch unit S1. the first end and the second end.

In one embodiment, the second switch unit includes a second TFT element having a gate terminal, a first electrical terminal and a second electrical terminal respectively serving as the control terminal and the second electrical terminal of the second switch unit. the first end and the second end.

In one embodiment, the data driving unit includes: A third TFT element having a gate terminal, a first electrical terminal and a second electrical terminal, wherein the gate terminal serves as the sixth control terminal of the data driving unit; A fourth TFT element has a gate terminal, a first electrical terminal and a second electrical terminal, wherein the gate terminal serves as the second control terminal of the data driving unit, and the first electrical terminal is coupled to Connect the first electrical terminal of the third TFT element, and the second electrical terminal serves as the second electrical terminal of the data driving unit; A fifth TFT element has a gate terminal, a first electrical terminal and a second electrical terminal, wherein the gate terminal serves as the fifth control terminal of the data driving unit, and the first electrical terminal is coupled to The second electrical terminal of the third TFT element is connected, and the second electrical terminal is coupled to the gate terminal of the third TFT element; A sixth TFT element has a gate terminal, a first electrical terminal and a second electrical terminal, wherein the gate terminal serves as the first control terminal of the data driving unit, and the first electrical terminal serves as The first electrical terminal of the data driving unit, and the second electrical terminal are coupled to one of the first electrical terminal of the fourth TFT element and the first electrical terminal of the third TFT element. A fourth common contact between; A seventh TFT element has a gate terminal, a first electrical terminal and a second electrical terminal, wherein the gate terminal serves as the third control terminal of the data driving unit, and the first electrical terminal is coupled to Connected to a fifth common contact between the first electrical terminal of the fifth TFT element and the second electrical terminal of the third TFT element, and the second electrical terminal serves as the data driving unit the fourth electrical terminal; and An eighth TFT element has a gate terminal, a first electrical terminal and a second electrical terminal, wherein the gate terminal serves as the fourth control terminal of the data driving unit, and the first electrical terminal is coupled to is connected to the second electrical terminal of the seventh TFT element, and the second electrical terminal serves as the third electrical terminal of the data driving unit.

The present invention also provides an OLED display device, which includes a display driving circuit and an OLED display panel, wherein the OLED display panel includes M×N pixel units, and each of the pixel units is composed of a pixel circuit and an OLED It is composed of components; it is characterized in that the pixel circuit includes: A data driving unit has a first electrical terminal, a first control terminal, a second control terminal, a second electrical terminal, a third control terminal, a third electrical terminal, and a fourth control terminal. , a fourth electrical terminal, a fifth control terminal, and a sixth control terminal; wherein, the first electrical terminal is coupled to a first driving voltage, the first control terminal is coupled to a lighting control signal, and the The second control terminal is coupled to a first gate control signal, the second electrical terminal is coupled to a display data signal, the third control terminal is coupled to the lighting control signal, and the third electrical terminal is coupled to a secondary setting signal, the fourth control terminal is coupled to a second gate control signal, the fourth electrical terminal is used to couple to the anode terminal of an OLED element, and the fifth control terminal is coupled to the first gate control signal; A first storage capacitor has a first terminal and a second terminal, the first terminal is coupled to a first common contact between the first electrical terminal and the first driving voltage, and the second terminal The terminal is coupled to the sixth control terminal; A second storage capacitor also has a first terminal and a second terminal, and the first terminal is coupled to a second common contact point between the second terminal of the first storage capacitor and the sixth control terminal. ; A first switch unit has a control terminal, a first terminal and a second terminal, wherein the control terminal is coupled to the second gate control signal, the first terminal is coupled to the second common contact point, and The second terminal is coupled to the reset signal; and A second switch unit also has a control terminal, a first terminal and a second terminal, wherein the control terminal is coupled to a compensation signal, and the first terminal is coupled to the second terminal of the second storage capacitor, And the second terminal is coupled to a third common contact point between the second terminal of the first switch unit and the reset signal.

In one embodiment, the first switch unit includes a first TFT element having a gate terminal, a first electrical terminal and a second electrical terminal respectively serving as the control terminal of the first switch unit S1. the first end and the second end.

In one embodiment, the second switch unit includes a second TFT element having a gate terminal, a first electrical terminal and a second electrical terminal respectively serving as the control terminal and the second electrical terminal of the second switch unit. the first end and the second end.

In one embodiment, the data driving unit includes: A third TFT element having a gate terminal, a first electrical terminal and a second electrical terminal, wherein the gate terminal serves as the sixth control terminal of the data driving unit; A fourth TFT element has a gate terminal, a first electrical terminal and a second electrical terminal, wherein the gate terminal serves as the second control terminal of the data driving unit, and the first electrical terminal is coupled to Connect the first electrical terminal of the third TFT element, and the second electrical terminal serves as the second electrical terminal of the data driving unit; A fifth TFT element has a gate terminal, a first electrical terminal and a second electrical terminal, wherein the gate terminal serves as the fifth control terminal of the data driving unit, and the first electrical terminal is coupled to The second electrical terminal of the third TFT element is connected, and the second electrical terminal is coupled to the gate terminal of the third TFT element; A sixth TFT element has a gate terminal, a first electrical terminal and a second electrical terminal, wherein the gate terminal serves as the first control terminal of the data driving unit, and the first electrical terminal serves as The first electrical terminal of the data driving unit, and the second electrical terminal are coupled to one of the first electrical terminal of the fourth TFT element and the first electrical terminal of the third TFT element. A fourth common contact between; A seventh TFT element has a gate terminal, a first electrical terminal and a second electrical terminal, wherein the gate terminal serves as the third control terminal of the data driving unit, and the first electrical terminal is coupled to Connected to a fifth common contact between the first electrical terminal of the fifth TFT element and the second electrical terminal of the third TFT element, and the second electrical terminal serves as the data driving unit the fourth electrical terminal; and An eighth TFT element has a gate terminal, a first electrical terminal and a second electrical terminal, wherein the gate terminal serves as the fourth control terminal of the data driving unit, and the first electrical terminal is coupled to is connected to the second electrical terminal of the seventh TFT element, and the second electrical terminal serves as the third electrical terminal of the data driving unit.

The present invention also provides an information processing device, which has the OLED display device of the present invention as described above.

In one embodiment, the information processing device is selected from the group consisting of a smart phone, a smart watch, a smart bracelet, a tablet computer, a notebook computer, an all-in-one computer, an access control device, and an electronic door lock. an electronic device among them.

In order to enable the review committee to further understand the structure, characteristics, purpose, and advantages of the present invention, drawings and detailed descriptions of preferred embodiments are attached below.

The present invention provides a pixel circuit, which is used to form an OLED pixel unit with an OLED element, and M×N OLED pixel units form an OLED panel. The pixel circuit of the present invention adopts an 8T2C architecture, which can compensate for the difference in threshold voltage between eight transistors, so that the brightness of each OLED element is uniform, ensuring that the OLED display panel does not appear in the process of displaying images. Mura phenomenon.

FIG. 2 is a block diagram of an OLED display device including a pixel circuit of the present invention. As shown in Figure 2, the architecture of the OLED display device 1 mainly includes: an OLED display panel 11 and at least one display driver chip 12, wherein the OLED display panel 11 includes M×N OLED pixel units, and each OLED The pixel unit is composed of an OLED element 112 and a pixel circuit 111 of the present invention. FIG. 3 is a circuit topology diagram of a pixel circuit according to the present invention. As shown in Figure 3, the pixel circuit 111 of the present invention mainly includes: a data driving unit 1D, a first storage capacitor Cst1, a second storage capacitor Cst2, a first switching unit S1, and a second switching unit S2. .

As shown in Figure 3, the data driving unit 1D has a first electrical terminal 1DT1, a first control terminal 1DC1, a second control terminal 1DC2, a second electrical terminal 1DT2, a third control terminal 1DC3, A third electrical terminal 1DT3, a fourth control terminal 1DC4, a fourth electrical terminal 1DT4, a fifth control terminal 1DC5, and a sixth control terminal 1DC6. According to the design of the present invention, the first electrical terminal 1DT1 is coupled to a first driving voltage ELVDD, the first control terminal 1DC1 is coupled to a light emission control signal EM(n), and the second control terminal 1DC2 is coupled to a first Gate control signal P_Gate(n), the second electrical terminal 1DT2 is coupled to a display data signal Dtata, the third control terminal 1DC3 is coupled to the light emission control signal EM(n), and the third electrical terminal 1DT3 is coupled to Received a reset signal RES_N, the fourth control terminal 1DC4 is coupled to a second gate control signal P_Gate(n-1), the fourth electrical terminal 1DT4 is used to be coupled to the anode terminal of an OLED element 112, and The fifth control terminal 1DC5 is coupled to the first gate control signal P_Gate(n).

On the other hand, the first terminal of the first storage capacitor Cst1 is coupled to a first common contact CN1 between the first electrical terminal 1DT1 and the first driving voltage ELVDD, and the second terminal thereof is coupled to the The sixth control terminal is 1DC6. Relative to the first storage capacitor Cst1, the first terminal of the second storage capacitor Cst2 is coupled to a second common contact between the second terminal of the first storage capacitor Cst1 and the sixth control terminal 1DC6 CN2. Moreover, the first switch unit S1 has a control terminal, a first terminal and a second terminal, wherein the control terminal is coupled to the second gate control signal P_Gate(n-1), and the first terminal is coupled to The second common contact CN2, and the second terminal is coupled to the reset signal RES_N. Furthermore, the second switch unit S2 also has a control terminal, a first terminal and a second terminal, wherein the control terminal is coupled to a compensation signal Comp(n), and the first terminal is coupled to the second storage The second terminal of the capacitor Cst2 is coupled to a third common contact CN3 between the second terminal of the first switch unit S1 and the reset signal RES_N.

Specifically, in one embodiment, the first switch unit S1 includes a first TFT element M1, and it has a gate terminal, a first electrical terminal and a second electrical terminal respectively serving as the first switch. The control end, the first end and the second end of unit S1. Moreover, as shown in FIG. 3 , the second switching unit S1 includes a second TFT element M2, which has a gate terminal, a first electrical terminal and a second electrical terminal respectively serving as the terminals of the second switching unit S2. The control end, the first end and the second end. To further explain, the data driving unit includes: a third TFT element M3, a fourth TFT element M4, a fifth TFT element M5, a sixth TFT element M6, a seventh TFT element M7, and an eighth TFT element M7. TFT element M8.

Electronic engineers who are familiar with the design and production of LCD and/or OLED pixel circuits must know that the TFT element is a symmetrical element. Its gate end is the element control end, and its two ends are two electrical ends. According to the flow direction of the current To determine the two electrical terminals as the source terminal and the drain terminal. Simply put, when one electrical terminal is the source terminal, the other terminal is the drain terminal, and vice versa. As shown in FIG. 3 , the third TFT element M3 has a gate terminal, a first electrical terminal and a second electrical terminal, wherein the gate terminal serves as the sixth control terminal 1DC6 of the data driving unit 1D. Moreover, the fourth TFT element M4 has a gate terminal, a first electrical terminal and a second electrical terminal, wherein the gate terminal serves as the second control terminal 1DC2 of the data driving unit 1D, and the first electrical terminal The electrical terminal is coupled to the first electrical terminal of the third TFT element M3, and the second electrical terminal serves as the second electrical terminal 1DT2 of the data driving unit 1D.

Following the above description, the fifth TFT element M5 has a gate terminal, a first electrical terminal and a second electrical terminal, wherein the gate terminal serves as the fifth control terminal 1DC5 of the data driving unit 1D. An electrical terminal is coupled to the second electrical terminal of the third TFT element M3, and the second electrical terminal is coupled to the gate terminal of the third TFT element M3. Moreover, the sixth TFT element M6 has a gate terminal, a first electrical terminal and a second electrical terminal, wherein the gate terminal serves as the first control terminal 1DC1 of the data driving unit 1D, and the first electrical terminal The electrical terminal serves as the first electrical terminal 1DT1 of the data driving unit 1D, and the second electrical terminal is coupled to the first electrical terminal of the fourth TFT element M4 and the third TFT element M3 There is a fourth common contact CN4 between the first electrical terminals.

As shown in Figure 3, the seventh TFT element M7 has a gate terminal, a first electrical terminal and a second electrical terminal, wherein the gate terminal serves as the third control terminal 1DC3 of the data driving unit 1D. , the first electrical terminal is coupled to a fifth common contact CN5 between the first electrical terminal of the fifth TFT element M5 and the second electrical terminal of the third TFT element M3, and the The second electrical terminal serves as the fourth electrical terminal 1DT4 of the data driving unit 1D. Furthermore, the eighth TFT element M8 has a gate terminal, a first electrical terminal and a second electrical terminal, wherein the gate terminal serves as the fourth control terminal 1DC4 of the data driving unit 1D, and the first The electrical terminal is coupled to the second electrical terminal of the seventh TFT element M7, and the second electrical terminal serves as the third electrical terminal 1DT3 of the data driving unit 1D.

FIG. 4 is an operating timing diagram of multiple signals used to control the pixel circuit of the present invention. As shown in Figure 3 and Figure 4, in the time interval T1, the second gate control signal P_Gate(n-1) and the compensation signal Comp(n) are both low level, so the first TFT element M1 and the second TFT element M2 and the eighth TFT element M8 are both connected. At this time, the node voltages of the three nodes N1, N2 and N4 are all equal to the voltage of the reset signal RES_N, so the anode of the OLED element 112 is reset by the voltage of the reset signal RES_N, and at the same time, the first storage The capacitor Cst1 and the second storage capacitor Cst2 are also reset by the voltage of the reset signal RES_N.

As shown in Figures 3 and 4, during the time interval T2, the first gate control signal P_Gate(n) is low level, causing the third TFT element M3, the fourth TFT element M4, and the fifth TFT element M5 to be turned on. Therefore, the data voltage Vdata of the display data signal can charge the node N1 through the fourth TFT element M4, the third TFT element M3 and the fifth TFT element M5 until the node voltage of N1 is charged to Vdata+Vth_M3, where Vth_M3 is the Threshold voltage of three TFT elements M3. When the node voltage of N1 is equal to Vdata+Vth_M3, the third TFT element M3 is turned off, thereby stopping the charging of the first storage capacitor Cst1 and the second storage capacitor Cst2, completing the writing of the data voltage Vdata and the Vth compensation work.

Continuing to refer to Figures 3 and 4, during the time interval T3, the compensation signal Comp(n) is low level, causing the second TFT element M2 to turn on, thereby causing the reset voltage of the reset signal RES_N to change from RES_N1 to RES_N2. . In this case, based on the principle that the charge at both ends of the capacitor cannot mutate, the change in the reset voltage (ie, ΔRES_N=RES_N2-RES_N1) is then superimposed to the node N1 via the first storage capacitor Cst1 and the second storage capacitor Cst2, so that N1 The node voltage is Vdata+Vth+ΔRES_N*C1/(C1+C2), where C1 is the capacitance value of the first storage capacitor Cst1, and C2 is the capacitance value of the second storage capacitor Cst2. On the other hand, the node voltage of N2 is RES_N2.

As shown in Figure 3 and Figure 4, in the time interval T4, the light emission control signal EM(n) is low level, so the third TFT element M3, the sixth TFT element M6 and the seventh TFT element M7 are turned on, and the other TFT elements are turned on. The element is turned off, causing the OLED element 112 to emit light in the T4 stage. Furthermore, according to the transistor saturation region current formula, the following mathematical operations can be performed:

It can be seen from the results of the above mathematical operations that Vth is canceled out, and the driving current of the OLED element 112 has nothing to do with Vth. Therefore, the pixel circuit 111 of the present invention can improve the uneven picture display caused by the inconsistent Vth voltage.

In this way, the above has completely and clearly described a pixel circuit of the present invention; and from the above, it can be seen that the present invention has the following advantages:

(1) The present invention discloses a pixel circuit for forming an OLED pixel unit with an OLED element, and M×N OLED pixel units form an OLED panel. The pixel circuit of the present invention adopts an 8T2C architecture, which can compensate for the difference in threshold voltage between eight transistors, so that the brightness of each OLED element is uniform, ensuring that the OLED display panel does not appear in the process of displaying images. Mura phenomenon.

(2) The present invention also provides an OLED display device, which includes at least one display driving circuit and an OLED display panel, wherein the OLED display panel includes M×N OLED pixel units, and is characterized in that each of the OLED pixels The unit is composed of an OLED element and a pixel circuit of the present invention.

(3) The present invention also provides an information processing device, which has the OLED display device of the present invention as described above. Moreover, the information processing device is one selected from the group consisting of smart phones, smart watches, smart bracelets, tablet computers, notebook computers, all-in-one computers, access control devices, and electronic door locks. electronic devices.

It must be emphasized that the foregoing disclosed in this case are preferred embodiments. Any partial changes or modifications derived from the technical ideas of this case and easily inferred by those familiar with the art do not deviate from the patent of this case. category of rights.

To sum up, regardless of the purpose, means and effects of this case, it shows that it is completely different from the conventional technology, and that the invention is practical first, and indeed meets the patent requirements for inventions. I sincerely ask the review committee to take a clear look and grant the patent as soon as possible for your benefit. Society is a prayer for the Supreme Being.

1a:OLED display 11a:OLED display panel 111a: Pixel circuit 112a:OLED components 12a: Display driver chip 1:OLED display device 11:OLED display panel 111:Pixel circuit 112:OLED components 12:Display driver chip 1D: Data drive unit Cst1: first storage capacitor Cst2: second storage capacitor S1: first switch unit S2: Second switch unit 1DT1: first electrical terminal 1DT2: Second electrical terminal 1DT3: The third electrical terminal 1DT4: The fourth electrical terminal 1DC1: first control terminal 1DC2: Second control terminal 1DC3: Third control terminal 1DC4: The fourth control terminal 1D5: The fifth control terminal 1D6: The sixth control terminal M1: The first TFT element M2: The second TFT element M3: The third TFT component M4: The fourth TFT element M5: The fifth TFT element M6: The sixth TFT component M7: The seventh TFT element M8: The eighth TFT element

Figure 1 is a block diagram of a conventional OLED display; Figure 2 is a block diagram of an OLED display including a pixel circuit of the present invention; Figure 3 is a circuit topology diagram of a pixel circuit according to the present invention; and FIG. 4 is an operating timing diagram of multiple signals used to control the pixel circuit of the present invention.

111:Pixel circuit

112:OLED components

1D: Data drive unit

Cst1: first storage capacitor

Cst2: second storage capacitor

S1: first switch unit

S2: Second switch unit

1DT1: first electrical terminal

1DT2: Second electrical terminal

1DT3: The third electrical terminal

1DT4: The fourth electrical terminal

1DC1: first control terminal

1DC2: Second control terminal

1DC3: Third control terminal

1DC4: The fourth control terminal

1D5: The fifth control terminal

1D6: The sixth control terminal

M1: The first TFT element

M2: The second TFT element

M3: The third TFT component

M4: The fourth TFT element

M5: The fifth TFT element

M6: The sixth TFT component

M7: The seventh TFT element

M8: The eighth TFT element

Claims (10)

A pixel circuit including: A data driving unit 1D has a first electrical terminal 1DT1, a first control terminal 1DC1, a second control terminal 1DC2, a second electrical terminal 1DT2, a third control terminal 1DC3, and a third electrical terminal 1DT3, a fourth control terminal 1DC4, a fourth electrical terminal 1DT4, a fifth control terminal 1DC5, and a sixth control terminal 1DC6; wherein, the first electrical terminal 1DT1 is coupled to a first driving voltage ELVDD, The first control terminal 1DC1 is coupled to a light emission control signal EM(n), the second control terminal 1DC2 is coupled to a first gate control signal P_Gate(n), and the second electrical terminal 1DT2 is coupled to a display data signal. Dtata, the third control terminal 1DC3 is coupled to the light emission control signal EM(n), the third electrical terminal 1DT3 is coupled to a reset signal RES_N, and the fourth control terminal 1DC4 is coupled to a second gate control signal P_Gate(n-1), the fourth electrical terminal 1DT4 is used to be coupled to the anode terminal of an OLED element 112, and the fifth control terminal 1DC5 is coupled to the first gate control signal P_Gate(n); A first storage capacitor Cst1 has a first terminal and a second terminal, the first terminal is coupled to a first common contact CN1 between the first electrical terminal 1DT1 and the first driving voltage ELVDD, And the second terminal is coupled to the sixth control terminal 1DC6; A second storage capacitor Cst2 also has a first terminal and a second terminal. The first terminal is coupled to a second terminal between the second terminal of the first storage capacitor Cst1 and the sixth control terminal 1DC6. Common contact CN2; A first switch unit S1 has a control terminal, a first terminal and a second terminal, wherein the control terminal is coupled to the second gate control signal P_Gate(n-1), and the first terminal is coupled to the The second common contact CN2, and the second terminal is coupled to the reset signal RES_N; and A second switch unit S2 also has a control terminal, a first terminal and a second terminal, wherein the control terminal is coupled to a compensation signal Comp(n), and the first terminal is coupled to the second storage capacitor Cst2 The second terminal is coupled to a third common contact CN3 between the second terminal of the first switch unit S1 and the reset signal RES_N. The pixel circuit of claim 1, wherein the first switch unit S1 includes a first TFT element M1, which has a gate terminal, a first electrical terminal and a second electrical terminal as the third electrical terminal respectively. The control terminal, the first terminal and the second terminal of a switch unit S1. The pixel circuit of claim 2, wherein the second switch unit S1 includes a second TFT element M2, which has a gate terminal, a first electrical terminal and a second electrical terminal as the third electrical terminal respectively. The control terminal, the first terminal and the second terminal of the two switch units S2. The pixel circuit of claim 3, wherein the data driving unit includes: A third TFT element M3, which has a gate terminal, a first electrical terminal and a second electrical terminal, wherein the gate terminal serves as the sixth control terminal 1DC6 of the data driving unit 1D; A fourth TFT element M4 has a gate terminal, a first electrical terminal and a second electrical terminal, wherein the gate terminal serves as the second control terminal 1DC2 of the data driving unit 1D, and the first electrical terminal The electrical terminal is coupled to the first electrical terminal of the third TFT element M3, and the second electrical terminal serves as the second electrical terminal 1DT2 of the data driving unit 1D; A fifth TFT element M5 has a gate terminal, a first electrical terminal and a second electrical terminal, wherein the gate terminal serves as the fifth control terminal 1DC5 of the data driving unit 1D, and the first electrical terminal The electrical terminal is coupled to the second electrical terminal of the third TFT element M3, and the second electrical terminal is coupled to the gate terminal of the third TFT element M3; A sixth TFT element M6 has a gate terminal, a first electrical terminal and a second electrical terminal, wherein the gate terminal serves as the first control terminal 1DC1 of the data driving unit 1D, and the first electrical terminal The electrical terminal serves as the first electrical terminal 1DT1 of the data driving unit 1D, and the second electrical terminal is coupled to the first electrical terminal of the fourth TFT element M4 and the third TFT element M3 a fourth common contact CN4 between the first electrical terminals; A seventh TFT element M7 has a gate terminal, a first electrical terminal and a second electrical terminal, wherein the gate terminal serves as the third control terminal 1DC3 of the data driving unit 1D, and the first electrical terminal The electrical terminal is coupled to a fifth common contact CN5 between the first electrical terminal of the fifth TFT element M5 and the second electrical terminal of the third TFT element M3, and the second electrical terminal The fourth electrical terminal 1DT4 as the data driving unit 1D; and An eighth TFT element M8 has a gate terminal, a first electrical terminal and a second electrical terminal, wherein the gate terminal serves as the fourth control terminal 1DC4 of the data driving unit 1D, and the first electrical terminal The electrical terminal is coupled to the second electrical terminal of the seventh TFT element M7, and the second electrical terminal serves as the third electrical terminal 1DT3 of the data driving unit 1D. An OLED display device, which includes a display driving circuit and an OLED display panel 11, wherein the OLED display panel 11 includes M×N pixel units, and each of the pixel units consists of a pixel circuit 111 and an OLED element. Composed of 112; characterized in that the pixel circuit 111 includes: A data driving unit 1D has a first electrical terminal 1DT1, a first control terminal 1DC1, a second control terminal 1DC2, a second electrical terminal 1DT2, a third control terminal 1DC3, and a third electrical terminal 1DT3, a fourth control terminal 1DC4, a fourth electrical terminal 1DT4, a fifth control terminal 1DC5, and a sixth control terminal 1DC6; wherein, the first electrical terminal 1DT1 is coupled to a first driving voltage ELVDD, The first control terminal 1DC1 is coupled to a light emission control signal EM(n), the second control terminal 1DC2 is coupled to a first gate control signal P_Gate(n), and the second electrical terminal 1DT2 is coupled to a display data signal. Dtata, the third control terminal 1DC3 is coupled to the light emission control signal EM(n), the third electrical terminal 1DT3 is coupled to a reset signal RES_N, and the fourth control terminal 1DC4 is coupled to a second gate control signal P_Gate(n-1), the fourth electrical terminal 1DT4 is used to be coupled to the anode terminal of an OLED element 112, and the fifth control terminal 1DC5 is coupled to the first gate control signal P_Gate(n); A first storage capacitor Cst1 has a first terminal and a second terminal, the first terminal is coupled to a first common contact CN1 between the first electrical terminal 1DT1 and the first driving voltage ELVDD, And the second terminal is coupled to the sixth control terminal 1DC6; A second storage capacitor Cst2 also has a first terminal and a second terminal. The first terminal is coupled to a second terminal between the second terminal of the first storage capacitor Cst1 and the sixth control terminal 1DC6. Common contact CN2; A first switch unit S1 has a control terminal, a first terminal and a second terminal, wherein the control terminal is coupled to the second gate control signal P_Gate(n-1), and the first terminal is coupled to the The second common contact CN2, and the second terminal is coupled to the reset signal RES_N; and A second switch unit S2 also has a control terminal, a first terminal and a second terminal, wherein the control terminal is coupled to a compensation signal Comp(n), and the first terminal is coupled to the second storage capacitor Cst2 The second terminal is coupled to a third common contact CN3 between the second terminal of the first switch unit S1 and the reset signal RES_N. The OLED display device according to claim 5, wherein the first switch unit S1 includes a first TFT element M1 having a gate terminal, a first electrical terminal and a second electrical terminal as the third electrical terminal respectively. The control terminal, the first terminal and the second terminal of a switch unit S1. The OLED display device of claim 6, wherein the second switch unit S1 includes a second TFT element M2 having a gate terminal, a first electrical terminal and a second electrical terminal as the third electrical terminal respectively. The control terminal, the first terminal and the second terminal of the two switch units S2. The OLED display device as claimed in claim 7, wherein the data driving unit includes: A third TFT element M3, which has a gate terminal, a first electrical terminal and a second electrical terminal, wherein the gate terminal serves as the sixth control terminal 1DC6 of the data driving unit 1D; A fourth TFT element M4 has a gate terminal, a first electrical terminal and a second electrical terminal, wherein the gate terminal serves as the second control terminal 1DC2 of the data driving unit 1D, and the first electrical terminal The electrical terminal is coupled to the first electrical terminal of the third TFT element M3, and the second electrical terminal serves as the second electrical terminal 1DT2 of the data driving unit 1D; A fifth TFT element M5 has a gate terminal, a first electrical terminal and a second electrical terminal, wherein the gate terminal serves as the fifth control terminal 1DC5 of the data driving unit 1D, and the first electrical terminal The electrical terminal is coupled to the second electrical terminal of the third TFT element M3, and the second electrical terminal is coupled to the gate terminal of the third TFT element M3; A sixth TFT element M6 has a gate terminal, a first electrical terminal and a second electrical terminal, wherein the gate terminal serves as the first control terminal 1DC1 of the data driving unit 1D, and the first electrical terminal The electrical terminal serves as the first electrical terminal 1DT1 of the data driving unit 1D, and the second electrical terminal is coupled to the first electrical terminal of the fourth TFT element M4 and the third TFT element M3 a fourth common contact CN4 between the first electrical terminals; A seventh TFT element M7 has a gate terminal, a first electrical terminal and a second electrical terminal, wherein the gate terminal serves as the third control terminal 1DC3 of the data driving unit 1D, and the first electrical terminal The electrical terminal is coupled to a fifth common contact CN5 between the first electrical terminal of the fifth TFT element M5 and the second electrical terminal of the third TFT element M3, and the second electrical terminal The fourth electrical terminal 1DT4 as the data driving unit 1D; and An eighth TFT element M8 has a gate terminal, a first electrical terminal and a second electrical terminal, wherein the gate terminal serves as the fourth control terminal 1DC4 of the data driving unit 1D, and the first electrical terminal The electrical terminal is coupled to the second electrical terminal of the seventh TFT element M7, and the second electrical terminal serves as the third electrical terminal 1DT3 of the data driving unit 1D. An information processing device, characterized by having at least one OLED display device as described in any one of claims 5 to 8. The information processing device as described in claim 9, wherein the information processing device is selected from the group consisting of smart phones, smart watches, smart bracelets, tablet computers, notebook computers, all-in-one computers, access control devices, and electronic An electronic device in a group of door locks.

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